1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-or-later 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Copyright 2013 Eukréa Electromatique <denis@eukrea.com> 4*f126890aSEmmanuel Vadot */ 5*f126890aSEmmanuel Vadot 6*f126890aSEmmanuel Vadot/dts-v1/; 7*f126890aSEmmanuel Vadot 8*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 9*f126890aSEmmanuel Vadot#include <dt-bindings/input/input.h> 10*f126890aSEmmanuel Vadot#include "imx25-eukrea-cpuimx25.dtsi" 11*f126890aSEmmanuel Vadot 12*f126890aSEmmanuel Vadot/ { 13*f126890aSEmmanuel Vadot model = "Eukrea MBIMXSD25"; 14*f126890aSEmmanuel Vadot compatible = "eukrea,mbimxsd25-baseboard", "eukrea,cpuimx25", "fsl,imx25"; 15*f126890aSEmmanuel Vadot 16*f126890aSEmmanuel Vadot gpio-keys { 17*f126890aSEmmanuel Vadot compatible = "gpio-keys"; 18*f126890aSEmmanuel Vadot pinctrl-names = "default"; 19*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_gpiokeys>; 20*f126890aSEmmanuel Vadot 21*f126890aSEmmanuel Vadot button { 22*f126890aSEmmanuel Vadot label = "BP1"; 23*f126890aSEmmanuel Vadot gpios = <&gpio3 18 GPIO_ACTIVE_LOW>; 24*f126890aSEmmanuel Vadot linux,code = <BTN_MISC>; 25*f126890aSEmmanuel Vadot wakeup-source; 26*f126890aSEmmanuel Vadot }; 27*f126890aSEmmanuel Vadot }; 28*f126890aSEmmanuel Vadot 29*f126890aSEmmanuel Vadot leds { 30*f126890aSEmmanuel Vadot compatible = "gpio-leds"; 31*f126890aSEmmanuel Vadot pinctrl-names = "default"; 32*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_gpioled>; 33*f126890aSEmmanuel Vadot 34*f126890aSEmmanuel Vadot led1 { 35*f126890aSEmmanuel Vadot label = "led1"; 36*f126890aSEmmanuel Vadot gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; 37*f126890aSEmmanuel Vadot linux,default-trigger = "heartbeat"; 38*f126890aSEmmanuel Vadot }; 39*f126890aSEmmanuel Vadot }; 40*f126890aSEmmanuel Vadot 41*f126890aSEmmanuel Vadot sound { 42*f126890aSEmmanuel Vadot compatible = "eukrea,asoc-tlv320"; 43*f126890aSEmmanuel Vadot eukrea,model = "imx25-eukrea-tlv320aic23"; 44*f126890aSEmmanuel Vadot ssi-controller = <&ssi1>; 45*f126890aSEmmanuel Vadot fsl,mux-int-port = <1>; 46*f126890aSEmmanuel Vadot fsl,mux-ext-port = <5>; 47*f126890aSEmmanuel Vadot }; 48*f126890aSEmmanuel Vadot}; 49*f126890aSEmmanuel Vadot 50*f126890aSEmmanuel Vadot&audmux { 51*f126890aSEmmanuel Vadot pinctrl-names = "default"; 52*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_audmux>; 53*f126890aSEmmanuel Vadot status = "okay"; 54*f126890aSEmmanuel Vadot}; 55*f126890aSEmmanuel Vadot 56*f126890aSEmmanuel Vadot&esdhc1 { 57*f126890aSEmmanuel Vadot pinctrl-names = "default"; 58*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_esdhc1>; 59*f126890aSEmmanuel Vadot cd-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; 60*f126890aSEmmanuel Vadot status = "okay"; 61*f126890aSEmmanuel Vadot}; 62*f126890aSEmmanuel Vadot 63*f126890aSEmmanuel Vadot&i2c1 { 64*f126890aSEmmanuel Vadot tlv320aic23: codec@1a { 65*f126890aSEmmanuel Vadot compatible = "ti,tlv320aic23"; 66*f126890aSEmmanuel Vadot reg = <0x1a>; 67*f126890aSEmmanuel Vadot }; 68*f126890aSEmmanuel Vadot}; 69*f126890aSEmmanuel Vadot 70*f126890aSEmmanuel Vadot&iomuxc { 71*f126890aSEmmanuel Vadot imx25-eukrea-mbimxsd25-baseboard { 72*f126890aSEmmanuel Vadot pinctrl_audmux: audmuxgrp { 73*f126890aSEmmanuel Vadot fsl,pins = < 74*f126890aSEmmanuel Vadot MX25_PAD_KPP_COL3__AUD5_TXFS 0xe0 75*f126890aSEmmanuel Vadot MX25_PAD_KPP_COL2__AUD5_TXC 0xe0 76*f126890aSEmmanuel Vadot MX25_PAD_KPP_COL1__AUD5_RXD 0xe0 77*f126890aSEmmanuel Vadot MX25_PAD_KPP_COL0__AUD5_TXD 0xe0 78*f126890aSEmmanuel Vadot >; 79*f126890aSEmmanuel Vadot }; 80*f126890aSEmmanuel Vadot 81*f126890aSEmmanuel Vadot pinctrl_esdhc1: esdhc1grp { 82*f126890aSEmmanuel Vadot fsl,pins = < 83*f126890aSEmmanuel Vadot MX25_PAD_SD1_CMD__ESDHC1_CMD 0x400000c0 84*f126890aSEmmanuel Vadot MX25_PAD_SD1_CLK__ESDHC1_CLK 0x400000c0 85*f126890aSEmmanuel Vadot MX25_PAD_SD1_DATA0__ESDHC1_DAT0 0x400000c0 86*f126890aSEmmanuel Vadot MX25_PAD_SD1_DATA1__ESDHC1_DAT1 0x400000c0 87*f126890aSEmmanuel Vadot MX25_PAD_SD1_DATA2__ESDHC1_DAT2 0x400000c0 88*f126890aSEmmanuel Vadot MX25_PAD_SD1_DATA3__ESDHC1_DAT3 0x400000c0 89*f126890aSEmmanuel Vadot >; 90*f126890aSEmmanuel Vadot }; 91*f126890aSEmmanuel Vadot 92*f126890aSEmmanuel Vadot pinctrl_gpiokeys: gpiokeysgrp { 93*f126890aSEmmanuel Vadot fsl,pins = <MX25_PAD_VSTBY_ACK__GPIO_3_18 0x80000000>; 94*f126890aSEmmanuel Vadot }; 95*f126890aSEmmanuel Vadot 96*f126890aSEmmanuel Vadot pinctrl_gpioled: gpioledgrp { 97*f126890aSEmmanuel Vadot fsl,pins = <MX25_PAD_POWER_FAIL__GPIO_3_19 0x80000000>; 98*f126890aSEmmanuel Vadot }; 99*f126890aSEmmanuel Vadot 100*f126890aSEmmanuel Vadot pinctrl_lcdc: lcdcgrp { 101*f126890aSEmmanuel Vadot fsl,pins = < 102*f126890aSEmmanuel Vadot MX25_PAD_LD0__LD0 0x1 103*f126890aSEmmanuel Vadot MX25_PAD_LD1__LD1 0x1 104*f126890aSEmmanuel Vadot MX25_PAD_LD2__LD2 0x1 105*f126890aSEmmanuel Vadot MX25_PAD_LD3__LD3 0x1 106*f126890aSEmmanuel Vadot MX25_PAD_LD4__LD4 0x1 107*f126890aSEmmanuel Vadot MX25_PAD_LD5__LD5 0x1 108*f126890aSEmmanuel Vadot MX25_PAD_LD6__LD6 0x1 109*f126890aSEmmanuel Vadot MX25_PAD_LD7__LD7 0x1 110*f126890aSEmmanuel Vadot MX25_PAD_LD8__LD8 0x1 111*f126890aSEmmanuel Vadot MX25_PAD_LD9__LD9 0x1 112*f126890aSEmmanuel Vadot MX25_PAD_LD10__LD10 0x1 113*f126890aSEmmanuel Vadot MX25_PAD_LD11__LD11 0x1 114*f126890aSEmmanuel Vadot MX25_PAD_LD12__LD12 0x1 115*f126890aSEmmanuel Vadot MX25_PAD_LD13__LD13 0x1 116*f126890aSEmmanuel Vadot MX25_PAD_LD14__LD14 0x1 117*f126890aSEmmanuel Vadot MX25_PAD_LD15__LD15 0x1 118*f126890aSEmmanuel Vadot MX25_PAD_GPIO_E__LD16 0x1 119*f126890aSEmmanuel Vadot MX25_PAD_GPIO_F__LD17 0x1 120*f126890aSEmmanuel Vadot MX25_PAD_HSYNC__HSYNC 0x80000000 121*f126890aSEmmanuel Vadot MX25_PAD_VSYNC__VSYNC 0x80000000 122*f126890aSEmmanuel Vadot MX25_PAD_LSCLK__LSCLK 0x80000000 123*f126890aSEmmanuel Vadot MX25_PAD_OE_ACD__OE_ACD 0x80000000 124*f126890aSEmmanuel Vadot MX25_PAD_CONTRAST__CONTRAST 0x80000000 125*f126890aSEmmanuel Vadot >; 126*f126890aSEmmanuel Vadot }; 127*f126890aSEmmanuel Vadot 128*f126890aSEmmanuel Vadot pinctrl_uart1: uart1grp { 129*f126890aSEmmanuel Vadot fsl,pins = < 130*f126890aSEmmanuel Vadot MX25_PAD_UART1_RTS__UART1_RTS 0xe0 131*f126890aSEmmanuel Vadot MX25_PAD_UART1_CTS__UART1_CTS 0xe0 132*f126890aSEmmanuel Vadot MX25_PAD_UART1_TXD__UART1_TXD 0x80000000 133*f126890aSEmmanuel Vadot MX25_PAD_UART1_RXD__UART1_RXD 0xc0 134*f126890aSEmmanuel Vadot >; 135*f126890aSEmmanuel Vadot }; 136*f126890aSEmmanuel Vadot 137*f126890aSEmmanuel Vadot pinctrl_uart2: uart2grp { 138*f126890aSEmmanuel Vadot fsl,pins = < 139*f126890aSEmmanuel Vadot MX25_PAD_UART2_RXD__UART2_RXD 0x80000000 140*f126890aSEmmanuel Vadot MX25_PAD_UART2_TXD__UART2_TXD 0x80000000 141*f126890aSEmmanuel Vadot MX25_PAD_UART2_RTS__UART2_RTS 0x80000000 142*f126890aSEmmanuel Vadot MX25_PAD_UART2_CTS__UART2_CTS 0x80000000 143*f126890aSEmmanuel Vadot >; 144*f126890aSEmmanuel Vadot }; 145*f126890aSEmmanuel Vadot }; 146*f126890aSEmmanuel Vadot}; 147*f126890aSEmmanuel Vadot 148*f126890aSEmmanuel Vadot&ssi1 { 149*f126890aSEmmanuel Vadot codec-handle = <&tlv320aic23>; 150*f126890aSEmmanuel Vadot status = "okay"; 151*f126890aSEmmanuel Vadot}; 152*f126890aSEmmanuel Vadot 153*f126890aSEmmanuel Vadot&uart1 { 154*f126890aSEmmanuel Vadot pinctrl-names = "default"; 155*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart1>; 156*f126890aSEmmanuel Vadot uart-has-rtscts; 157*f126890aSEmmanuel Vadot status = "okay"; 158*f126890aSEmmanuel Vadot}; 159*f126890aSEmmanuel Vadot 160*f126890aSEmmanuel Vadot&uart2 { 161*f126890aSEmmanuel Vadot pinctrl-names = "default"; 162*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart2>; 163*f126890aSEmmanuel Vadot uart-has-rtscts; 164*f126890aSEmmanuel Vadot status = "okay"; 165*f126890aSEmmanuel Vadot}; 166*f126890aSEmmanuel Vadot 167*f126890aSEmmanuel Vadot&usbhost1 { 168*f126890aSEmmanuel Vadot status = "okay"; 169*f126890aSEmmanuel Vadot}; 170*f126890aSEmmanuel Vadot 171*f126890aSEmmanuel Vadot&usbotg { 172*f126890aSEmmanuel Vadot external-vbus-divider; 173*f126890aSEmmanuel Vadot status = "okay"; 174*f126890aSEmmanuel Vadot}; 175