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/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Duniform-select.ll23 ; GFX90A-NEXT: s_cselect_b32 s7, s4, s3
27 ; GFX90A-NEXT: s_cselect_b32 s7, s5, s7
31 ; GFX90A-NEXT: s_cselect_b32 s7, s6, s7
32 ; GFX90A-NEXT: s_or_b32 s7, s7, s0
36 ; GFX90A-NEXT: s_cselect_b32 s4, s7, s4
40 ; GFX90A-NEXT: s_cselect_b32 s6, s7, s6
44 ; GFX90A-NEXT: s_cselect_b32 s5, s7, s
[all...]
H A Dfpext.f16.ll12 ; SI-NEXT: s_mov_b32 s7, 0xf000
15 ; SI-NEXT: s_mov_b32 s11, s7
30 ; GFX89-NEXT: s_mov_b32 s7, 0xf000
33 ; GFX89-NEXT: s_mov_b32 s11, s7
49 ; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
51 ; GFX11-TRUE16-NEXT: s_mov_b32 s11, s7
67 ; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
69 ; GFX11-FAKE16-NEXT: s_mov_b32 s11, s7
93 ; SI-NEXT: s_mov_b32 s7, 0xf000
96 ; SI-NEXT: s_mov_b32 s11, s7
[all...]
H A Dlds-frame-extern.ll44 ; CHECK-NEXT: s_addc_u32 s7, s7, llvm.amdgcn.dynlds.offset.table@rel32@hi+12
50 ; CHECK-NEXT: s_addc_u32 s5, s5, s7
68 ; CHECK-NEXT: s_addc_u32 s7, s7, llvm.amdgcn.dynlds.offset.table@rel32@hi+12
74 ; CHECK-NEXT: s_addc_u32 s5, s5, s7
H A Dimage-load-d16-tfe.ll13 ; GFX9-NEXT: s_mov_b32 s9, s7
15 ; GFX9-NEXT: s_mov_b32 s7, s5
33 ; GFX10-NEXT: s_mov_b32 s9, s7
35 ; GFX10-NEXT: s_mov_b32 s7, s5
53 ; GFX11-NEXT: s_mov_b32 s9, s7
55 ; GFX11-NEXT: s_mov_b32 s7, s5
73 ; GFX8-UNPACKED-NEXT: s_mov_b32 s9, s7
75 ; GFX8-UNPACKED-NEXT: s_mov_b32 s7, s5
101 ; GFX9-NEXT: s_mov_b32 s9, s7
103 ; GFX9-NEXT: s_mov_b32 s7, s
[all...]
H A Dfptosi.f16.ll12 ; SI-NEXT: s_mov_b32 s7, 0xf000
15 ; SI-NEXT: s_mov_b32 s11, s7
31 ; VI-NEXT: s_mov_b32 s7, 0xf000
34 ; VI-NEXT: s_mov_b32 s11, s7
50 ; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
52 ; GFX11-TRUE16-NEXT: s_mov_b32 s11, s7
68 ; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
70 ; GFX11-FAKE16-NEXT: s_mov_b32 s11, s7
94 ; SI-NEXT: s_mov_b32 s7, 0xf000
97 ; SI-NEXT: s_mov_b32 s11, s7
[all...]
H A Dfptoui.f16.ll12 ; SI-NEXT: s_mov_b32 s7, 0xf000
15 ; SI-NEXT: s_mov_b32 s11, s7
31 ; VI-NEXT: s_mov_b32 s7, 0xf000
34 ; VI-NEXT: s_mov_b32 s11, s7
50 ; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
52 ; GFX11-TRUE16-NEXT: s_mov_b32 s11, s7
68 ; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
70 ; GFX11-FAKE16-NEXT: s_mov_b32 s11, s7
94 ; SI-NEXT: s_mov_b32 s7, 0xf000
97 ; SI-NEXT: s_mov_b32 s11, s7
[all...]
H A Dllvm.round.f64.ll13 ; SI-NEXT: s_bfe_u32 s7, s3, 0xb0014
14 ; SI-NEXT: s_addk_i32 s7, 0xfc01
15 ; SI-NEXT: s_lshr_b64 s[4:5], s[4:5], s7
18 ; SI-NEXT: s_cmp_lt_i32 s7, 0
21 ; SI-NEXT: s_cmp_gt_i32 s7, 51
37 ; SI-NEXT: s_mov_b32 s7, 0xf000
46 ; CI-NEXT: s_mov_b32 s7, 0xf000
72 ; SI-NEXT: s_mov_b32 s7, 0xf000
112 ; CI-NEXT: s_mov_b32 s7, 0xf000
146 ; SI-NEXT: s_mov_b32 s7,
[all...]
/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dllvm.amdgcn.image.atomic.dim.ll18 ; GFX6-NEXT: s_mov_b32 s5, s7
20 ; GFX6-NEXT: s_mov_b32 s7, s9
32 ; GFX8-NEXT: s_mov_b32 s5, s7
34 ; GFX8-NEXT: s_mov_b32 s7, s9
46 ; GFX900-NEXT: s_mov_b32 s5, s7
48 ; GFX900-NEXT: s_mov_b32 s7, s9
60 ; GFX90A-NEXT: s_mov_b32 s5, s7
62 ; GFX90A-NEXT: s_mov_b32 s7, s9
75 ; GFX10PLUS-NEXT: s_mov_b32 s5, s7
77 ; GFX10PLUS-NEXT: s_mov_b32 s7, s9
[all …]
H A Dllvm.amdgcn.image.store.2d.ll16 ; GFX6-NEXT: s_mov_b32 s5, s7
18 ; GFX6-NEXT: s_mov_b32 s7, s9
29 ; GFX8-NEXT: s_mov_b32 s5, s7
31 ; GFX8-NEXT: s_mov_b32 s7, s9
42 ; GFX10-NEXT: s_mov_b32 s5, s7
44 ; GFX10-NEXT: s_mov_b32 s7, s9
55 ; GFX11-NEXT: s_mov_b32 s5, s7
57 ; GFX11-NEXT: s_mov_b32 s7, s9
68 ; GFX12-NEXT: s_mov_b32 s5, s7
70 ; GFX12-NEXT: s_mov_b32 s7, s
[all...]
H A Dllvm.amdgcn.image.load.1d.ll17 ; GFX68-NEXT: s_mov_b32 s5, s7
19 ; GFX68-NEXT: s_mov_b32 s7, s9
31 ; GFX10-NEXT: s_mov_b32 s5, s7
33 ; GFX10-NEXT: s_mov_b32 s7, s9
45 ; NOPRT-NEXT: s_mov_b32 s5, s7
47 ; NOPRT-NEXT: s_mov_b32 s7, s9
59 ; GFX12-NEXT: s_mov_b32 s5, s7
61 ; GFX12-NEXT: s_mov_b32 s7, s9
77 ; GFX68-NEXT: s_mov_b32 s5, s7
79 ; GFX68-NEXT: s_mov_b32 s7, s9
[all …]
H A Dllvm.amdgcn.image.load.1d.d16.ll17 ; GFX8-UNPACKED-NEXT: s_mov_b32 s5, s7
19 ; GFX8-UNPACKED-NEXT: s_mov_b32 s7, s9
31 ; GFX8-PACKED-NEXT: s_mov_b32 s5, s7
33 ; GFX8-PACKED-NEXT: s_mov_b32 s7, s9
45 ; GFX9-NEXT: s_mov_b32 s5, s7
47 ; GFX9-NEXT: s_mov_b32 s7, s9
59 ; GFX10PLUS-NEXT: s_mov_b32 s5, s7
61 ; GFX10PLUS-NEXT: s_mov_b32 s7, s9
73 ; GFX12-NEXT: s_mov_b32 s5, s7
75 ; GFX12-NEXT: s_mov_b32 s7, s9
[all …]
H A Dllvm.amdgcn.image.getresinfo.ll16 ; GFX6-NEXT: s_mov_b32 s5, s7
18 ; GFX6-NEXT: s_mov_b32 s7, s9
30 ; GFX8-NEXT: s_mov_b32 s5, s7
32 ; GFX8-NEXT: s_mov_b32 s7, s9
44 ; GFX10-NEXT: s_mov_b32 s5, s7
46 ; GFX10-NEXT: s_mov_b32 s7, s9
58 ; GFX12-NEXT: s_mov_b32 s5, s7
60 ; GFX12-NEXT: s_mov_b32 s7, s9
77 ; GFX6-NEXT: s_mov_b32 s5, s7
79 ; GFX6-NEXT: s_mov_b32 s7, s9
[all …]
H A Dllvm.amdgcn.image.atomic.dim.a16.ll15 ; GFX9-NEXT: s_mov_b32 s5, s7
17 ; GFX9-NEXT: s_mov_b32 s7, s9
29 ; GFX10-NEXT: s_mov_b32 s5, s7
31 ; GFX10-NEXT: s_mov_b32 s7, s9
43 ; GFX12-NEXT: s_mov_b32 s5, s7
45 ; GFX12-NEXT: s_mov_b32 s7, s9
63 ; GFX9-NEXT: s_mov_b32 s5, s7
65 ; GFX9-NEXT: s_mov_b32 s7, s9
77 ; GFX10-NEXT: s_mov_b32 s5, s7
79 ; GFX10-NEXT: s_mov_b32 s7, s
[all...]
H A Dllvm.amdgcn.image.getresinfo.a16.ll15 ; GFX9-NEXT: s_mov_b32 s5, s7
17 ; GFX9-NEXT: s_mov_b32 s7, s9
29 ; GFX10-NEXT: s_mov_b32 s5, s7
31 ; GFX10-NEXT: s_mov_b32 s7, s9
43 ; GFX12-NEXT: s_mov_b32 s5, s7
45 ; GFX12-NEXT: s_mov_b32 s7, s9
62 ; GFX9-NEXT: s_mov_b32 s5, s7
64 ; GFX9-NEXT: s_mov_b32 s7, s9
76 ; GFX10-NEXT: s_mov_b32 s5, s7
78 ; GFX10-NEXT: s_mov_b32 s7, s9
[all …]
H A Dllvm.amdgcn.image.gather4.dim.ll16 ; GFX6-NEXT: s_mov_b32 s5, s7
18 ; GFX6-NEXT: s_mov_b32 s7, s9
39 ; GFX10NSA-NEXT: s_mov_b32 s5, s7
41 ; GFX10NSA-NEXT: s_mov_b32 s7, s9
60 ; GFX12-NEXT: s_mov_b32 s5, s7
62 ; GFX12-NEXT: s_mov_b32 s7, s9
84 ; GFX6-NEXT: s_mov_b32 s5, s7
86 ; GFX6-NEXT: s_mov_b32 s7, s9
116 ; GFX10NSA-NEXT: s_mov_b32 s5, s7
118 ; GFX10NSA-NEXT: s_mov_b32 s7, s9
[all …]
H A Dllvm.amdgcn.image.gather4.a16.dim.ll18 ; GFX9-NEXT: s_mov_b32 s5, s7
20 ; GFX9-NEXT: s_mov_b32 s7, s9
41 ; GFX10NSA-NEXT: s_mov_b32 s5, s7
43 ; GFX10NSA-NEXT: s_mov_b32 s7, s9
64 ; GFX12-NEXT: s_mov_b32 s5, s7
66 ; GFX12-NEXT: s_mov_b32 s7, s9
92 ; GFX9-NEXT: s_mov_b32 s5, s7
94 ; GFX9-NEXT: s_mov_b32 s7, s9
115 ; GFX10NSA-NEXT: s_mov_b32 s5, s7
117 ; GFX10NSA-NEXT: s_mov_b32 s7, s
[all...]
H A Dllvm.amdgcn.image.gather4.o.dim.ll17 ; GFX6-NEXT: s_mov_b32 s5, s7
19 ; GFX6-NEXT: s_mov_b32 s7, s9
40 ; GFX10-NEXT: s_mov_b32 s5, s7
42 ; GFX10-NEXT: s_mov_b32 s7, s9
64 ; GFX6-NEXT: s_mov_b32 s5, s7
66 ; GFX6-NEXT: s_mov_b32 s7, s9
87 ; GFX10-NEXT: s_mov_b32 s5, s7
89 ; GFX10-NEXT: s_mov_b32 s7, s9
111 ; GFX6-NEXT: s_mov_b32 s5, s7
113 ; GFX6-NEXT: s_mov_b32 s7, s9
[all …]
H A Dllvm.amdgcn.image.store.2d.d16.ll17 ; UNPACKED-NEXT: s_mov_b32 s5, s7
19 ; UNPACKED-NEXT: s_mov_b32 s7, s9
30 ; GFX81-NEXT: s_mov_b32 s5, s7
32 ; GFX81-NEXT: s_mov_b32 s7, s9
47 ; UNPACKED-NEXT: s_mov_b32 s5, s7
49 ; UNPACKED-NEXT: s_mov_b32 s7, s9
61 ; GFX81-NEXT: s_mov_b32 s5, s7
63 ; GFX81-NEXT: s_mov_b32 s7, s9
80 ; UNPACKED-NEXT: s_mov_b32 s5, s7
82 ; UNPACKED-NEXT: s_mov_b32 s7, s9
[all …]
H A Dllvm.amdgcn.image.load.2d.ll15 ; GFX6-NEXT: s_mov_b32 s5, s7
17 ; GFX6-NEXT: s_mov_b32 s7, s9
29 ; GFX10PLUS-NEXT: s_mov_b32 s5, s7
31 ; GFX10PLUS-NEXT: s_mov_b32 s7, s9
43 ; GFX12-NEXT: s_mov_b32 s5, s7
45 ; GFX12-NEXT: s_mov_b32 s7, s9
63 ; GFX6-NEXT: s_mov_b32 s5, s7
65 ; GFX6-NEXT: s_mov_b32 s7, s9
95 ; GFX10-NEXT: s_mov_b32 s5, s7
97 ; GFX10-NEXT: s_mov_b32 s7, s9
[all …]
/llvm-project/mlir/include/mlir/Dialect/Linalg/IR/
H A DLinalgNamedStructuredOps.yaml2595 shape_map: affine_map<()[s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10] -> (s0,
2596 s1 * s2 + s3 * s4, s5 * s6 + s7 * s8, s9)>
2601 shape_map: affine_map<()[s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10] -> (s3,
2602 s7, s9, s10)>
2607 shape_map: affine_map<()[s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10] -> (s0,
2612 index_attr_map: affine_map<()[s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10] ->
2620 index_attr_map: affine_map<()[s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10] ->
2627 - affine_map<(d0, d1, d2, d3, d4, d5, d6)[s0, s1, s2, s3, s4, s5, s6, s7, s8,
2629 - affine_map<(d0, d1, d2, d3, d4, d5, d6)[s0, s1, s2, s3, s4, s5, s6, s7, s8,
2631 - affine_map<(d0, d1, d2, d3, d4, d5, d6)[s0, s1, s2, s3, s4, s5, s6, s7, s
[all...]
/llvm-project/clang/test/OpenMP/
H A Dtaskgroup_ast_print.cpp27 class S7 : public T { class
31 S7() : a(0) {} in S7() function in S7
34 S7(typename T::type v) : a(v) { in S7() function in S7
39 S7 &operator=(S7 &s) { in operator =()
51 class S8 : public S7<S1> {
55 S8(int v) : S7<S1>(v){ in S8()
56 #pragma omp taskgroup task_reduction(^ : S7 < S1 > ::a) task_reduction(+ : S7 < S1 > ::b[ : S7 < S1… in S8()
68 …K: #pragma omp taskgroup task_reduction(^: this->S7<S1>::a) task_reduction(+: this->S7<S1>::b[:thi…
H A Dtarget_update_from_messages.cpp57 struct S7 { struct
68 struct S7* S; argument
100 S7 s7; in tmain() local
129 #pragma omp target update from(s7.i, s7.a[:3]) in tmain()
130 #pragma omp target update from(s7.s6[1].aa[0:5]) in tmain()
131 #pragma omp target update from(x, s7.s6[:5].aa[6]) // expected-error {{OpenMP array section is not … in tmain()
132 #pragma omp target update from(x, s7.s6[:5].aa[:6]) // expected-error {{OpenMP array section is not… in tmain()
133 #pragma omp target update from(s7.p[:10]) in tmain()
134 #pragma omp target update from(x, s7.bfa) // expected-error {{bit fields cannot be used to specify … in tmain()
135 #pragma omp target update from(x, s7.p[:]) // expected-error {{section length is unspecified and ca… in tmain()
[all …]
H A Dtarget_update_to_messages.cpp58 struct S7 { struct
69 struct S7* S; argument
106 S7 s7; in tmain() local
134 #pragma omp target update to(s7.i, s7.a[:3]) in tmain()
135 #pragma omp target update to(s7.s6[1].aa[0:5]) in tmain()
136 #pragma omp target update to(x, s7.s6[:5].aa[6]) // expected-error {{OpenMP array section is not al… in tmain()
137 #pragma omp target update to(x, s7.s6[:5].aa[:6]) // expected-error {{OpenMP array section is not a… in tmain()
138 #pragma omp target update to(s7.p[:10]) in tmain()
139 #pragma omp target update to(x, s7.bfa) // expected-error {{bit fields cannot be used to specify st… in tmain()
140 #pragma omp target update to(x, s7.p[:]) // expected-error {{section length is unspecified and cann… in tmain()
[all …]
/llvm-project/llvm/test/MC/ARM/
H A Dneon-vcvt-fp16.s6 @ CHECK-FP16: vcvtt.f32.f16 s7, s1 @ encoding: [0xe0,0x3a,0xf2,0xee]
8 vcvtt.f32.f16 s7, s1
9 @ CHECK-FP16: vcvtt.f16.f32 s1, s7 @ encoding: [0xe3,0x0a,0xf3,0xee]
11 vcvtt.f16.f32 s1, s7
13 @ CHECK-FP16: vcvtb.f32.f16 s7, s1 @ encoding: [0x60,0x3a,0xf2,0xee]
15 vcvtb.f32.f16 s7, s1
16 @ CHECK-FP16: vcvtb.f16.f32 s1, s7 @ encoding: [0x63,0x0a,0xf3,0xee]
18 vcvtb.f16.f32 s1, s7
/llvm-project/llvm/test/CodeGen/AArch64/
H A Dstorepairsuppress.ll53 ; SUPPRESS-NEXT: ldp s6, s7, [x8, #16]
60 ; SUPPRESS-NEXT: fadd s17, s3, s7
63 ; SUPPRESS-NEXT: fsub s3, s7, s3
66 ; SUPPRESS-NEXT: ldp s7, s16, [x9]
68 ; SUPPRESS-NEXT: fmul s17, s7, s17
69 ; SUPPRESS-NEXT: fnmsub s7, s7, s4, s18
71 ; SUPPRESS-NEXT: fadd s16, s7, s1
74 ; SUPPRESS-NEXT: fsub s1, s1, s7
107 ; SUPPRESS-NEXT: ldp s6, s7, [x8, #48]
114 ; SUPPRESS-NEXT: fadd s17, s0, s7
[all …]

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