/freebsd-src/sys/contrib/device-tree/Bindings/usb/ |
H A D | ci-hdrc-usb2.txt | 4 - compatible: should be one of: 5 "fsl,imx23-usb" 6 "fsl,imx27-usb" 7 "fsl,imx28-usb" 8 "fsl,imx6q-usb" 9 "fsl,imx6sl-usb" 10 "fsl,imx6sx-usb" 11 "fsl,imx6ul-usb" 12 "fsl,imx7d-usb" 13 "fsl,imx7ulp-usb" [all …]
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H A D | ci-hdrc-usb2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/ci-hdr [all...] |
/freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cell [all...] |
H A D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size [all...] |
H A D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gi [all...] |
H A D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gi [all...] |
H A D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6ul-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gi [all...] |
H A D | imx7ulp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright 2017-2018 NXP 8 #include <dt-bindings/clock/imx7ulp-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include "imx7ulp-pinfunc.h" 15 interrupt-parent = <&intc>; 17 #address-cells = <1>; 18 #size-cells = <1>; 37 #address-cells = <1>; [all …]
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/freebsd-src/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8dxl-ss-conn.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /delete-node/ &enet1_lpcg; 7 /delete-node/ &fec2; 10 conn_enet0_root_clk: clock-conn-enet0-root { 11 compatible = "fixed-clock"; 12 #clock-cell [all...] |
H A D | imx8-ss-conn.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 10 conn_axi_clk: clock-conn-axi { 11 compatible = "fixed-cloc [all...] |
/freebsd-src/sys/contrib/dev/athk/ath11k/ |
H A D | debugfs_htt_stats.h | 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 146 /* Length should be multiple of DWORD */ 209 /* NOTE: Variable length TLV, use length spec to infer array size */ 215 /* NOTE: Variable length TLV, use length spec to infer array size */ 221 /* NOTE: Variable length TLV, use length spec to infer array size */ 227 /* NOTE: Variable length TLV, use length spec to infer array size */ 233 /* NOTE: Variable length TLV, use length spec to infer array size */ 247 /* NOTE: Variable length TLV, use length spec to infer array size . 253 * The histogram bins are 0-29, 30-59, 60-89 and so on. The are [all …]
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/freebsd-src/sys/contrib/dev/iwlwifi/fw/api/ |
H A D | location.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 3 * Copyright (C) 2015-2017 Intel Deutschland GmbH 4 * Copyright (C) 2018-2022 Intel Corporation 11 * enum iwl_location_subcmd_ids - location group command IDs 86 * struct iwl_tof_config_cmd - ToF configuration 88 * @one_sided_disabled: indicates if one-side 1696 __le32 size; global() member [all...] |
H A D | mac.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 3 * Copyright (C) 2012-2014, 2018-2022, 2024 Intel Corporation 11 * AUX indices follows - 1 for non-CDB, 2 for CDB. 31 * enum iwl_mac_protection_flags - MA [all...] |
/freebsd-src/sys/dev/msk/ |
H A D | if_mskreg.h | 17 * are provided to you under the BSD-type license terms provided 22 * - Redistributions of source code must retain the above copyright 24 * - Redistributions in binary form must reproduce the above 28 * - Neither the name of Marvell nor the names of its contributors 48 /*- 49 * SPDX-License-Identifier: BSD-4-Clause AND BSD-3-Clause 65 * 4. Neither the name of the author nor the names of any co-contributors 82 /*- 110 * D-Link PCI vendor ID 154 * D-Link gigabit ethernet device ID [all …]
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/freebsd-src/sys/net80211/ |
H A D | _ieee80211.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 5 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 53 * PHY mode; this is not really a mode as multi-mode devices 100 IEEE80211_PROT_RTSCTS = 2, /* RTS-CTS */ 113 IEEE80211_AUTH_SHARED = 2, /* shared-key */ 115 IEEE80211_AUTH_AUTO = 4, /* auto-select/accept */ 177 #define IEEE80211_CHAN_DYN 0x00000400 /* Dynamic CCK-OFDM channel */ 242 (((_c)->ic_flags & IEEE80211_CHAN_FHSS) == IEEE80211_CHAN_FHSS) 244 (((_c)->ic_flags & IEEE80211_CHAN_A) == IEEE80211_CHAN_A) [all …]
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/freebsd-src/sys/dev/ocs_fc/ |
H A D | ocs_scsi.c | 1 /*- 49 #define SCSI_ITT_SIZE(ocs) ((ocs->ocs_xport == OCS_XPORT_FC) ? 4 : 8) 51 … SCSI_IOFMT_ARGS(io) io->instance_index, SCSI_ITT_SIZE(io->ocs), io->init_task_tag, SCSI_ITT_SIZE(… 53 #define enable_tsend_auto_resp(ocs) ((ocs->ctrlmask & OCS_CTRLMASK_XPORT_DISABLE_AUTORSP_TSEND) ==… 54 #define enable_treceive_auto_resp(ocs) ((ocs->ctrlmask & OCS_CTRLMASK_XPORT_DISABLE_AUTORSP_TRECEIV… 56 #define scsi_io_printf(io, fmt, ...) ocs_log_info(io->ocs, "[%s]" SCSI_IOFMT fmt, \ 57 io->node->display_name, SCSI_IOFMT_ARGS(io), ##__VA_ARGS__) 61 if (OCS_LOG_ENABLE_SCSI_TRACE(io->ocs)) \ 91 * @brief Returns a big-endian 32-bit value given a pointer. 93 * @param p Pointer to the 32-bit big-endian location. [all …]
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/freebsd-src/sys/dev/e1000/ |
H A D | e1000_regs.h | 2 SPDX-License-Identifier: BSD-3-Clause 4 Copyright (c) 2001-2020, Intel Corporation 38 #define E1000_CTRL 0x00000 /* Device Control - RW */ 39 #define E1000_CTRL_DUP 0x00004 /* Device Control Duplicate (Shadow) - RW */ 40 #define E1000_STATUS 0x00008 /* Device Status - RO */ 41 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */ 42 #define E1000_EERD 0x00014 /* EEPROM Read - RW */ 43 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */ 44 #define E1000_FLA 0x0001C /* Flash Access - RW */ 45 #define E1000_MDIC 0x00020 /* MDI Control - RW */ [all …]
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/freebsd-src/sys/dev/my/ |
H A D | if_myreg.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 33 #define MY_PAR0 0x0 /* physical address 0-3 */ 34 #define MY_PAR1 0x04 /* physical address 4-5 */ 35 #define MY_MAR0 0x08 /* multicast address 0-3 */ 36 #define MY_MAR1 0x0C /* multicast address 4-7 */ 37 #define MY_FAR0 0x10 /* flow-control address 0-3 */ 38 #define MY_FAR1 0x14 /* flow-control address 4-5 */ 61 #define MY_RBLEN 0x00000800 /* receive burst length enable */ 103 #define MY_PBL1 0x00000000 /* 1 dword */ [all …]
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/freebsd-src/sys/contrib/dev/rtw89/ |
H A D | core.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2019-2020 Realtek Corporation 243 .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4, in rtw89_traffic_stats_accu() 255 .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4, in rtw89_traffic_stats_accu() 262 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; in rtw89_get_default_chandef() 264 if (tx && ieee80211_is_assoc_req(hdr->frame_contro 1022 u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET, desc_info->wp_offset) | rtw89_build_txwd_body0() local 1036 u32 dword = FIELD_PREP(RTW89_TXWD_BODY0_WP_OFFSET_V1, desc_info->wp_offset) | rtw89_build_txwd_body0_v1() local 1048 u32 dword = FIELD_PREP(RTW89_TXWD_BODY1_ADDR_INFO_NUM, desc_info->addr_info_nr) | rtw89_build_txwd_body1_v1() local 1057 u32 dword = FIELD_PREP(RTW89_TXWD_BODY2_TID_INDICATE, desc_info->tid_indicate) | rtw89_build_txwd_body2() local 1067 u32 dword = FIELD_PREP(RTW89_TXWD_BODY3_SW_SEQ, desc_info->seq) | rtw89_build_txwd_body3() local 1076 u32 dword = FIELD_PREP(RTW89_TXWD_BODY4_SEC_IV_L0, desc_info->sec_seq[0]) | rtw89_build_txwd_body4() local 1084 u32 dword = FIELD_PREP(RTW89_TXWD_BODY5_SEC_IV_H2, desc_info->sec_seq[2]) | rtw89_build_txwd_body5() local 1094 u32 dword = FIELD_PREP(RTW89_TXWD_BODY7_USE_RATE_V1, desc_info->use_rate) | rtw89_build_txwd_body7_v1() local 1102 u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_USE_RATE, desc_info->use_rate) | rtw89_build_txwd_info0() local 1112 u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) | rtw89_build_txwd_info0_v1() local 1122 u32 dword = FIELD_PREP(RTW89_TXWD_INFO1_MAX_AGGNUM, desc_info->ampdu_num) | rtw89_build_txwd_info1() local 1132 u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) | rtw89_build_txwd_info2() local 1142 u32 dword = FIELD_PREP(RTW89_TXWD_INFO2_AMPDU_DENSITY, desc_info->ampdu_density) | rtw89_build_txwd_info2_v1() local 1151 u32 dword = FIELD_PREP(RTW89_TXWD_INFO4_RTS_EN, 1) | rtw89_build_txwd_info4() local 1210 u32 dword = FIELD_PREP(AX_RXD_RPKT_LEN_MASK, desc_info->pkt_size) | rtw89_build_txwd_fwcmd0_v1() local 2723 rtw89_core_acquire_bit_map(unsigned long * addr,unsigned long size) rtw89_core_acquire_bit_map() argument 3370 u32 size = sizeof(struct ieee80211_supported_band); rtw89_core_set_supported_band() local [all...] |
/freebsd-src/sys/contrib/dev/athk/ath10k/ |
H A D | wmi.h | 1 /* SPDX-License-Identifier: ISC */ 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 28 * 1. Add new WMI commands ONLY within the specified range - 0x9000 - 0x9fff 44 * variable is already 4-byte aligned by virtue of being a u32 526 * for wmi_services is 64 as target is using only 4-bits of each 32-bit 532 __le32_to_cpu((wmi_svc_bmap)[((svc_id) - (len)) / 28]) & \ 533 BIT(((((svc_id) - (len)) % 28) & 0x1f) + 4)) 1159 /** DFS-specific commands */ [all …]
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/freebsd-src/sys/dev/iwm/ |
H A D | if_iwmreg.h | 10 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 35 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. 73 * BEGIN iwl-csr.h 81 * low power states due to driver-invoked device resets 82 * (e.g. IWM_CSR_RESET_REG_FLAG_SW_RESET) or uCode-driven power-saving modes. 95 #define IWM_CSR_INT_COALESCING (0x004) /* accum ints, 32-usec units */ 109 * 31-16: Reserved 110 * 15- 1047 uint8_t size; global() member 3720 struct iwm_statistics_rx rx; global() member [all...] |
/freebsd-src/sys/dev/ice/ |
H A D | ice_common.c | 1 /* SPDX-License-Identifier: BSD-3-Clause */ 127 * ice_dump_phy_type - helper function to dump phy_type in ice_dump_phy_type() 158 * ice_set_mac_type - Sets MAC type in ice_set_mac_type() 168 if (hw->vendor_id != ICE_INTEL_VENDOR_ID) in ice_set_mac_type() 171 switch (hw->device_id) { in ice_set_mac_type() 178 hw->mac_type = ICE_MAC_E810; in ice_set_mac_type() 199 hw->mac_typ in ice_set_mac_type() [all...] |
/freebsd-src/sys/dev/ixgbe/ |
H A D | ixgbe_type.h | 2 SPDX-License-Identifier: BSD-3-Clause 4 Copyright (c) 2001-2020, Intel Corporation 42 * - IXGBE_ERROR_INVALID_STATE 48 * - IXGBE_ERROR_POLLING 53 * - IXGBE_ERROR_CAUTION 58 * - IXGBE_ERROR_SOFTWARE 64 * - IXGBE_ERROR_ARGUMEN 3622 __be32 dword; global() member 4205 u16 size; global() member [all...] |
H A D | ixgbe_common.c | 2 SPDX-License-Identifier: BSD-3-Clause 4 Copyright (c) 2001-2020, Intel Corporation 64 * ixgbe_init_ops_generic - Inits function ptrs 71 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_ops_generic() 72 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_ops_generic() 78 eeprom->ops.init_params = ixgbe_init_eeprom_params_generic; in ixgbe_init_ops_generic() 81 eeprom->op in ixgbe_init_ops_generic() [all...] |
/freebsd-src/sys/dev/qlnx/qlnxe/ |
H A D | reg_addr.h | 2 * Copyright (c) 2017-2018 Cavium, Inc. 54 …L //Access:RW DataWidth:0x4 // DBMUX register. Bit mask for enabling dword (128bit line) / qw… 55 … 0x001d1cUL //Access:RW DataWidth:0x2 // DBMUX register. Circular dword (128bit line) / qw… 56 …idth:0x4 // DBMUX register. Bit mask for forcing the valid signal per dword (128bit line) / qw… 57 …Width:0x4 // DBMUX register. bit mask for forcing the frame signal per dword (128bit line) / qw… 73 … Mask memory read Bit3 : Mask memory write Bit2 : Mask Completion Bit1 : Mask TX Bit0 : Mask RX 74 … 0x00381cUL //Access:R DataWidth:0x20 // Number of RX tlp are received 75 … 0x003820UL //Access:R DataWidth:0x20 // Byte number of RX are received 78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl… 79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea… [all …]
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