1f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0+ 2f126890aSEmmanuel Vadot/* 3f126890aSEmmanuel Vadot * Copyright (C) 2016 Freescale Semiconductor, Inc. 4f126890aSEmmanuel Vadot * Copyright 2017-2018 NXP 5f126890aSEmmanuel Vadot * Dong Aisheng <aisheng.dong@nxp.com> 6f126890aSEmmanuel Vadot */ 7f126890aSEmmanuel Vadot 8f126890aSEmmanuel Vadot#include <dt-bindings/clock/imx7ulp-clock.h> 9f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 10f126890aSEmmanuel Vadot#include <dt-bindings/interrupt-controller/arm-gic.h> 11f126890aSEmmanuel Vadot 12f126890aSEmmanuel Vadot#include "imx7ulp-pinfunc.h" 13f126890aSEmmanuel Vadot 14f126890aSEmmanuel Vadot/ { 15f126890aSEmmanuel Vadot interrupt-parent = <&intc>; 16f126890aSEmmanuel Vadot 17f126890aSEmmanuel Vadot #address-cells = <1>; 18f126890aSEmmanuel Vadot #size-cells = <1>; 19f126890aSEmmanuel Vadot 20f126890aSEmmanuel Vadot aliases { 21f126890aSEmmanuel Vadot gpio0 = &gpio_ptc; 22f126890aSEmmanuel Vadot gpio1 = &gpio_ptd; 23f126890aSEmmanuel Vadot gpio2 = &gpio_pte; 24f126890aSEmmanuel Vadot gpio3 = &gpio_ptf; 25f126890aSEmmanuel Vadot i2c0 = &lpi2c6; 26f126890aSEmmanuel Vadot i2c1 = &lpi2c7; 27f126890aSEmmanuel Vadot mmc0 = &usdhc0; 28f126890aSEmmanuel Vadot mmc1 = &usdhc1; 29f126890aSEmmanuel Vadot serial0 = &lpuart4; 30f126890aSEmmanuel Vadot serial1 = &lpuart5; 31f126890aSEmmanuel Vadot serial2 = &lpuart6; 32f126890aSEmmanuel Vadot serial3 = &lpuart7; 33f126890aSEmmanuel Vadot usbphy0 = &usbphy1; 34f126890aSEmmanuel Vadot }; 35f126890aSEmmanuel Vadot 36f126890aSEmmanuel Vadot cpus { 37f126890aSEmmanuel Vadot #address-cells = <1>; 38f126890aSEmmanuel Vadot #size-cells = <0>; 39f126890aSEmmanuel Vadot 40f126890aSEmmanuel Vadot cpu0: cpu@f00 { 41f126890aSEmmanuel Vadot compatible = "arm,cortex-a7"; 42f126890aSEmmanuel Vadot device_type = "cpu"; 43f126890aSEmmanuel Vadot reg = <0xf00>; 44f126890aSEmmanuel Vadot }; 45f126890aSEmmanuel Vadot }; 46f126890aSEmmanuel Vadot 47f126890aSEmmanuel Vadot intc: interrupt-controller@40021000 { 48f126890aSEmmanuel Vadot compatible = "arm,cortex-a7-gic"; 49f126890aSEmmanuel Vadot #interrupt-cells = <3>; 50f126890aSEmmanuel Vadot interrupt-controller; 51f126890aSEmmanuel Vadot reg = <0x40021000 0x1000>, 52f126890aSEmmanuel Vadot <0x40022000 0x1000>; 53f126890aSEmmanuel Vadot }; 54f126890aSEmmanuel Vadot 55f126890aSEmmanuel Vadot rosc: clock-rosc { 56f126890aSEmmanuel Vadot compatible = "fixed-clock"; 57f126890aSEmmanuel Vadot clock-frequency = <32768>; 58f126890aSEmmanuel Vadot clock-output-names = "rosc"; 59f126890aSEmmanuel Vadot #clock-cells = <0>; 60f126890aSEmmanuel Vadot }; 61f126890aSEmmanuel Vadot 62f126890aSEmmanuel Vadot sosc: clock-sosc { 63f126890aSEmmanuel Vadot compatible = "fixed-clock"; 64f126890aSEmmanuel Vadot clock-frequency = <24000000>; 65f126890aSEmmanuel Vadot clock-output-names = "sosc"; 66f126890aSEmmanuel Vadot #clock-cells = <0>; 67f126890aSEmmanuel Vadot }; 68f126890aSEmmanuel Vadot 69f126890aSEmmanuel Vadot sirc: clock-sirc { 70f126890aSEmmanuel Vadot compatible = "fixed-clock"; 71f126890aSEmmanuel Vadot clock-frequency = <16000000>; 72f126890aSEmmanuel Vadot clock-output-names = "sirc"; 73f126890aSEmmanuel Vadot #clock-cells = <0>; 74f126890aSEmmanuel Vadot }; 75f126890aSEmmanuel Vadot 76f126890aSEmmanuel Vadot firc: clock-firc { 77f126890aSEmmanuel Vadot compatible = "fixed-clock"; 78f126890aSEmmanuel Vadot clock-frequency = <48000000>; 79f126890aSEmmanuel Vadot clock-output-names = "firc"; 80f126890aSEmmanuel Vadot #clock-cells = <0>; 81f126890aSEmmanuel Vadot }; 82f126890aSEmmanuel Vadot 83f126890aSEmmanuel Vadot upll: clock-upll { 84f126890aSEmmanuel Vadot compatible = "fixed-clock"; 85f126890aSEmmanuel Vadot clock-frequency = <480000000>; 86f126890aSEmmanuel Vadot clock-output-names = "upll"; 87f126890aSEmmanuel Vadot #clock-cells = <0>; 88f126890aSEmmanuel Vadot }; 89f126890aSEmmanuel Vadot 90f126890aSEmmanuel Vadot ahbbridge0: bus@40000000 { 91f126890aSEmmanuel Vadot compatible = "simple-bus"; 92f126890aSEmmanuel Vadot #address-cells = <1>; 93f126890aSEmmanuel Vadot #size-cells = <1>; 94f126890aSEmmanuel Vadot reg = <0x40000000 0x800000>; 95f126890aSEmmanuel Vadot ranges; 96f126890aSEmmanuel Vadot 97f126890aSEmmanuel Vadot edma1: dma-controller@40080000 { 98f126890aSEmmanuel Vadot #dma-cells = <2>; 99f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-edma"; 100f126890aSEmmanuel Vadot reg = <0x40080000 0x2000>, 101f126890aSEmmanuel Vadot <0x40210000 0x1000>; 102f126890aSEmmanuel Vadot dma-channels = <32>; 103f126890aSEmmanuel Vadot interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 104f126890aSEmmanuel Vadot <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 105f126890aSEmmanuel Vadot <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 106f126890aSEmmanuel Vadot <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 107f126890aSEmmanuel Vadot <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 108f126890aSEmmanuel Vadot <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, 109f126890aSEmmanuel Vadot <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 110f126890aSEmmanuel Vadot <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, 111f126890aSEmmanuel Vadot <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 112f126890aSEmmanuel Vadot <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 113f126890aSEmmanuel Vadot <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, 114f126890aSEmmanuel Vadot <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 115f126890aSEmmanuel Vadot <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 116f126890aSEmmanuel Vadot <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 117f126890aSEmmanuel Vadot <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 118f126890aSEmmanuel Vadot <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 119f126890aSEmmanuel Vadot <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 120f126890aSEmmanuel Vadot clock-names = "dma", "dmamux0"; 121f126890aSEmmanuel Vadot clocks = <&pcc2 IMX7ULP_CLK_DMA1>, 122f126890aSEmmanuel Vadot <&pcc2 IMX7ULP_CLK_DMA_MUX1>; 123f126890aSEmmanuel Vadot }; 124f126890aSEmmanuel Vadot 125f126890aSEmmanuel Vadot crypto: crypto@40240000 { 126f126890aSEmmanuel Vadot compatible = "fsl,sec-v4.0"; 127f126890aSEmmanuel Vadot #address-cells = <1>; 128f126890aSEmmanuel Vadot #size-cells = <1>; 129f126890aSEmmanuel Vadot reg = <0x40240000 0x10000>; 130f126890aSEmmanuel Vadot ranges = <0 0x40240000 0x10000>; 131f126890aSEmmanuel Vadot clocks = <&pcc2 IMX7ULP_CLK_CAAM>, 132f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>; 133f126890aSEmmanuel Vadot clock-names = "aclk", "ipg"; 134f126890aSEmmanuel Vadot 135f126890aSEmmanuel Vadot sec_jr0: jr@1000 { 136f126890aSEmmanuel Vadot compatible = "fsl,sec-v4.0-job-ring"; 137f126890aSEmmanuel Vadot reg = <0x1000 0x1000>; 138f126890aSEmmanuel Vadot interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; 139f126890aSEmmanuel Vadot }; 140f126890aSEmmanuel Vadot 141f126890aSEmmanuel Vadot sec_jr1: jr@2000 { 142f126890aSEmmanuel Vadot compatible = "fsl,sec-v4.0-job-ring"; 143f126890aSEmmanuel Vadot reg = <0x2000 0x1000>; 144f126890aSEmmanuel Vadot interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; 145f126890aSEmmanuel Vadot }; 146f126890aSEmmanuel Vadot }; 147f126890aSEmmanuel Vadot 148f126890aSEmmanuel Vadot lpuart4: serial@402d0000 { 149f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-lpuart"; 150f126890aSEmmanuel Vadot reg = <0x402d0000 0x1000>; 151f126890aSEmmanuel Vadot interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 152f126890aSEmmanuel Vadot clocks = <&pcc2 IMX7ULP_CLK_LPUART4>; 153f126890aSEmmanuel Vadot clock-names = "ipg"; 154f126890aSEmmanuel Vadot assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART4>; 155f126890aSEmmanuel Vadot assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>; 156f126890aSEmmanuel Vadot assigned-clock-rates = <24000000>; 157f126890aSEmmanuel Vadot status = "disabled"; 158f126890aSEmmanuel Vadot }; 159f126890aSEmmanuel Vadot 160f126890aSEmmanuel Vadot lpuart5: serial@402e0000 { 161f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-lpuart"; 162f126890aSEmmanuel Vadot reg = <0x402e0000 0x1000>; 163f126890aSEmmanuel Vadot interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 164f126890aSEmmanuel Vadot clocks = <&pcc2 IMX7ULP_CLK_LPUART5>; 165f126890aSEmmanuel Vadot clock-names = "ipg"; 166f126890aSEmmanuel Vadot assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART5>; 167f126890aSEmmanuel Vadot assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>; 168f126890aSEmmanuel Vadot assigned-clock-rates = <48000000>; 169f126890aSEmmanuel Vadot status = "disabled"; 170f126890aSEmmanuel Vadot }; 171f126890aSEmmanuel Vadot 172f126890aSEmmanuel Vadot tpm4: pwm@40250000 { 173f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-pwm"; 174f126890aSEmmanuel Vadot reg = <0x40250000 0x1000>; 175f126890aSEmmanuel Vadot assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>; 176f126890aSEmmanuel Vadot assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>; 177f126890aSEmmanuel Vadot clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>; 178f126890aSEmmanuel Vadot #pwm-cells = <3>; 179f126890aSEmmanuel Vadot status = "disabled"; 180f126890aSEmmanuel Vadot }; 181f126890aSEmmanuel Vadot 182f126890aSEmmanuel Vadot tpm5: tpm@40260000 { 183f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-tpm"; 184f126890aSEmmanuel Vadot reg = <0x40260000 0x1000>; 185f126890aSEmmanuel Vadot interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 186f126890aSEmmanuel Vadot clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>, 187f126890aSEmmanuel Vadot <&pcc2 IMX7ULP_CLK_LPTPM5>; 188f126890aSEmmanuel Vadot clock-names = "ipg", "per"; 189f126890aSEmmanuel Vadot }; 190f126890aSEmmanuel Vadot 191f126890aSEmmanuel Vadot usbotg1: usb@40330000 { 192f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb", "fsl,imx27-usb"; 193f126890aSEmmanuel Vadot reg = <0x40330000 0x200>; 194f126890aSEmmanuel Vadot interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 195f126890aSEmmanuel Vadot clocks = <&pcc2 IMX7ULP_CLK_USB0>; 196f126890aSEmmanuel Vadot phys = <&usbphy1>; 197f126890aSEmmanuel Vadot fsl,usbmisc = <&usbmisc1 0>; 198f126890aSEmmanuel Vadot ahb-burst-config = <0x0>; 199f126890aSEmmanuel Vadot tx-burst-size-dword = <0x8>; 200f126890aSEmmanuel Vadot rx-burst-size-dword = <0x8>; 201f126890aSEmmanuel Vadot status = "disabled"; 202f126890aSEmmanuel Vadot }; 203f126890aSEmmanuel Vadot 204f126890aSEmmanuel Vadot usbmisc1: usbmisc@40330200 { 205f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-usbmisc", "fsl,imx7d-usbmisc", 206f126890aSEmmanuel Vadot "fsl,imx6q-usbmisc"; 207f126890aSEmmanuel Vadot #index-cells = <1>; 208f126890aSEmmanuel Vadot reg = <0x40330200 0x200>; 209f126890aSEmmanuel Vadot }; 210f126890aSEmmanuel Vadot 211f126890aSEmmanuel Vadot usbphy1: usb-phy@40350000 { 212*84943d6fSEmmanuel Vadot compatible = "fsl,imx7ulp-usbphy"; 213f126890aSEmmanuel Vadot reg = <0x40350000 0x1000>; 214f126890aSEmmanuel Vadot interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 215f126890aSEmmanuel Vadot clocks = <&pcc2 IMX7ULP_CLK_USB_PHY>; 216f126890aSEmmanuel Vadot #phy-cells = <0>; 217f126890aSEmmanuel Vadot }; 218f126890aSEmmanuel Vadot 219f126890aSEmmanuel Vadot usdhc0: mmc@40370000 { 220f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-usdhc", "fsl,imx6sx-usdhc"; 221f126890aSEmmanuel Vadot reg = <0x40370000 0x10000>; 222f126890aSEmmanuel Vadot interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 223f126890aSEmmanuel Vadot clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>, 224f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_NIC1_DIV>, 225f126890aSEmmanuel Vadot <&pcc2 IMX7ULP_CLK_USDHC0>; 226f126890aSEmmanuel Vadot clock-names = "ipg", "ahb", "per"; 227f126890aSEmmanuel Vadot bus-width = <4>; 228f126890aSEmmanuel Vadot fsl,tuning-start-tap = <20>; 229f126890aSEmmanuel Vadot fsl,tuning-step = <2>; 230f126890aSEmmanuel Vadot status = "disabled"; 231f126890aSEmmanuel Vadot }; 232f126890aSEmmanuel Vadot 233f126890aSEmmanuel Vadot usdhc1: mmc@40380000 { 234f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-usdhc", "fsl,imx6sx-usdhc"; 235f126890aSEmmanuel Vadot reg = <0x40380000 0x10000>; 236f126890aSEmmanuel Vadot interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 237f126890aSEmmanuel Vadot clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>, 238f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_NIC1_DIV>, 239f126890aSEmmanuel Vadot <&pcc2 IMX7ULP_CLK_USDHC1>; 240f126890aSEmmanuel Vadot clock-names = "ipg", "ahb", "per"; 241f126890aSEmmanuel Vadot bus-width = <4>; 242f126890aSEmmanuel Vadot fsl,tuning-start-tap = <20>; 243f126890aSEmmanuel Vadot fsl,tuning-step = <2>; 244f126890aSEmmanuel Vadot status = "disabled"; 245f126890aSEmmanuel Vadot }; 246f126890aSEmmanuel Vadot 247f126890aSEmmanuel Vadot scg1: clock-controller@403e0000 { 248f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-scg1"; 249f126890aSEmmanuel Vadot reg = <0x403e0000 0x10000>; 250f126890aSEmmanuel Vadot clocks = <&rosc>, <&sosc>, <&sirc>, 251f126890aSEmmanuel Vadot <&firc>, <&upll>; 252f126890aSEmmanuel Vadot clock-names = "rosc", "sosc", "sirc", 253f126890aSEmmanuel Vadot "firc", "upll"; 254f126890aSEmmanuel Vadot #clock-cells = <1>; 255f126890aSEmmanuel Vadot }; 256f126890aSEmmanuel Vadot 257f126890aSEmmanuel Vadot wdog1: watchdog@403d0000 { 258f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-wdt"; 259f126890aSEmmanuel Vadot reg = <0x403d0000 0x10000>; 260f126890aSEmmanuel Vadot interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 261f126890aSEmmanuel Vadot clocks = <&pcc2 IMX7ULP_CLK_WDG1>; 262f126890aSEmmanuel Vadot assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>; 263f126890aSEmmanuel Vadot assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>; 264f126890aSEmmanuel Vadot timeout-sec = <40>; 265f126890aSEmmanuel Vadot }; 266f126890aSEmmanuel Vadot 267f126890aSEmmanuel Vadot pcc2: clock-controller@403f0000 { 268f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-pcc2"; 269f126890aSEmmanuel Vadot reg = <0x403f0000 0x10000>; 270f126890aSEmmanuel Vadot #clock-cells = <1>; 271f126890aSEmmanuel Vadot clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>, 272f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_NIC1_DIV>, 273f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_DDR_DIV>, 274f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_APLL_PFD2>, 275f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_APLL_PFD1>, 276f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_APLL_PFD0>, 277f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_UPLL>, 278f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>, 279f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>, 280f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_ROSC>, 281f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_SPLL_BUS_CLK>; 282f126890aSEmmanuel Vadot clock-names = "nic1_bus_clk", "nic1_clk", "ddr_clk", 283f126890aSEmmanuel Vadot "apll_pfd2", "apll_pfd1", "apll_pfd0", 284f126890aSEmmanuel Vadot "upll", "sosc_bus_clk", 285f126890aSEmmanuel Vadot "firc_bus_clk", "rosc", "spll_bus_clk"; 286f126890aSEmmanuel Vadot assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM5>; 287f126890aSEmmanuel Vadot assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>; 288f126890aSEmmanuel Vadot }; 289f126890aSEmmanuel Vadot 290f126890aSEmmanuel Vadot smc1: clock-controller@40410000 { 291f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-smc1"; 292f126890aSEmmanuel Vadot reg = <0x40410000 0x1000>; 293f126890aSEmmanuel Vadot #clock-cells = <1>; 294f126890aSEmmanuel Vadot clocks = <&scg1 IMX7ULP_CLK_CORE_DIV>, 295f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_HSRUN_CORE_DIV>; 296f126890aSEmmanuel Vadot clock-names = "divcore", "hsrun_divcore"; 297f126890aSEmmanuel Vadot }; 298f126890aSEmmanuel Vadot 299f126890aSEmmanuel Vadot pcc3: clock-controller@40b30000 { 300f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-pcc3"; 301f126890aSEmmanuel Vadot reg = <0x40b30000 0x10000>; 302f126890aSEmmanuel Vadot #clock-cells = <1>; 303f126890aSEmmanuel Vadot clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>, 304f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_NIC1_DIV>, 305f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_DDR_DIV>, 306f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_APLL_PFD2>, 307f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_APLL_PFD1>, 308f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_APLL_PFD0>, 309f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_UPLL>, 310f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>, 311f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>, 312f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_ROSC>, 313f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_SPLL_BUS_CLK>; 314f126890aSEmmanuel Vadot clock-names = "nic1_bus_clk", "nic1_clk", "ddr_clk", 315f126890aSEmmanuel Vadot "apll_pfd2", "apll_pfd1", "apll_pfd0", 316f126890aSEmmanuel Vadot "upll", "sosc_bus_clk", 317f126890aSEmmanuel Vadot "firc_bus_clk", "rosc", "spll_bus_clk"; 318f126890aSEmmanuel Vadot }; 319f126890aSEmmanuel Vadot }; 320f126890aSEmmanuel Vadot 321f126890aSEmmanuel Vadot ahbbridge1: bus@40800000 { 322f126890aSEmmanuel Vadot compatible = "simple-bus"; 323f126890aSEmmanuel Vadot #address-cells = <1>; 324f126890aSEmmanuel Vadot #size-cells = <1>; 325f126890aSEmmanuel Vadot reg = <0x40800000 0x800000>; 326f126890aSEmmanuel Vadot ranges; 327f126890aSEmmanuel Vadot 328f126890aSEmmanuel Vadot lpi2c6: i2c@40a40000 { 329f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-lpi2c"; 330f126890aSEmmanuel Vadot reg = <0x40a40000 0x10000>; 331f126890aSEmmanuel Vadot interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 332f126890aSEmmanuel Vadot clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>, 333f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>; 334f126890aSEmmanuel Vadot clock-names = "per", "ipg"; 335f126890aSEmmanuel Vadot assigned-clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>; 336f126890aSEmmanuel Vadot assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>; 337f126890aSEmmanuel Vadot assigned-clock-rates = <48000000>; 338f126890aSEmmanuel Vadot status = "disabled"; 339f126890aSEmmanuel Vadot }; 340f126890aSEmmanuel Vadot 341f126890aSEmmanuel Vadot lpi2c7: i2c@40a50000 { 342f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-lpi2c"; 343f126890aSEmmanuel Vadot reg = <0x40a50000 0x10000>; 344f126890aSEmmanuel Vadot interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 345f126890aSEmmanuel Vadot clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>, 346f126890aSEmmanuel Vadot <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>; 347f126890aSEmmanuel Vadot clock-names = "per", "ipg"; 348f126890aSEmmanuel Vadot assigned-clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>; 349f126890aSEmmanuel Vadot assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>; 350f126890aSEmmanuel Vadot assigned-clock-rates = <48000000>; 351f126890aSEmmanuel Vadot status = "disabled"; 352f126890aSEmmanuel Vadot }; 353f126890aSEmmanuel Vadot 354f126890aSEmmanuel Vadot lpuart6: serial@40a60000 { 355f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-lpuart"; 356f126890aSEmmanuel Vadot reg = <0x40a60000 0x1000>; 357f126890aSEmmanuel Vadot interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 358f126890aSEmmanuel Vadot clocks = <&pcc3 IMX7ULP_CLK_LPUART6>; 359f126890aSEmmanuel Vadot clock-names = "ipg"; 360f126890aSEmmanuel Vadot assigned-clocks = <&pcc3 IMX7ULP_CLK_LPUART6>; 361f126890aSEmmanuel Vadot assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>; 362f126890aSEmmanuel Vadot assigned-clock-rates = <48000000>; 363f126890aSEmmanuel Vadot status = "disabled"; 364f126890aSEmmanuel Vadot }; 365f126890aSEmmanuel Vadot 366f126890aSEmmanuel Vadot lpuart7: serial@40a70000 { 367f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-lpuart"; 368f126890aSEmmanuel Vadot reg = <0x40a70000 0x1000>; 369f126890aSEmmanuel Vadot interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 370f126890aSEmmanuel Vadot clocks = <&pcc3 IMX7ULP_CLK_LPUART7>; 371f126890aSEmmanuel Vadot clock-names = "ipg"; 372f126890aSEmmanuel Vadot assigned-clocks = <&pcc3 IMX7ULP_CLK_LPUART7>; 373f126890aSEmmanuel Vadot assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>; 374f126890aSEmmanuel Vadot assigned-clock-rates = <48000000>; 375f126890aSEmmanuel Vadot status = "disabled"; 376f126890aSEmmanuel Vadot }; 377f126890aSEmmanuel Vadot 378f126890aSEmmanuel Vadot memory-controller@40ab0000 { 379f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-mmdc", "fsl,imx6q-mmdc"; 380f126890aSEmmanuel Vadot reg = <0x40ab0000 0x1000>; 381f126890aSEmmanuel Vadot clocks = <&pcc3 IMX7ULP_CLK_MMDC>; 382f126890aSEmmanuel Vadot }; 383f126890aSEmmanuel Vadot 384f126890aSEmmanuel Vadot iomuxc1: pinctrl@40ac0000 { 385f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-iomuxc1"; 386f126890aSEmmanuel Vadot reg = <0x40ac0000 0x1000>; 387f126890aSEmmanuel Vadot }; 388f126890aSEmmanuel Vadot 389f126890aSEmmanuel Vadot gpio_ptc: gpio@40ae0000 { 390f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-gpio", "fsl,vf610-gpio"; 391f126890aSEmmanuel Vadot reg = <0x40ae0000 0x1000 0x400f0000 0x40>; 392f126890aSEmmanuel Vadot gpio-controller; 393f126890aSEmmanuel Vadot #gpio-cells = <2>; 394f126890aSEmmanuel Vadot interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 395f126890aSEmmanuel Vadot interrupt-controller; 396f126890aSEmmanuel Vadot #interrupt-cells = <2>; 397f126890aSEmmanuel Vadot clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>, 398f126890aSEmmanuel Vadot <&pcc3 IMX7ULP_CLK_PCTLC>; 399f126890aSEmmanuel Vadot clock-names = "gpio", "port"; 400f126890aSEmmanuel Vadot gpio-ranges = <&iomuxc1 0 0 20>; 401f126890aSEmmanuel Vadot }; 402f126890aSEmmanuel Vadot 403f126890aSEmmanuel Vadot gpio_ptd: gpio@40af0000 { 404f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-gpio", "fsl,vf610-gpio"; 405f126890aSEmmanuel Vadot reg = <0x40af0000 0x1000 0x400f0040 0x40>; 406f126890aSEmmanuel Vadot gpio-controller; 407f126890aSEmmanuel Vadot #gpio-cells = <2>; 408f126890aSEmmanuel Vadot interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 409f126890aSEmmanuel Vadot interrupt-controller; 410f126890aSEmmanuel Vadot #interrupt-cells = <2>; 411f126890aSEmmanuel Vadot clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>, 412f126890aSEmmanuel Vadot <&pcc3 IMX7ULP_CLK_PCTLD>; 413f126890aSEmmanuel Vadot clock-names = "gpio", "port"; 414f126890aSEmmanuel Vadot gpio-ranges = <&iomuxc1 0 32 12>; 415f126890aSEmmanuel Vadot }; 416f126890aSEmmanuel Vadot 417f126890aSEmmanuel Vadot gpio_pte: gpio@40b00000 { 418f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-gpio", "fsl,vf610-gpio"; 419f126890aSEmmanuel Vadot reg = <0x40b00000 0x1000 0x400f0080 0x40>; 420f126890aSEmmanuel Vadot gpio-controller; 421f126890aSEmmanuel Vadot #gpio-cells = <2>; 422f126890aSEmmanuel Vadot interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 423f126890aSEmmanuel Vadot interrupt-controller; 424f126890aSEmmanuel Vadot #interrupt-cells = <2>; 425f126890aSEmmanuel Vadot clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>, 426f126890aSEmmanuel Vadot <&pcc3 IMX7ULP_CLK_PCTLE>; 427f126890aSEmmanuel Vadot clock-names = "gpio", "port"; 428f126890aSEmmanuel Vadot gpio-ranges = <&iomuxc1 0 64 16>; 429f126890aSEmmanuel Vadot }; 430f126890aSEmmanuel Vadot 431f126890aSEmmanuel Vadot gpio_ptf: gpio@40b10000 { 432f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-gpio", "fsl,vf610-gpio"; 433f126890aSEmmanuel Vadot reg = <0x40b10000 0x1000 0x400f00c0 0x40>; 434f126890aSEmmanuel Vadot gpio-controller; 435f126890aSEmmanuel Vadot #gpio-cells = <2>; 436f126890aSEmmanuel Vadot interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 437f126890aSEmmanuel Vadot interrupt-controller; 438f126890aSEmmanuel Vadot #interrupt-cells = <2>; 439f126890aSEmmanuel Vadot clocks = <&pcc2 IMX7ULP_CLK_RGPIO2P1>, 440f126890aSEmmanuel Vadot <&pcc3 IMX7ULP_CLK_PCTLF>; 441f126890aSEmmanuel Vadot clock-names = "gpio", "port"; 442f126890aSEmmanuel Vadot gpio-ranges = <&iomuxc1 0 96 20>; 443f126890aSEmmanuel Vadot }; 444f126890aSEmmanuel Vadot }; 445f126890aSEmmanuel Vadot 446f126890aSEmmanuel Vadot m4aips1: bus@41080000 { 447f126890aSEmmanuel Vadot compatible = "simple-bus"; 448f126890aSEmmanuel Vadot #address-cells = <1>; 449f126890aSEmmanuel Vadot #size-cells = <1>; 450f126890aSEmmanuel Vadot reg = <0x41080000 0x80000>; 451f126890aSEmmanuel Vadot ranges; 452f126890aSEmmanuel Vadot 453f126890aSEmmanuel Vadot sim: sim@410a3000 { 454f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-sim", "syscon"; 455f126890aSEmmanuel Vadot reg = <0x410a3000 0x1000>; 456f126890aSEmmanuel Vadot }; 457f126890aSEmmanuel Vadot 458f126890aSEmmanuel Vadot ocotp: efuse@410a6000 { 459f126890aSEmmanuel Vadot compatible = "fsl,imx7ulp-ocotp", "syscon"; 460f126890aSEmmanuel Vadot reg = <0x410a6000 0x4000>; 461f126890aSEmmanuel Vadot clocks = <&scg1 IMX7ULP_CLK_DUMMY>; 462f126890aSEmmanuel Vadot #address-cells = <1>; 463f126890aSEmmanuel Vadot #size-cells = <1>; 464f126890aSEmmanuel Vadot }; 465f126890aSEmmanuel Vadot }; 466f126890aSEmmanuel Vadot}; 467