| /freebsd-src/sys/contrib/device-tree/Bindings/display/ |
| H A D | xylon,logicvc-display.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
16 with Xilinx Zynq-7000 SoCs and Xilinx FPGAs.
20 synthesis time. As a result, many of the device-tree bindings are meant to
24 Layers are declared in the "layers" sub-node and have dedicated configuration.
25 In version 3 of the controller, each layer has fixed memory offset and address
26 starting from the video memory base address for its framebuffer. In version 4,
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| H A D | zte,vou.txt | 4 Graphic Layer (GL) and Video Layer (VL), two Mixers/Channels, and a few blocks
10 It must be the parent node of all the sub-device nodes.
13 - compatible: should be "zte,zx296718-vou"
14 - #address-cells: should be <1>
15 - #size-cells: should be <1>
16 - ranges: list of address translations between VOU and sub-devices
21 - compatible: should be "zte,zx296718-dpc"
22 - reg: Physical base address and length of DPC register regions, one for each
23 entry in 'reg-names'
24 - reg-names: The names of register regions. The following regions are required:
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| /freebsd-src/contrib/llvm-project/compiler-rt/lib/ubsan/ |
| H A D | ubsan_type_hash_itanium.cpp | 1 //===-- ubsan_type_hash_itanium.cpp --------
130 isDerivedFromAtOffset(const abi::__class_type_info * Derived,const abi::__class_type_info * Base,sptr Offset) isDerivedFromAtOffset() argument
131 isDerivedFromAtOffset(const abi::__class_type_info * Derived,const abi::__class_type_info * Base,sptr Offset) isDerivedFromAtOffset() argument
147 for (unsigned int base = 0; base != VTI->base_count; ++base) { isDerivedFromAtOffset() local
169 findBaseAtOffset(const abi::__class_type_info * Derived,sptr Offset) findBaseAtOffset() argument
183 for (unsigned int base = 0; base != VTI->base_count; ++base) { findBaseAtOffset() local
190 if (const abi::__class_type_info *Base = findBaseAtOffset() local
205 sptr Offset; global() member
249 abi::__class_type_info *Base = (abi::__class_type_info*)Type; checkDynamicType() local
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| /freebsd-src/sys/contrib/device-tree/Bindings/display/mediatek/ |
| H A D | mediatek,padding.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
14 Padding provides ability to add pixels to width and height of a layer with
16 width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled,
24 - mediatek,mt8188-disp-padding
25 - mediatek,mt8195-mdp3-padding
30 power-domains:
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| /freebsd-src/sys/contrib/alpine-hal/ |
| H A D | al_hal_udma.h | 1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
60 /* *INDENT-OFF* */
64 /* *INDENT-ON* */
78 /* Statistics - TBD */
88 /* TX Meta, used by upper layer */
132 /* TX/RX descriptor Target-ID field (in the buffer address 64 bit field) */
170 * Target-ID to be assigned to the block descriptors
171 * Requires Target-ID in descriptor to be enabled for the specific UDMA
194 /** UDMA Q specific parameters from upper layer */
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| H A D | al_hal_udma_iofic.h | 1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
56 /* *INDENT-OFF* */
60 /* *INDENT-ON* */
69 AL_IOFIC_MODE_LEGACY, /**< level-sensitive interrupt wire */
70 AL_IOFIC_MODE_MSIX_PER_Q, /**< per UDMA queue MSI-X interrupt */
82 * interrupt controller of each bus-master unit in the I/O Fabric.
255 * layer (RAID, Ethernet etc)
261 * Application layer (RAID, Ethernet etc)
267 * Application layer (RAID, Ethernet etc)
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| /freebsd-src/contrib/llvm-project/lldb/source/Plugins/TraceExporter/common/ |
| H A D | TraceHTR.h | 1 //===-- TraceHTR.h --------------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
71 /// Function calls are identified in the instruction layer by finding 'call'
93 /// Constructor for a block of an HTR layer.
95 /// \param[in] offset
96 /// The offset of the start of this block in the previous layer.
100 /// layer.
104 HTRBlock(size_t offset, size_t size, HTRBlockMetadata metadata) in HTRBlock() argument
105 : m_offset(offset), m_size(size), m_metadata(metadata) {} in HTRBlock()
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| /freebsd-src/sys/dev/cxgb/common/ |
| H A D | cxgb_ctl_defs.h | 2 * Copyright (C) 2003-2006 Chelsio Communications. All rights reserved.
46 * Structure used to describe a TID range. Valid TIDs are [base, base+num).
49 unsigned int base; /* first TID */ member
88 * Structure used to return information to the iscsi layer.
91 unsigned int offset; member
113 * Structure used to return information to the RDMA layer.
116 unsigned int tpt_base; /* TPT base address */
118 unsigned int pbl_base; /* PBL base address */
120 unsigned int rqt_base; /* RQT base address */
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| /freebsd-src/sys/contrib/device-tree/Bindings/media/ |
| H A D | ti,cal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments DRA72x CAMERA ADAPTATION LAYER (CAL)
10 - Benoit Parrot <bparrot@ti.com>
12 description: |-
13 The Camera Adaptation Layer (CAL) is a key component for image capture
15 processing capability to connect CSI2 image-sensor modules to the
24 - ti,dra72-cal
26 - ti,dra72-pre-es2-cal
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| /freebsd-src/sys/dev/altera/jtag_uart/ |
| H A D | altera_jtag_uart.h | |
| /freebsd-src/sys/contrib/device-tree/Bindings/phy/ |
| H A D | phy-mtk-tphy.txt | 1 MediaTek T-PHY binding
2 --------------------------
4 T-phy controller supports physical layer functionality for a number of
8 - compatible : should be one of
9 "mediatek,generic-tphy-v1"
10 "mediatek,generic-tphy-v2"
11 "mediatek,mt2701-u3phy" (deprecated)
12 "mediatek,mt2712-u3phy" (deprecated)
13 "mediatek,mt8173-u3phy";
14 make use of "mediatek,generic-tphy-v1" on mt2701 instead and
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| /freebsd-src/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | st,spear3xx-shirq.txt | 1 * SPEAr Shared IRQ layer (shirq)
16 For example, a 32-bit interrupt enable/disable config register can
20 - compatible: should be, either of
21 - "st,spear300-shirq"
22 - "st,spear310-shirq"
23 - "st,spear320-shirq"
24 - interrupt-controller: Identifies the node as an interrupt controller.
25 - #interrupt-cells: should be <1> which basically contains the offset
27 - reg: Base address and size of shirq registers.
28 - interrupts: The list of interrupts generated by the groups which are
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| /freebsd-src/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/ |
| H A D | Store.cpp | 1 //===- Store.cpp - Interface for maps from Locations to Values --------
60 MakeElementRegion(const SubRegion * Base,QualType EleTy,uint64_t index) MakeElementRegion() argument
260 for (const CXXBaseSpecifier *Base : Cast->path()) { evalDerivedToBase() local
316 evalBaseToDerived(SVal Base,QualType TargetType) evalBaseToDerived() argument
398 getLValueFieldOrIvar(const Decl * D,SVal Base) getLValueFieldOrIvar() argument
439 getLValueIvar(const ObjCIvarDecl * decl,SVal base) getLValueIvar() argument
443 getLValueElement(QualType elementType,NonLoc Offset,SVal Base) getLValueElement() argument
444 getLValueElement(QualType elementType,NonLoc Offset,SVal Base) getLValueElement() argument
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| /freebsd-src/sys/dev/mvs/ |
| H A D | mvs.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
42 #define IC_HC0 0x000001ff /* bits 0-8 = HC0 */
44 #define IC_HC1 (IC_HC0 << IC_HC_SHIFT) /* 9-17 = HC1 */
58 #define IC_MAIN_RSVD (0xfe000000) /* bits 31-25 */
59 #define IC_MAIN_RSVD_5 (0xfff10000) /* bits 31-19 */
60 #define IC_MAIN_RSVD_SOC (0xfffffec0) /* bits 31-9, 7-6 */
65 #define CHIP_SOC_HC0_MASK(num) (0xff >> ((4 - (num)) * 2))
87 #define HC_RQOP 0x4 /* Request Queue Out-Pointer */
88 #define HC_RQIP 0x8 /* Response Queue In-Pointer */
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| /freebsd-src/sys/dev/pms/RefTisa/sallsdk/api/ |
| H A D | sa.h | 2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved.
35 /* TestBase needed to have the 'Multi-Data fetch disable' feature */
39 (bitptr)&(((STRUCT_TYPE *)0)->FEILD)
43 #define OSSA_WRITE_LE_16(AGROOT, DMA_ADDR, OFFSET, VALUE16) \ argument
44 (*((bit16 *)(((bit8 *)DMA_ADDR)+(OFFSET)))) = (bit16)(VALUE16);
46 #define OSSA_WRITE_LE_32(AGROOT, DMA_ADDR, OFFSET, VALUE32) \ argument
47 (*((bit32 *)(((bit8 *)DMA_ADDR)+(OFFSET)))) = (bit32)(VALUE32);
49 #define OSSA_READ_LE_16(AGROOT, ADDR16, DMA_ADDR, OFFSET) \ argument
50 (*((bit16 *)ADDR16)) = (*((bit16 *)(((bit8 *)DMA_ADDR)+(OFFSET))))
52 #define OSSA_READ_LE_32(AGROOT, ADDR32, DMA_ADDR, OFFSET) \ argument
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| /freebsd-src/share/man/man4/ |
| H A D | fusefs.4 | 2 .\" SPDX-License-Identifier: BSD-2-Clause
37 .Bd -ragged -offset indent
52 in kernel-mode, for example.
64 .Bl -tag -width indent
72 will cache file data for pre-7.23 file systems.
75 A value of 1 will select write-through caching.
76 Reads will be cached in the VFS layer as usual.
78 A value of 2 will select write-back caching.
81 Write-back caching is usually unsafe, especially for FUSE file systems that
85 on a per-mountpoint basis, ignoring this sysctl.
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| H A D | carp.4 | 46 Additional parameters can also be set on a per-vhid basis:
59 .Dq "advertisement base" .
60 It is measured in seconds and specifies the base of the advertisement interval.
66 It is added to the base advertisement interval to make one host advertise
97 can be configured to use either the non-standard CARP protocol, or VRRPv3 (RFC 5798).
107 CARP virtual hosts can be configured on multicast-capable interfaces: Ethernet,
108 layer 2 VLAN, FDDI and Token Ring.
120 .Bl -tag -width ".Va net.inet.carp.ifdown_demotion_factor"
188 .\"For load-balancing operation, one needs several CARP interfaces that
249 .Bd -literal -offset indent
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| /freebsd-src/share/doc/papers/fsinterface/ |
| H A D | fsinterface.ms | 32 \s-1UNIX\s0\\$1\(dg
34 \(dg \s-1UNIX\s0 is a registered trademark of AT&T.
66 Each design attempts to isolate filesystem-dependent details
102 AT&T's recently-announced Remote File Sharing, RFS [Rifkin86],
108 system [Weinberger84] and two different filesystems used at Carnegie-Mellon
122 with carefully-defined entry points to separate the filesystem from the rest
130 A clean, well-defined interface to the filesystem also allows a single
135 The best-known of these are Sun Microsystems' Virtual File System interface,
155 Each attempts to divide the filesystem into a filesystem-type-independent
156 layer and individual filesystem implementations.
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| /freebsd-src/sys/powerpc/aim/ |
| H A D | locore64.S | 2 /*-
3 * Copyright (C) 2010-2016 Nathan Whitehorn
76 * that it ends up before any linker-generated call stubs and actually at
86 . = kbootentry + 0x40 /* Magic address used in platform layer */
89 .long -1
94 /* Invalidate icache for low-memory copy and jump there */
141 /* Set 64-bit mode if not yet set before branching to C */
154 .llong __tocbase + 0x8000 - .
159 /* Get load offset */
160 ld %r31,-0x8000(%r2) /* First TOC entry is TOC base */
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| /freebsd-src/sys/contrib/dev/mediatek/mt76/mt7996/ |
| H A D | mmio.c | 1 // SPDX-License-Identifier: ISC
82 u32 offset = FIELD_GET(MT_HIF_REMAP_L1_OFFSET, addr); in mt7996_reg_map_l1() local
83 u32 base = FIELD_GET(MT_HIF_REMAP_L1_BASE, addr); in mt7996_reg_map_l1() local
85 dev->reg_l1_backup = dev->bus_ops->rr(&dev->mt76, MT_HIF_REMAP_L1); in mt7996_reg_map_l1()
86 dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_L1, in mt7996_reg_map_l1()
88 FIELD_PREP(MT_HIF_REMAP_L1_MASK, base)); in mt7996_reg_map_l1()
90 dev->bus_ops->rr(&dev->mt76, MT_HIF_REMAP_L1); in mt7996_reg_map_l1()
92 return MT_HIF_REMAP_BASE_L1 + offset; in mt7996_reg_map_l1()
97 u32 offset = FIELD_GET(MT_HIF_REMAP_L2_OFFSET, addr); in mt7996_reg_map_l2() local
98 u32 base = FIELD_GET(MT_HIF_REMAP_L2_BASE, addr); in mt7996_reg_map_l2() local
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| /freebsd-src/stand/libsa/ |
| H A D | libsa.3 | 50 .Bl -hang -width 10n
58 bytes of memory from the heap using a best-fit algorithm.
97 to the traditional shell-supported environment.
100 .Bl -hang -width 10n
159 .Bl -hang -width 10n
170 .Fn strtol "const char *nptr" "char **endptr" "int base"
174 .Fn strtoll "const char *nptr" "char **endptr" "int base"
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| /freebsd-src/sys/dev/cas/ |
| H A D | if_casreg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * from: FreeBSD: if_gemreg.h 174987 2007-12-30 01:32:03Z marius
84 * Bits 0-9 of CAS_STATUS auto-clear when read. CAS_CLEAR_ALIAS specifies
85 * which of bits 0-9 auto-clear when reading CAS_STATUS_ALIAS.
116 #define CAS_BIM_CONF_BD64_DIS 0x00000004 /* 64-bit mode disable */
118 #define CAS_BIM_CONF_BUS32_WIDE 0x00000010 /* PCI bus is 32-bit (ro). */
161 * interrupt bits for CAS_INTMASK[2-4], CAS_STATUS[2-4], CAS_CLEAR_ALIAS[2-4]
162 * and CAS_STATUS_ALIAS[2-4].
163 * CAS_STATUS[2-4] auto-clear when read. CAS_CLEAR_ALIAS[2-4] specifies which
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| /freebsd-src/sys/x86/include/ |
| H A D | segments.h | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
58 * For long-mode apps, %cs only has the conforming bit in sd_type, the sd_dpl,
63 unsigned sd_lobase:24; /* segment base address (lsb) */
71 unsigned sd_hibase:8; /* segment base address (msb) */
76 unsigned sd_lobase:24; /* segment base address (lsb) */
85 unsigned sd_hibase:8; /* segment base address (msb) */
88 #define USD_GETBASE(sd) (((sd)->sd_lobase) | (sd)->sd_hibase << 24)
89 #define USD_SETBASE(sd, b) (sd)->sd_lobase = (b); \
90 (sd)->sd_hibase = ((b) >> 24);
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| /freebsd-src/sys/fs/unionfs/ |
| H A D | union_subr.c | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 1994 Jan-Simon Pendry
11 * Jan-Simon Pendry.
66 #define UNIONFSHASHMASK (NUNIONFSNODECACHE - 1)
122 MPASS(unp->un_dvp != NULL); in unionfs_deferred_rele()
123 vrele(unp->un_dv in unionfs_deferred_rele()
1255 off_t offset; unionfs_copyfile_core() local
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| /freebsd-src/contrib/libpcap/ |
| H A D | gencode.c | 45 #include "pcap-dos.h"
48 #include "pcap-int.h"
64 #include "diag-control.h"
75 #define offsetof(s, e) ((size_t)&((s *)0)->e)
105 uint16_t sin6_port; /* Transport layer port # */
152 #include "os-proto.h"
158 * "Push" the current value of the link-layer header type and link-layer
1026 gen_cmp(compiler_state_t * cstate,enum e_offrel offrel,u_int offset,u_int size,bpf_u_int32 v) gen_cmp() argument
1033 gen_cmp_gt(compiler_state_t * cstate,enum e_offrel offrel,u_int offset,u_int size,bpf_u_int32 v) gen_cmp_gt() argument
1040 gen_cmp_ge(compiler_state_t * cstate,enum e_offrel offrel,u_int offset,u_int size,bpf_u_int32 v) gen_cmp_ge() argument
1047 gen_cmp_lt(compiler_state_t * cstate,enum e_offrel offrel,u_int offset,u_int size,bpf_u_int32 v) gen_cmp_lt() argument
1054 gen_cmp_le(compiler_state_t * cstate,enum e_offrel offrel,u_int offset,u_int size,bpf_u_int32 v) gen_cmp_le() argument
1061 gen_mcmp(compiler_state_t * cstate,enum e_offrel offrel,u_int offset,u_int size,bpf_u_int32 v,bpf_u_int32 mask) gen_mcmp() argument
1068 gen_bcmp(compiler_state_t * cstate,enum e_offrel offrel,u_int offset,u_int size,const u_char * v) gen_bcmp() argument
1110 gen_ncmp(compiler_state_t * cstate,enum e_offrel offrel,u_int offset,u_int size,bpf_u_int32 mask,int jtype,int reverse,bpf_u_int32 v) gen_ncmp() argument
1733 gen_load_absoffsetrel(compiler_state_t * cstate,bpf_abs_offset * abs_offset,u_int offset,u_int size) gen_load_absoffsetrel() argument
1772 gen_load_a(compiler_state_t * cstate,enum e_offrel offrel,u_int offset,u_int size) gen_load_a() argument
4023 u_int offset; gen_hostop() local
4089 u_int offset; gen_hostop6() local
8021 gen_mac_multicast(compiler_state_t * cstate,int offset) gen_mac_multicast() argument
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