/freebsd-src/sys/contrib/device-tree/Bindings/mailbox/ |
H A D | mtk-gce.txt | 1 MediaTek GCE 4 The Global Command Engine (GCE) is used to help read/write registers with 6 vblank. The GCE can be used to implement the Command Queue (CMDQ) driver. 9 mailbox.txt for generic information about mailbox device-tree bindings. 12 - compatible: can be "mediatek,mt8173-gce", "mediatek,mt8183-gce", 13 "mediatek,mt8186-gce", "mediatek,mt8192-gce", "mediatek,mt8195-gce" or 14 "mediatek,mt6779-gce". 15 - reg: Address range of the GCE unit 16 - interrupts: The interrupt signal from the GCE block 17 - clock: Clocks according to the common clock binding [all …]
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/freebsd-src/sys/contrib/device-tree/Bindings/media/ |
H A D | mediatek,mdp3-rsz.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-rsz.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <matthias.bgg@gmail.com> 11 - Moudy Ho <moudy.ho@mediatek.com> 19 - enum: 20 - mediatek,mt8183-mdp3-rsz 21 - items: 22 - enum: [all …]
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H A D | mediatek,mdp3-wrot.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-wrot.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <matthias.bgg@gmail.com> 11 - Moudy Ho <moudy.ho@mediatek.com> 19 - enum: 20 - mediatek,mt8183-mdp3-wrot 21 - items: 22 - enum: [all …]
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H A D | mediatek,mdp3-rdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-rdm [all...] |
H A D | mediatek,mdp3-tdshp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-tdshp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek Media Data Path 3 Two-Dimensional Sharpness 10 - Matthias Brugger <matthias.bgg@gmail.com> 11 - Moudy Ho <moudy.ho@mediatek.com> 14 Two-Dimensional Sharpness (TDSHP) is a Media Profile Path 3 (MDP3) component 20 - mediatek,mt8195-mdp3-tdshp 22 reg: [all …]
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H A D | mediatek,mdp3-fg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-fg.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <matthias.bgg@gmail.com> 11 - Moudy Ho <moudy.ho@mediatek.com> 20 - mediatek,mt8195-mdp3-fg 22 reg: 25 mediatek,gce-client-reg: 27 The register of display function block to be set by gce. There are 4 arguments, [all …]
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H A D | mediatek,mdp3-hdr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-hdr.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <matthias.bgg@gmail.com> 11 - Moudy Ho <moudy.ho@mediatek.com> 20 - mediatek,mt8195-mdp3-hdr 22 reg: 25 mediatek,gce-client-reg: 27 The register of display function block to be set by gce. There are 4 arguments, [all …]
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H A D | mediatek,mdp3-stitch.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-stitch.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <matthias.bgg@gmail.com> 11 - Moudy Ho <moudy.ho@mediatek.com> 20 - mediatek,mt8195-mdp3-stitch 22 reg: 25 mediatek,gce-client-reg: 27 The register of display function block to be set by gce. There are 4 arguments, [all …]
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H A D | mediatek,mdp3-tcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-tcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <matthias.bgg@gmail.com> 21 - mediatek,mt8195-mdp3-tcc 23 reg: 26 mediatek,gce-client-reg: 28 The register of display function block to be set by gce. There are 4 arguments, 29 such as gce node, subsys id, offset and register size. The subsys id that is [all …]
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/freebsd-src/sys/contrib/device-tree/Bindings/soc/mediatek/ |
H A D | mediatek,ccorr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <matthias.bgg@gmail.com> 11 - Moudy Ho <moudy.ho@mediatek.com> 19 - enum: 20 - mediatek,mt8183-mdp3-ccorr 22 reg: 25 mediatek,gce-client-reg: 26 $ref: /schemas/types.yaml#/definitions/phandle-array [all …]
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H A D | mediatek,wdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <matthias.bgg@gmail.com> 11 - Moudy Ho <moudy.ho@mediatek.com> 20 - enum: 21 - mediatek,mt8183-mdp3-wdma 23 reg: 26 mediatek,gce-client-reg: 27 $ref: /schemas/types.yaml#/definitions/phandle-array [all …]
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/freebsd-src/sys/contrib/device-tree/Bindings/display/mediatek/ |
H A D | mediatek,padding.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 16 width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled, 24 - mediatek,mt8188-disp-padding 25 - mediatek,mt8195-mdp3-padding 27 reg: 30 power-domains: [all …]
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H A D | mediatek,postmask.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 24 - enum: 25 - mediatek,mt8192-disp-postmask 26 - items: 27 - enum: 28 - mediatek,mt8186-disp-postmask [all …]
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H A D | mediatek,gamma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
H A D | mediatek,dither.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
H A D | mediatek,ccorr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
H A D | mediatek,wdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 24 - enum: 25 - mediatek,mt8173-disp-wdma 26 - items: 27 - const: mediatek,mt6795-disp-wdma 28 - const: mediatek,mt8173-disp-wdma [all …]
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H A D | mediatek,mdp-rdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 15 It provides real time data to the back-end panel driver, such as DSI, 24 const: mediatek,mt8195-vdo1-rdma 26 reg: 32 power-domains: [all …]
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H A D | mediatek,color.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
H A D | mediatek,aal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
H A D | mediatek,ovl-2l.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,ovl-2l.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 14 Mediatek display overlay 2 layer, namely OVL-2L, provides 2 more layer 16 OVL-2L device node must be siblings to the central MMSYS_CONFIG node. 24 - enum: 25 - mediatek,mt8183-disp-ovl-2l [all …]
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H A D | mediatek,ovl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
H A D | mediatek,dsc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 17 video bit stream. DSC is designed for real-time systems with 18 real-time compression, transmission, decompression and Display. 23 - enum: 24 - mediatek,mt8195-disp-dsc 26 reg: [all …]
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/freebsd-src/sys/contrib/device-tree/Bindings/arm/mediatek/ |
H A D | mediatek,mmsys.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <matthias.bgg@gmail.com> 18 pattern: "^syscon@[0-9a-f]+$" 22 - items: 23 - enum: 24 - mediatek,mt2701-mmsys 25 - mediatek,mt2712-mmsys 26 - mediatek,mt6765-mmsys [all …]
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/freebsd-src/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt6795.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/mediatek,mt6795-clk.h> 12 #include <dt-bindings/gce/mediatek,mt6795-gce.h> 13 #include <dt-bindings/memory/mt6795-larb-port.h> 14 #include <dt-bindings/pinctrl/mt6795-pinfunc.h> 15 #include <dt-bindings/power/mt6795-power.h> 16 #include <dt-bindings/reset/mediatek,mt6795-resets.h> 20 interrupt-parent = <&sysirq>; [all …]
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