xref: /freebsd-src/sys/contrib/device-tree/Bindings/display/mediatek/mediatek,ovl-2l.yaml (revision fac71e4e09885bb2afa3d984a0c239a52e1a7418)
1c9ccf3a3SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2c9ccf3a3SEmmanuel Vadot%YAML 1.2
3c9ccf3a3SEmmanuel Vadot---
4c9ccf3a3SEmmanuel Vadot$id: http://devicetree.org/schemas/display/mediatek/mediatek,ovl-2l.yaml#
5c9ccf3a3SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6c9ccf3a3SEmmanuel Vadot
7c9ccf3a3SEmmanuel Vadottitle: Mediatek display overlay 2 layer
8c9ccf3a3SEmmanuel Vadot
9c9ccf3a3SEmmanuel Vadotmaintainers:
10c9ccf3a3SEmmanuel Vadot  - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11c9ccf3a3SEmmanuel Vadot  - Philipp Zabel <p.zabel@pengutronix.de>
12c9ccf3a3SEmmanuel Vadot
13c9ccf3a3SEmmanuel Vadotdescription: |
14c9ccf3a3SEmmanuel Vadot  Mediatek display overlay 2 layer, namely OVL-2L, provides 2 more layer
15c9ccf3a3SEmmanuel Vadot  for OVL.
16c9ccf3a3SEmmanuel Vadot  OVL-2L device node must be siblings to the central MMSYS_CONFIG node.
17c9ccf3a3SEmmanuel Vadot  For a description of the MMSYS_CONFIG binding, see
18c9ccf3a3SEmmanuel Vadot  Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
19c9ccf3a3SEmmanuel Vadot  for details.
20c9ccf3a3SEmmanuel Vadot
21c9ccf3a3SEmmanuel Vadotproperties:
22c9ccf3a3SEmmanuel Vadot  compatible:
23c9ccf3a3SEmmanuel Vadot    oneOf:
24*fac71e4eSEmmanuel Vadot      - enum:
25*fac71e4eSEmmanuel Vadot          - mediatek,mt8183-disp-ovl-2l
26*fac71e4eSEmmanuel Vadot          - mediatek,mt8192-disp-ovl-2l
27d5b0e70fSEmmanuel Vadot      - items:
28d5b0e70fSEmmanuel Vadot          - enum:
29d5b0e70fSEmmanuel Vadot              - mediatek,mt8186-disp-ovl-2l
30d5b0e70fSEmmanuel Vadot          - const: mediatek,mt8192-disp-ovl-2l
31c9ccf3a3SEmmanuel Vadot
32c9ccf3a3SEmmanuel Vadot  reg:
33c9ccf3a3SEmmanuel Vadot    maxItems: 1
34c9ccf3a3SEmmanuel Vadot
35c9ccf3a3SEmmanuel Vadot  interrupts:
36c9ccf3a3SEmmanuel Vadot    maxItems: 1
37c9ccf3a3SEmmanuel Vadot
38c9ccf3a3SEmmanuel Vadot  power-domains:
39c9ccf3a3SEmmanuel Vadot    description: A phandle and PM domain specifier as defined by bindings of
40c9ccf3a3SEmmanuel Vadot      the power controller specified by phandle. See
41c9ccf3a3SEmmanuel Vadot      Documentation/devicetree/bindings/power/power-domain.yaml for details.
42c9ccf3a3SEmmanuel Vadot
43c9ccf3a3SEmmanuel Vadot  clocks:
44c9ccf3a3SEmmanuel Vadot    items:
45c9ccf3a3SEmmanuel Vadot      - description: OVL-2L Clock
46c9ccf3a3SEmmanuel Vadot
47c9ccf3a3SEmmanuel Vadot  iommus:
48c9ccf3a3SEmmanuel Vadot    description:
49c9ccf3a3SEmmanuel Vadot      This property should point to the respective IOMMU block with master port as argument,
50c9ccf3a3SEmmanuel Vadot      see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
51c9ccf3a3SEmmanuel Vadot
52c9ccf3a3SEmmanuel Vadot  mediatek,gce-client-reg:
53c9ccf3a3SEmmanuel Vadot    description: The register of client driver can be configured by gce with
54c9ccf3a3SEmmanuel Vadot      4 arguments defined in this property, such as phandle of gce, subsys id,
55c9ccf3a3SEmmanuel Vadot      register offset and size. Each GCE subsys id is mapping to a client
56c9ccf3a3SEmmanuel Vadot      defined in the header include/dt-bindings/gce/<chip>-gce.h.
57c9ccf3a3SEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/phandle-array
58c9ccf3a3SEmmanuel Vadot    maxItems: 1
59c9ccf3a3SEmmanuel Vadot
60c9ccf3a3SEmmanuel Vadotrequired:
61c9ccf3a3SEmmanuel Vadot  - compatible
62c9ccf3a3SEmmanuel Vadot  - reg
63c9ccf3a3SEmmanuel Vadot  - interrupts
64c9ccf3a3SEmmanuel Vadot  - power-domains
65c9ccf3a3SEmmanuel Vadot  - clocks
66c9ccf3a3SEmmanuel Vadot  - iommus
67c9ccf3a3SEmmanuel Vadot
68c9ccf3a3SEmmanuel VadotadditionalProperties: false
69c9ccf3a3SEmmanuel Vadot
70c9ccf3a3SEmmanuel Vadotexamples:
71c9ccf3a3SEmmanuel Vadot  - |
72c9ccf3a3SEmmanuel Vadot    #include <dt-bindings/interrupt-controller/arm-gic.h>
73c9ccf3a3SEmmanuel Vadot    #include <dt-bindings/clock/mt8183-clk.h>
74c9ccf3a3SEmmanuel Vadot    #include <dt-bindings/power/mt8183-power.h>
75c9ccf3a3SEmmanuel Vadot    #include <dt-bindings/gce/mt8183-gce.h>
76c9ccf3a3SEmmanuel Vadot    #include <dt-bindings/memory/mt8183-larb-port.h>
77c9ccf3a3SEmmanuel Vadot
78c9ccf3a3SEmmanuel Vadot    soc {
79c9ccf3a3SEmmanuel Vadot        #address-cells = <2>;
80c9ccf3a3SEmmanuel Vadot        #size-cells = <2>;
81c9ccf3a3SEmmanuel Vadot
82c9ccf3a3SEmmanuel Vadot        ovl_2l0: ovl@14009000 {
83c9ccf3a3SEmmanuel Vadot            compatible = "mediatek,mt8183-disp-ovl-2l";
84c9ccf3a3SEmmanuel Vadot            reg = <0 0x14009000 0 0x1000>;
85c9ccf3a3SEmmanuel Vadot            interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_LOW>;
86c9ccf3a3SEmmanuel Vadot            power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
87c9ccf3a3SEmmanuel Vadot            clocks = <&mmsys CLK_MM_DISP_OVL0_2L>;
88c9ccf3a3SEmmanuel Vadot            iommus = <&iommu M4U_PORT_DISP_2L_OVL0_LARB0>;
89c9ccf3a3SEmmanuel Vadot            mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>;
90c9ccf3a3SEmmanuel Vadot        };
91c9ccf3a3SEmmanuel Vadot    };
92