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/llvm-project/llvm/test/tools/llvm-mca/ARM/
H A Dcortex-a57-neon-instructions.s919 vst1.8 {d8}, [r4]!
920 vst1.16 {d8}, [r4]!
921 vst1.32 {d8}, [r4]!
922 vst1.64 {d8}, [r4]!
923 vst1.8 {d8}, [r4], r6
924 vst1.16 {d8}, [r4], r6
925 vst1.32 {d8}, [r4], r6
926 vst1.64 {d8}, [r4], r6
927 vst1.8 {d8, d9}, [r4]!
928 vst1.16 {d8, d9}, [r4]!
[all …]
/llvm-project/clang/test/CodeGen/
H A Daarch64-ABI-align-packed-assembly.c
H A Daarch64-ABI-align-packed.c
/llvm-project/llvm/test/CodeGen/Thumb2/
H A Dmve-fmath.ll50 ; CHECK-NEXT: .vsave {d8, d9}
51 ; CHECK-NEXT: vpush {d8, d9}
55 ; CHECK-NEXT: vmov r2, r3, d8
60 ; CHECK-NEXT: vmov d8, r0, r1
62 ; CHECK-NEXT: vpop {d8, d9}
74 ; CHECK-NEXT: .vsave {d8, d9}
75 ; CHECK-NEXT: vpush {d8, d9}
82 ; CHECK-NEXT: vmov r4, r1, d8
92 ; CHECK-NEXT: vpop {d8, d9}
104 ; CHECK-NEXT: .vsave {d8, d
[all...]
H A Dmve-pred-spill.ll15 ; CHECK-LE-NEXT: .vsave {d8, d9}
16 ; CHECK-LE-NEXT: vpush {d8, d9}
37 ; CHECK-LE-NEXT: vpop {d8, d9}
44 ; CHECK-BE-NEXT: .vsave {d8, d9}
45 ; CHECK-BE-NEXT: vpush {d8, d9}
67 ; CHECK-BE-NEXT: vpop {d8, d9}
82 ; CHECK-LE-NEXT: .vsave {d8, d9}
83 ; CHECK-LE-NEXT: vpush {d8, d9}
95 ; CHECK-LE-NEXT: vpop {d8, d9}
102 ; CHECK-BE-NEXT: .vsave {d8, d
[all...]
H A Dmve-frint.ll58 ; CHECK-NEXT: .vsave {d8, d9}
59 ; CHECK-NEXT: vpush {d8, d9}
63 ; CHECK-NEXT: vmov r2, r3, d8
68 ; CHECK-NEXT: vmov d8, r0, r1
70 ; CHECK-NEXT: vpop {d8, d9}
130 ; CHECK-NEXT: .vsave {d8, d9}
131 ; CHECK-NEXT: vpush {d8, d9}
135 ; CHECK-NEXT: vmov r2, r3, d8
140 ; CHECK-NEXT: vmov d8, r0, r1
142 ; CHECK-NEXT: vpop {d8, d9}
[all …]
H A Daligned-spill.ll17 …tail call void asm sideeffect "", "~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14},~{d15}"() nounwi…
29 ; NEON: vst1.64 {d8, d9, d10, d11}, [r4:128]!
39 ; NEON: vld1.64 {d8, d9, d10, d11}, [r[[R4]]:128]!
50 tail call void asm sideeffect "", "~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14}"() nounwind
60 ; NEON: vst1.64 {d8, d9, d10, d11}, [r4:128]!
64 ; NEON: vld1.64 {d8, d9, d10, d11},
74 tail call void asm sideeffect "", "~{d8},~{d9},~{d10},~{d12},~{d13},~{d14},~{d15}"() nounwind
78 ; Aligned spilling only works for contiguous ranges starting from d8.
87 ; NEON: vst1.64 {d8, d9}, [r4:128]
90 ; NEON: vld1.64 {d8, d9},
H A Dmve-soft-float-abi.ll145 ; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11, d12, d13}
146 ; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11, d12, d13}
147 ; CHECK-MVE-NEXT: vmov d8, r0, r1
233 ; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11, d12, d13}
240 ; CHECK-BE-NEXT: .vsave {d8, d9, d10, d11, d12, d13}
241 ; CHECK-BE-NEXT: vpush {d8, d9, d10, d11, d12, d13}
330 ; CHECK-BE-NEXT: vpop {d8, d9, d10, d11, d12, d13}
355 ; CHECK-MVE-NEXT: .vsave {d8, d9}
356 ; CHECK-MVE-NEXT: vpush {d8, d9}
369 ; CHECK-MVE-NEXT: vmov r5, r1, d8
[all...]
H A Dmve-fpclamptosat_vec.ll11 ; CHECK-NEXT: .vsave {d8, d9}
12 ; CHECK-NEXT: vpush {d8, d9}
14 ; CHECK-NEXT: vmov r0, r1, d8
52 ; CHECK-NEXT: vpop {d8, d9}
81 ; CHECK-NEXT: .vsave {d8, d9}
82 ; CHECK-NEXT: vpush {d8, d9}
84 ; CHECK-NEXT: vmov r0, r1, d8
104 ; CHECK-NEXT: vpop {d8, d9}
119 ; CHECK-NEXT: .vsave {d8, d9}
120 ; CHECK-NEXT: vpush {d8, d
[all...]
/llvm-project/llvm/test/MC/Disassembler/ARM/
H A Dneont2.txt1652 # CHECK: vst1.8 {d8}, [r4]!
1654 # CHECK: vst1.16 {d8}, [r4]!
1656 # CHECK: vst1.32 {d8}, [r4]!
1658 # CHECK: vst1.64 {d8}, [r4]!
1660 # CHECK: vst1.8 {d8}, [r4], r6
1662 # CHECK: vst1.16 {d8}, [r4], r6
1664 # CHECK: vst1.32 {d8}, [r4], r6
1666 # CHECK: vst1.64 {d8}, [r4], r6
1669 # CHECK: vst1.8 {d8, d9}, [r4]!
1671 # CHECK: vst1.16 {d8, d9}, [r4]!
[all …]
H A Dneon.txt1945 # CHECK: vst1.8 {d8}, [r4]!
1947 # CHECK: vst1.16 {d8}, [r4]!
1949 # CHECK: vst1.32 {d8}, [r4]!
1951 # CHECK: vst1.64 {d8}, [r4]!
1953 # CHECK: vst1.8 {d8}, [r4], r6
1955 # CHECK: vst1.16 {d8}, [r4], r6
1957 # CHECK: vst1.32 {d8}, [r4], r6
1959 # CHECK: vst1.64 {d8}, [r4], r6
1962 # CHECK: vst1.8 {d8, d9}, [r4]!
1964 # CHECK: vst1.16 {d8, d9}, [r4]!
[all …]
/llvm-project/llvm/test/CodeGen/Hexagon/
H A Difcvt-live-subreg.mir9 # CHECK: liveins: $r0, $r1, $p0, $d8
10 # CHECK: $d8 = A2_combinew killed $r0, killed $r1
11 # CHECK: $d8 = L2_ploadrdf_io $p0, $r29, 0, implicit killed $d8
12 # CHECK: J2_jumprf killed $p0, $r31, implicit-def $pc, implicit-def $pc, implicit $d8
29 - { reg: '$d8' }
33 liveins: $r0, $r1, $p0, $d8
34 $d8 = A2_combinew killed $r0, killed $r1
46 $d8 = L2_loadrd_io $r29, 0
47 J2_jumpr killed $r31, implicit-def dead $pc, implicit killed $d8
[all...]
/llvm-project/llvm/test/MC/ARM/
H A Dvpush-vpop.s6 vpush {d8, d9, d10, d11, d12}
8 vpop {d8, d9, d10, d11, d12}
11 vpush.s8 {d8, d9, d10, d11, d12}
13 vpop.f32 {d8, d9, d10, d11, d12}
16 @ CHECK-THUMB: vpush {d8, d9, d10, d11, d12} @ encoding: [0x2d,0xed,0x0a,0x8b]
18 @ CHECK-THUMB: vpop {d8, d9, d10, d11, d12} @ encoding: [0xbd,0xec,0x0a,0x8b]
21 @ CHECK-ARM: vpush {d8, d9, d10, d11, d12} @ encoding: [0x0a,0x8b,0x2d,0xed]
23 @ CHECK-ARM: vpop {d8, d9, d10, d11, d12} @ encoding: [0x0a,0x8b,0xbd,0xec]
26 @ CHECK-THUMB: vpush {d8, d9, d10, d11, d12} @ encoding: [0x2d,0xed,0x0a,0x8b]
28 @ CHECK-THUMB: vpop {d8, d9, d10, d11, d12} @ encoding: [0xbd,0xec,0x0a,0x8b]
[all …]
H A Dsingle-precision-fp.s8 vmul.f64 d6, d7, d8
9 vnmul.f64 d8, d9, d10
17 @ CHECK-ERRORS-NEXT: vmul.f64 d6, d7, d8
19 @ CHECK-ERRORS-NEXT: vnmul.f64 d8, d9, d10
22 vmls.f64 d8, d7, d6
27 vfnma.f64 d7, d8, d9
32 @ CHECK-ERRORS-NEXT: vmls.f64 d8, d7, d6
42 @ CHECK-ERRORS-NEXT: vfnma.f64 d7, d8, d9
86 vcvt.s32.f64 d7, d8, #3
109 @ CHECK-ERRORS-NEXT: vcvt.s32.f64 d7, d8, #3
[all …]
H A Dseh-packed.s73 // CHECK-NEXT: vpush {d8}
78 // CHECK-NEXT: vpop {d8}
96 // CHECK-NEXT: vpush {d8-d9}
102 // CHECK-NEXT: vpop {d8-d9}
120 // CHECK-NEXT: vpush {d8-d9}
126 // CHECK-NEXT: vpop {d8-d9}
143 // CHECK-NEXT: vpush {d8-d14}
147 // CHECK-NEXT: vpop {d8-d14}
580 vpush {d8}
581 .seh_save_fregs {d8}
[all …]
H A Darmv8a-fpmul-error.s11 VFMSL.F16 Q0, D1, D8[0]
12 vfmal.f16 q0, d1, d8[0]
51 //CHECK-ERROR-NEXT: VFMSL.F16 Q0, D1, D8[0]
54 //CHECK-ERROR-NEXT: VFMSL.F16 Q0, D1, D8[0]
57 //CHECK-ERROR-NEXT: VFMSL.F16 Q0, D1, D8[0]
60 //CHECK-ERROR-NEXT: vfmal.f16 q0, d1, d8[0]
63 //CHECK-ERROR-NEXT: vfmal.f16 q0, d1, d8[0]
66 //CHECK-ERROR-NEXT: vfmal.f16 q0, d1, d8[0]
H A Dseh-epilog-packing.s59 // CHECK-NEXT: 0xe1 ; vpush {d8-d9}
146 vpush {d8-d9}
147 .seh_save_fregs {d8-d9}
151 vpop {d8-d9}
152 .seh_save_fregs {d8-d9}
177 vpush {d8-d9}
178 .seh_save_fregs {d8-d9}
182 vpop {d8-d9}
183 .seh_save_fregs {d8-d9}
/llvm-project/llvm/test/CodeGen/ARM/
H A Dcfi-alignment.ll11 ; CHECK: vpush {d8, d9}
14 ; CHECK: .cfi_offset d8, -32
15 call void asm sideeffect "", "~{d8},~{d9},~{d11}"()
27 ; CHECK: vpush {d8, d9}
30 ; CHECK: .cfi_offset d8, -48
31 call void asm sideeffect "", "~{d8},~{d9},~{d11}"()
40 ; CHECK: vpush {d8, d9}
42 call void asm sideeffect "", "~{d8},~{d9}"()
H A Dv7k-abi-align.ll35 ; CHECK: vpush {d8, d9}
37 ; CHECK: .cfi_offset d8, -32
41 ; CHECK: vpop {d8, d9}
45 call void asm sideeffect "", "~{r6},~{d8},~{d9}"()
53 ; adjustment needs to be performed to put d8 and d9 where they should be.
60 ; CHECK: vpush {d8, d9}
62 ; CHECK: .cfi_offset d8, -48
66 ; CHECK: vpop {d8, d9}
71 call void asm sideeffect "", "~{r4},~{r5},~{r6},~{r7},~{r8},~{d8},~{d9}"()
83 ; CHECK: vpush {d8, d
[all...]
H A Dvdiv_combine.ll113 ; CHECK-NEXT: vpush {d8, d9}
117 ; CHECK-NEXT: vmov r2, r1, d8
119 ; CHECK-NEXT: vmov.i32 d8, #0x3f000000
123 ; CHECK-NEXT: vmul.f32 d0, d9, d8
124 ; CHECK-NEXT: vpop {d8, d9}
136 ; CHECK-NEXT: vpush {d8, d9}
140 ; CHECK-NEXT: vmov r2, r3, d8
142 ; CHECK-NEXT: vmov.f64 d8, #5.000000e-01
147 ; CHECK-NEXT: vmul.f64 d1, d9, d8
148 ; CHECK-NEXT: vmul.f64 d0, d16, d8
[all …]
H A Ddwarf-unwind.ll16 ; CHECK: vpush {d8}
17 ; CHECK: .cfi_offset d8, -48
22 ; CHECK: vpop {d8}
25 call void asm sideeffect "", "~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{d8}"()
37 ; CHECK: vpush {d8}
38 ; CHECK: .cfi_offset d8, -48
43 ; CHECK: vpop {d8}
46 call void asm sideeffect "", "~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{d8}"()
81 call void asm sideeffect "", "~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{d8}"()
H A Dfpclamptosat_vec.ll12 ; CHECK-NEXT: .vsave {d8, d9}
13 ; CHECK-NEXT: vpush {d8, d9}
19 ; CHECK-NEXT: vmov r0, r1, d8
22 ; CHECK-NEXT: vmov.32 d8[0], r0
35 ; CHECK-NEXT: vmov.32 d8[1], r1
63 ; CHECK-NEXT: vpop {d8, d9}
87 ; CHECK-NEXT: .vsave {d8, d9}
88 ; CHECK-NEXT: vpush {d8, d9}
94 ; CHECK-NEXT: vmov r0, r1, d8
100 ; CHECK-NEXT: vmov.32 d8[
[all...]
H A Dllvm.exp10.ll164 ; CHECK-NEXT: vpush {d8}
165 ; CHECK-NEXT: vmov d8, r0, r1
172 ; CHECK-NEXT: vpop {d8}
182 ; CHECK-NEXT: vpush {d8, d9}
197 ; CHECK-NEXT: vmov r0, r1, d8
199 ; CHECK-NEXT: vpop {d8, d9}
210 ; CHECK-NEXT: vpush {d8, d9}
228 ; CHECK-NEXT: vmov r0, r1, d8
229 ; CHECK-NEXT: vpop {d8, d9}
277 ; CHECK-NEXT: vpush {d8, d9}
[all …]
/llvm-project/llvm/test/MC/AArch64/
H A Dseh-packed-unwind.s26 // CHECK-NEXT: stp d8, d9, [sp, #80]
46 // CHECK-NEXT: stp d8, d9, [sp, #24]
63 // CHECK-NEXT: stp d8, d9, [sp, #8]
79 // CHECK-NEXT: stp d8, d9, [sp, #-16]!
226 // CHECK-NEXT: stp d8, d9, [sp, #8]
393 stp d8, d9, [sp, #80]
394 .seh_save_fregp d8, 80
414 ldp d8, d9, [sp, #80]
415 .seh_save_fregp d8, 80
436 stp d8, d9, [sp, #24]
[all …]
/llvm-project/llvm/test/CodeGen/AArch64/
H A Dwin64-fpowi.ll56 ; CHECK-NEXT: str d8, [sp, #40] // 8-byte Folded Spill
57 ; CHECK-NEXT: .seh_save_freg d8, 40
59 ; CHECK-NEXT: scvtf d8, w0
62 ; CHECK-NEXT: fmov d1, d8
64 ; CHECK-NEXT: fmov d1, d8
74 ; CHECK-NEXT: ldr d8, [sp, #40] // 8-byte Folded Reload
75 ; CHECK-NEXT: .seh_save_freg d8, 40
97 ; CHECK-NEXT: str d8, [sp, #40] // 8-byte Folded Spill
98 ; CHECK-NEXT: .seh_save_freg d8, 40
117 ; CHECK-NEXT: ldr d8, [sp, #40] // 8-byte Folded Reload
[all …]

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