1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=armv8 -mcpu=cortex-a57 -instruction-tables < %s | FileCheck %s 3 4 .text 5 vabs.s8 d16, d16 6 vabs.s16 d16, d16 7 vabs.s32 d16, d16 8 vabs.f32 d16, d16 9 vabs.s8 q8, q8 10 vabs.s16 q8, q8 11 vabs.s32 q8, q8 12 vabs.f32 q8, q8 13 vqabs.s8 d16, d16 14 vqabs.s16 d16, d16 15 vqabs.s32 d16, d16 16 vqabs.s8 q8, q8 17 vqabs.s16 q8, q8 18 vqabs.s32 q8, q8 19 vabd.s8 d16, d16, d17 20 vabd.s16 d16, d16, d17 21 vabd.s32 d16, d16, d17 22 vabd.u8 d16, d16, d17 23 vabd.u16 d16, d16, d17 24 vabd.u32 d16, d16, d17 25 vabd.f32 d16, d16, d17 26 vabd.s8 q8, q8, q9 27 vabd.s16 q8, q8, q9 28 vabd.s32 q8, q8, q9 29 vabd.u8 q8, q8, q9 30 vabd.u16 q8, q8, q9 31 vabd.u32 q8, q8, q9 32 vabd.f32 q8, q8, q9 33 vabdl.s8 q8, d16, d17 34 vabdl.s16 q8, d16, d17 35 vabdl.s32 q8, d16, d17 36 vabdl.u8 q8, d16, d17 37 vabdl.u16 q8, d16, d17 38 vabdl.u32 q8, d16, d17 39 vaba.s8 d16, d18, d17 40 vaba.s16 d16, d18, d17 41 vaba.s32 d16, d18, d17 42 vaba.u8 d16, d18, d17 43 vaba.u16 d16, d18, d17 44 vaba.u32 d16, d18, d17 45 vaba.s8 q9, q8, q10 46 vaba.s16 q9, q8, q10 47 vaba.s32 q9, q8, q10 48 vaba.u8 q9, q8, q10 49 vaba.u16 q9, q8, q10 50 vaba.u32 q9, q8, q10 51 vabal.s8 q8, d19, d18 52 vabal.s16 q8, d19, d18 53 vabal.s32 q8, d19, d18 54 vabal.u8 q8, d19, d18 55 vabal.u16 q8, d19, d18 56 vabal.u32 q8, d19, d18 57 vadd.i8 d16, d17, d16 58 vadd.i16 d16, d17, d16 59 vadd.i64 d16, d17, d16 60 vadd.i32 d16, d17, d16 61 vadd.f32 d16, d16, d17 62 vadd.f32 q8, q8, q9 63 vaddl.s8 q8, d17, d16 64 vaddl.s16 q8, d17, d16 65 vaddl.s32 q8, d17, d16 66 vaddl.u8 q8, d17, d16 67 vaddl.u16 q8, d17, d16 68 vaddl.u32 q8, d17, d16 69 vaddw.s8 q8, q8, d18 70 vaddw.s16 q8, q8, d18 71 vaddw.s32 q8, q8, d18 72 vaddw.u8 q8, q8, d18 73 vaddw.u16 q8, q8, d18 74 vaddw.u32 q8, q8, d18 75 vhadd.s8 d16, d16, d17 76 vhadd.s16 d16, d16, d17 77 vhadd.s32 d16, d16, d17 78 vhadd.u8 d16, d16, d17 79 vhadd.u16 d16, d16, d17 80 vhadd.u32 d16, d16, d17 81 vhadd.s8 q8, q8, q9 82 vhadd.s16 q8, q8, q9 83 vhadd.s32 q8, q8, q9 84 vhadd.u8 q8, q8, q9 85 vhadd.u16 q8, q8, q9 86 vhadd.u32 q8, q8, q9 87 vrhadd.s8 d16, d16, d17 88 vrhadd.s16 d16, d16, d17 89 vrhadd.s32 d16, d16, d17 90 vrhadd.u8 d16, d16, d17 91 vrhadd.u16 d16, d16, d17 92 vrhadd.u32 d16, d16, d17 93 vrhadd.s8 q8, q8, q9 94 vrhadd.s16 q8, q8, q9 95 vrhadd.s32 q8, q8, q9 96 vrhadd.u8 q8, q8, q9 97 vrhadd.u16 q8, q8, q9 98 vrhadd.u32 q8, q8, q9 99 vqadd.s8 d16, d16, d17 100 vqadd.s16 d16, d16, d17 101 vqadd.s32 d16, d16, d17 102 vqadd.s64 d16, d16, d17 103 vqadd.u8 d16, d16, d17 104 vqadd.u16 d16, d16, d17 105 vqadd.u32 d16, d16, d17 106 vqadd.u64 d16, d16, d17 107 vqadd.s8 q8, q8, q9 108 vqadd.s16 q8, q8, q9 109 vqadd.s32 q8, q8, q9 110 vqadd.s64 q8, q8, q9 111 vqadd.u8 q8, q8, q9 112 vqadd.u16 q8, q8, q9 113 vqadd.u32 q8, q8, q9 114 vqadd.u64 q8, q8, q9 115 vaddhn.i16 d16, q8, q9 116 vaddhn.i32 d16, q8, q9 117 vaddhn.i64 d16, q8, q9 118 vraddhn.i16 d16, q8, q9 119 vraddhn.i32 d16, q8, q9 120 vraddhn.i64 d16, q8, q9 121 vcnt.8 d16, d16 122 vcnt.8 q8, q8 123 vclz.i8 d16, d16 124 vclz.i16 d16, d16 125 vclz.i32 d16, d16 126 vclz.i8 q8, q8 127 vclz.i16 q8, q8 128 vclz.i32 q8, q8 129 vcls.s8 d16, d16 130 vcls.s16 d16, d16 131 vcls.s32 d16, d16 132 vcls.s8 q8, q8 133 vcls.s16 q8, q8 134 vcls.s32 q8, q8 135 vand d16, d17, d16 136 vand q8, q8, q9 137 veor d16, d17, d16 138 veor q8, q8, q9 139 vorr d16, d17, d16 140 vorr q8, q8, q9 141 vorr.i32 d16, #0x1000000 142 vorr.i32 q8, #0x1000000 143 vorr.i32 q8, #0x0 144 vbic d16, d17, d16 145 vbic q8, q8, q9 146 vbic.i32 d16, #0xff000000 147 vbic.i32 q8, #0xff000000 148 vorn d16, d17, d16 149 vorn q8, q8, q9 150 vmvn d16, d16 151 vmvn q8, q8 152 vbsl d18, d17, d16 153 vbsl q8, q10, q9 154 vbit d18, d17, d16 155 vbit q8, q10, q9 156 vbif d18, d17, d16 157 vbif q8, q10, q9 158 vceq.i8 d16, d16, d17 159 vceq.i16 d16, d16, d17 160 vceq.i32 d16, d16, d17 161 vceq.f32 d16, d16, d17 162 vceq.i8 q8, q8, q9 163 vceq.i16 q8, q8, q9 164 vceq.i32 q8, q8, q9 165 vceq.f32 q8, q8, q9 166 vcge.s8 d16, d16, d17 167 vcge.s16 d16, d16, d17 168 vcge.s32 d16, d16, d17 169 vcge.u8 d16, d16, d17 170 vcge.u16 d16, d16, d17 171 vcge.u32 d16, d16, d17 172 vcge.f32 d16, d16, d17 173 vcge.s8 q8, q8, q9 174 vcge.s16 q8, q8, q9 175 vcge.s32 q8, q8, q9 176 vcge.u8 q8, q8, q9 177 vcge.u16 q8, q8, q9 178 vcge.u32 q8, q8, q9 179 vcge.f32 q8, q8, q9 180 vacge.f32 d16, d16, d17 181 vacge.f32 q8, q8, q9 182 vcgt.s8 d16, d16, d17 183 vcgt.s16 d16, d16, d17 184 vcgt.s32 d16, d16, d17 185 vcgt.u8 d16, d16, d17 186 vcgt.u16 d16, d16, d17 187 vcgt.u32 d16, d16, d17 188 vcgt.f32 d16, d16, d17 189 vcgt.s8 q8, q8, q9 190 vcgt.s16 q8, q8, q9 191 vcgt.s32 q8, q8, q9 192 vcgt.u8 q8, q8, q9 193 vcgt.u16 q8, q8, q9 194 vcgt.u32 q8, q8, q9 195 vcgt.f32 q8, q8, q9 196 vacgt.f32 d16, d16, d17 197 vacgt.f32 q8, q8, q9 198 vtst.8 d16, d16, d17 199 vtst.16 d16, d16, d17 200 vtst.32 d16, d16, d17 201 vtst.8 q8, q8, q9 202 vtst.16 q8, q8, q9 203 vtst.32 q8, q8, q9 204 vceq.i8 d16, d16, #0 205 vcge.s8 d16, d16, #0 206 vcle.s8 d16, d16, #0 207 vcgt.s8 d16, d16, #0 208 vclt.s8 d16, d16, #0 209 vcvt.s32.f32 d16, d16 210 vcvt.u32.f32 d16, d16 211 vcvt.f32.s32 d16, d16 212 vcvt.f32.u32 d16, d16 213 vcvt.s32.f32 q8, q8 214 vcvt.u32.f32 q8, q8 215 vcvt.f32.s32 q8, q8 216 vcvt.f32.u32 q8, q8 217 vcvt.s32.f32 d16, d16, #1 218 vcvt.u32.f32 d16, d16, #1 219 vcvt.f32.s32 d16, d16, #1 220 vcvt.f32.u32 d16, d16, #1 221 vcvt.s32.f32 q8, q8, #1 222 vcvt.u32.f32 q8, q8, #1 223 vcvt.f32.s32 q8, q8, #1 224 vcvt.f32.u32 q8, q8, #1 225 vcvt.f32.f16 q8, d16 226 vcvt.f16.f32 d16, q8 227 vdup.8 d16, r0 228 vdup.16 d16, r0 229 vdup.32 d16, r0 230 vdup.8 q8, r0 231 vdup.16 q8, r0 232 vdup.32 q8, r0 233 vdup.8 d16, d16[1] 234 vdup.16 d16, d16[1] 235 vdup.32 d16, d16[1] 236 vdup.8 q8, d16[1] 237 vdup.16 q8, d16[1] 238 vdup.32 q8, d16[1] 239 vmin.s8 d16, d16, d17 240 vmin.s16 d16, d16, d17 241 vmin.s32 d16, d16, d17 242 vmin.u8 d16, d16, d17 243 vmin.u16 d16, d16, d17 244 vmin.u32 d16, d16, d17 245 vmin.f32 d16, d16, d17 246 vmin.s8 q8, q8, q9 247 vmin.s16 q8, q8, q9 248 vmin.s32 q8, q8, q9 249 vmin.u8 q8, q8, q9 250 vmin.u16 q8, q8, q9 251 vmin.u32 q8, q8, q9 252 vmin.f32 q8, q8, q9 253 vmax.s8 d16, d16, d17 254 vmax.s16 d16, d16, d17 255 vmax.s32 d16, d16, d17 256 vmax.u8 d16, d16, d17 257 vmax.u16 d16, d16, d17 258 vmax.u32 d16, d16, d17 259 vmax.f32 d16, d16, d17 260 vmax.s8 q8, q8, q9 261 vmax.s16 q8, q8, q9 262 vmax.s32 q8, q8, q9 263 vmax.u8 q8, q8, q9 264 vmax.u16 q8, q8, q9 265 vmax.u32 q8, q8, q9 266 vmax.f32 q8, q8, q9 267 vmov.i8 d16, #0x8 268 vmov.i16 d16, #0x10 269 vmov.i16 d16, #0x1000 270 vmov.i32 d16, #0x20 271 vmov.i32 d16, #0x2000 272 vmov.i32 d16, #0x200000 273 vmov.i32 d16, #0x20000000 274 vmov.i32 d16, #0x20ff 275 vmov.i32 d16, #0x20ffff 276 vmov.i64 d16, #0xff0000ff0000ffff 277 vmov.i8 q8, #0x8 278 vmov.i16 q8, #0x10 279 vmov.i16 q8, #0x1000 280 vmov.i32 q8, #0x20 281 vmov.i32 q8, #0x2000 282 vmov.i32 q8, #0x200000 283 vmov.i32 q8, #0x20000000 284 vmov.i32 q8, #0x20ff 285 vmov.i32 q8, #0x20ffff 286 vmov.i64 q8, #0xff0000ff0000ffff 287 vmvn.i16 d16, #0x10 288 vmvn.i16 d16, #0x1000 289 vmvn.i32 d16, #0x20 290 vmvn.i32 d16, #0x2000 291 vmvn.i32 d16, #0x200000 292 vmvn.i32 d16, #0x20000000 293 vmvn.i32 d16, #0x20ff 294 vmvn.i32 d16, #0x20ffff 295 vmovl.s8 q8, d16 296 vmovl.s16 q8, d16 297 vmovl.s32 q8, d16 298 vmovl.u8 q8, d16 299 vmovl.u16 q8, d16 300 vmovl.u32 q8, d16 301 vmovn.i16 d16, q8 302 vmovn.i32 d16, q8 303 vmovn.i64 d16, q8 304 vqmovn.s16 d16, q8 305 vqmovn.s32 d16, q8 306 vqmovn.s64 d16, q8 307 vqmovn.u16 d16, q8 308 vqmovn.u32 d16, q8 309 vqmovn.u64 d16, q8 310 vqmovun.s16 d16, q8 311 vqmovun.s32 d16, q8 312 vqmovun.s64 d16, q8 313 vmov.s8 r0, d16[1] 314 vmov.s16 r0, d16[1] 315 vmov.u8 r0, d16[1] 316 vmov.u16 r0, d16[1] 317 vmov.32 r0, d16[1] 318 vmov.8 d16[1], r1 319 vmov.16 d16[1], r1 320 vmov.32 d16[1], r1 321 vmov.8 d18[1], r1 322 vmov.16 d18[1], r1 323 vmov.32 d18[1], r1 324 vmla.i8 d16, d18, d17 325 vmla.i16 d16, d18, d17 326 vmla.i32 d16, d18, d17 327 vmla.f32 d16, d18, d17 328 vmla.i8 q9, q8, q10 329 vmla.i16 q9, q8, q10 330 vmla.i32 q9, q8, q10 331 vmla.f32 q9, q8, q10 332 vmlal.s8 q8, d19, d18 333 vmlal.s16 q8, d19, d18 334 vmlal.s32 q8, d19, d18 335 vmlal.u8 q8, d19, d18 336 vmlal.u16 q8, d19, d18 337 vmlal.u32 q8, d19, d18 338 vqdmlal.s16 q8, d19, d18 339 vqdmlal.s32 q8, d19, d18 340 vmls.i8 d16, d18, d17 341 vmls.i16 d16, d18, d17 342 vmls.i32 d16, d18, d17 343 vmls.f32 d16, d18, d17 344 vmls.i8 q9, q8, q10 345 vmls.i16 q9, q8, q10 346 vmls.i32 q9, q8, q10 347 vmls.f32 q9, q8, q10 348 vmlsl.s8 q8, d19, d18 349 vmlsl.s16 q8, d19, d18 350 vmlsl.s32 q8, d19, d18 351 vmlsl.u8 q8, d19, d18 352 vmlsl.u16 q8, d19, d18 353 vmlsl.u32 q8, d19, d18 354 vqdmlsl.s16 q8, d19, d18 355 vqdmlsl.s32 q8, d19, d18 356 vmul.i8 d16, d16, d17 357 vmul.i16 d16, d16, d17 358 vmul.i32 d16, d16, d17 359 vmul.f32 d16, d16, d17 360 vmul.i8 q8, q8, q9 361 vmul.i16 q8, q8, q9 362 vmul.i32 q8, q8, q9 363 vmul.f32 q8, q8, q9 364 vmul.p8 d16, d16, d17 365 vmul.p8 q8, q8, q9 366 vqdmulh.s16 d16, d16, d17 367 vqdmulh.s32 d16, d16, d17 368 vqdmulh.s16 q8, q8, q9 369 vqdmulh.s32 q8, q8, q9 370 vqrdmulh.s16 d16, d16, d17 371 vqrdmulh.s32 d16, d16, d17 372 vqrdmulh.s16 q8, q8, q9 373 vqrdmulh.s32 q8, q8, q9 374 vmull.s8 q8, d16, d17 375 vmull.s16 q8, d16, d17 376 vmull.s32 q8, d16, d17 377 vmull.u8 q8, d16, d17 378 vmull.u16 q8, d16, d17 379 vmull.u32 q8, d16, d17 380 vmull.p8 q8, d16, d17 381 vqdmull.s16 q8, d16, d17 382 vqdmull.s32 q8, d16, d17 383 vneg.s8 d16, d16 384 vneg.s16 d16, d16 385 vneg.s32 d16, d16 386 vneg.f32 d16, d16 387 vneg.s8 q8, q8 388 vneg.s16 q8, q8 389 vneg.s32 q8, q8 390 vneg.f32 q8, q8 391 vqneg.s8 d16, d16 392 vqneg.s16 d16, d16 393 vqneg.s32 d16, d16 394 vqneg.s8 q8, q8 395 vqneg.s16 q8, q8 396 vqneg.s32 q8, q8 397 vpadd.i8 d16, d17, d16 398 vpadd.i16 d16, d17, d16 399 vpadd.i32 d16, d17, d16 400 vpadd.f32 d16, d16, d17 401 vpaddl.s8 d16, d16 402 vpaddl.s16 d16, d16 403 vpaddl.s32 d16, d16 404 vpaddl.u8 d16, d16 405 vpaddl.u16 d16, d16 406 vpaddl.u32 d16, d16 407 vpaddl.s8 q8, q8 408 vpaddl.s16 q8, q8 409 vpaddl.s32 q8, q8 410 vpaddl.u8 q8, q8 411 vpaddl.u16 q8, q8 412 vpaddl.u32 q8, q8 413 vpadal.s8 d16, d17 414 vpadal.s16 d16, d17 415 vpadal.s32 d16, d17 416 vpadal.u8 d16, d17 417 vpadal.u16 d16, d17 418 vpadal.u32 d16, d17 419 vpadal.s8 q9, q8 420 vpadal.s16 q9, q8 421 vpadal.s32 q9, q8 422 vpadal.u8 q9, q8 423 vpadal.u16 q9, q8 424 vpadal.u32 q9, q8 425 vpmin.s8 d16, d16, d17 426 vpmin.s16 d16, d16, d17 427 vpmin.s32 d16, d16, d17 428 vpmin.u8 d16, d16, d17 429 vpmin.u16 d16, d16, d17 430 vpmin.u32 d16, d16, d17 431 vpmin.f32 d16, d16, d17 432 vpmax.s8 d16, d16, d17 433 vpmax.s16 d16, d16, d17 434 vpmax.s32 d16, d16, d17 435 vpmax.u8 d16, d16, d17 436 vpmax.u16 d16, d16, d17 437 vpmax.u32 d16, d16, d17 438 vpmax.f32 d16, d16, d17 439 vrecpe.u32 d16, d16 440 vrecpe.u32 q8, q8 441 vrecpe.f32 d16, d16 442 vrecpe.f32 q8, q8 443 vrecps.f32 d16, d16, d17 444 vrecps.f32 q8, q8, q9 445 vrsqrte.u32 d16, d16 446 vrsqrte.u32 q8, q8 447 vrsqrte.f32 d16, d16 448 vrsqrte.f32 q8, q8 449 vrsqrts.f32 d16, d16, d17 450 vrsqrts.f32 q8, q8, q9 451 vrev64.8 d16, d16 452 vrev64.16 d16, d16 453 vrev64.32 d16, d16 454 vrev64.8 q8, q8 455 vrev64.16 q8, q8 456 vrev64.32 q8, q8 457 vrev32.8 d16, d16 458 vrev32.16 d16, d16 459 vrev32.8 q8, q8 460 vrev32.16 q8, q8 461 vrev16.8 d16, d16 462 vrev16.8 q8, q8 463 vqshl.s8 d16, d16, d17 464 vqshl.s16 d16, d16, d17 465 vqshl.s32 d16, d16, d17 466 vqshl.s64 d16, d16, d17 467 vqshl.u8 d16, d16, d17 468 vqshl.u16 d16, d16, d17 469 vqshl.u32 d16, d16, d17 470 vqshl.u64 d16, d16, d17 471 vqshl.s8 q8, q8, q9 472 vqshl.s16 q8, q8, q9 473 vqshl.s32 q8, q8, q9 474 vqshl.s64 q8, q8, q9 475 vqshl.u8 q8, q8, q9 476 vqshl.u16 q8, q8, q9 477 vqshl.u32 q8, q8, q9 478 vqshl.u64 q8, q8, q9 479 vqshl.s8 d16, d16, #7 480 vqshl.s16 d16, d16, #15 481 vqshl.s32 d16, d16, #31 482 vqshl.s64 d16, d16, #63 483 vqshl.u8 d16, d16, #7 484 vqshl.u16 d16, d16, #15 485 vqshl.u32 d16, d16, #31 486 vqshl.u64 d16, d16, #63 487 vqshlu.s8 d16, d16, #7 488 vqshlu.s16 d16, d16, #15 489 vqshlu.s32 d16, d16, #31 490 vqshlu.s64 d16, d16, #63 491 vqshl.s8 q8, q8, #7 492 vqshl.s16 q8, q8, #15 493 vqshl.s32 q8, q8, #31 494 vqshl.s64 q8, q8, #63 495 vqshl.u8 q8, q8, #7 496 vqshl.u16 q8, q8, #15 497 vqshl.u32 q8, q8, #31 498 vqshl.u64 q8, q8, #63 499 vqshlu.s8 q8, q8, #7 500 vqshlu.s16 q8, q8, #15 501 vqshlu.s32 q8, q8, #31 502 vqshlu.s64 q8, q8, #63 503 vqrshl.s8 d16, d16, d17 504 vqrshl.s16 d16, d16, d17 505 vqrshl.s32 d16, d16, d17 506 vqrshl.s64 d16, d16, d17 507 vqrshl.u8 d16, d16, d17 508 vqrshl.u16 d16, d16, d17 509 vqrshl.u32 d16, d16, d17 510 vqrshl.u64 d16, d16, d17 511 vqrshl.s8 q8, q8, q9 512 vqrshl.s16 q8, q8, q9 513 vqrshl.s32 q8, q8, q9 514 vqrshl.s64 q8, q8, q9 515 vqrshl.u8 q8, q8, q9 516 vqrshl.u16 q8, q8, q9 517 vqrshl.u32 q8, q8, q9 518 vqrshl.u64 q8, q8, q9 519 vqshrn.s16 d16, q8, #8 520 vqshrn.s32 d16, q8, #16 521 vqshrn.s64 d16, q8, #32 522 vqshrn.u16 d16, q8, #8 523 vqshrn.u32 d16, q8, #16 524 vqshrn.u64 d16, q8, #32 525 vqshrun.s16 d16, q8, #8 526 vqshrun.s32 d16, q8, #16 527 vqshrun.s64 d16, q8, #32 528 vqrshrn.s16 d16, q8, #8 529 vqrshrn.s32 d16, q8, #16 530 vqrshrn.s64 d16, q8, #32 531 vqrshrn.u16 d16, q8, #8 532 vqrshrn.u32 d16, q8, #16 533 vqrshrn.u64 d16, q8, #32 534 vqrshrun.s16 d16, q8, #8 535 vqrshrun.s32 d16, q8, #16 536 vqrshrun.s64 d16, q8, #32 537 vshl.u8 d16, d17, d16 538 vshl.u16 d16, d17, d16 539 vshl.u32 d16, d17, d16 540 vshl.u64 d16, d17, d16 541 vshl.i8 d16, d16, #7 542 vshl.i16 d16, d16, #15 543 vshl.i32 d16, d16, #31 544 vshl.i64 d16, d16, #63 545 vshl.u8 q8, q9, q8 546 vshl.u16 q8, q9, q8 547 vshl.u32 q8, q9, q8 548 vshl.u64 q8, q9, q8 549 vshl.i8 q8, q8, #7 550 vshl.i16 q8, q8, #15 551 vshl.i32 q8, q8, #31 552 vshl.i64 q8, q8, #63 553 vshr.u8 d16, d16, #7 554 vshr.u16 d16, d16, #15 555 vshr.u32 d16, d16, #31 556 vshr.u64 d16, d16, #63 557 vshr.u8 q8, q8, #7 558 vshr.u16 q8, q8, #15 559 vshr.u32 q8, q8, #31 560 vshr.u64 q8, q8, #63 561 vshr.s8 d16, d16, #7 562 vshr.s16 d16, d16, #15 563 vshr.s32 d16, d16, #31 564 vshr.s64 d16, d16, #63 565 vshr.s8 q8, q8, #7 566 vshr.s16 q8, q8, #15 567 vshr.s32 q8, q8, #31 568 vshr.s64 q8, q8, #63 569 vsra.u8 d16, d16, #7 570 vsra.u16 d16, d16, #15 571 vsra.u32 d16, d16, #31 572 vsra.u64 d16, d16, #63 573 vsra.u8 q8, q8, #7 574 vsra.u16 q8, q8, #15 575 vsra.u32 q8, q8, #31 576 vsra.u64 q8, q8, #63 577 vsra.s8 d16, d16, #7 578 vsra.s16 d16, d16, #15 579 vsra.s32 d16, d16, #31 580 vsra.s64 d16, d16, #63 581 vsra.s8 q8, q8, #7 582 vsra.s16 q8, q8, #15 583 vsra.s32 q8, q8, #31 584 vsra.s64 q8, q8, #63 585 vsri.8 d16, d16, #7 586 vsri.16 d16, d16, #15 587 vsri.32 d16, d16, #31 588 vsri.64 d16, d16, #63 589 vsri.8 q8, q8, #7 590 vsri.16 q8, q8, #15 591 vsri.32 q8, q8, #31 592 vsri.64 q8, q8, #63 593 vsli.8 d16, d16, #7 594 vsli.16 d16, d16, #15 595 vsli.32 d16, d16, #31 596 vsli.64 d16, d16, #63 597 vsli.8 q8, q8, #7 598 vsli.16 q8, q8, #15 599 vsli.32 q8, q8, #31 600 vsli.64 q8, q8, #63 601 vshll.s8 q8, d16, #7 602 vshll.s16 q8, d16, #15 603 vshll.s32 q8, d16, #31 604 vshll.u8 q8, d16, #7 605 vshll.u16 q8, d16, #15 606 vshll.u32 q8, d16, #31 607 vshll.i8 q8, d16, #8 608 vshll.i16 q8, d16, #16 609 vshll.i32 q8, d16, #32 610 vshrn.i16 d16, q8, #8 611 vshrn.i32 d16, q8, #16 612 vshrn.i64 d16, q8, #32 613 vrshl.s8 d16, d17, d16 614 vrshl.s16 d16, d17, d16 615 vrshl.s32 d16, d17, d16 616 vrshl.s64 d16, d17, d16 617 vrshl.u8 d16, d17, d16 618 vrshl.u16 d16, d17, d16 619 vrshl.u32 d16, d17, d16 620 vrshl.u64 d16, d17, d16 621 vrshl.s8 q8, q9, q8 622 vrshl.s16 q8, q9, q8 623 vrshl.s32 q8, q9, q8 624 vrshl.s64 q8, q9, q8 625 vrshl.u8 q8, q9, q8 626 vrshl.u16 q8, q9, q8 627 vrshl.u32 q8, q9, q8 628 vrshl.u64 q8, q9, q8 629 vrshr.s8 d16, d16, #8 630 vrshr.s16 d16, d16, #16 631 vrshr.s32 d16, d16, #32 632 vrshr.s64 d16, d16, #64 633 vrshr.u8 d16, d16, #8 634 vrshr.u16 d16, d16, #16 635 vrshr.u32 d16, d16, #32 636 vrshr.u64 d16, d16, #64 637 vrshr.s8 q8, q8, #8 638 vrshr.s16 q8, q8, #16 639 vrshr.s32 q8, q8, #32 640 vrshr.s64 q8, q8, #64 641 vrshr.u8 q8, q8, #8 642 vrshr.u16 q8, q8, #16 643 vrshr.u32 q8, q8, #32 644 vrshr.u64 q8, q8, #64 645 vrshrn.i16 d16, q8, #8 646 vrshrn.i32 d16, q8, #16 647 vrshrn.i64 d16, q8, #32 648 vqrshrn.s16 d16, q8, #4 649 vqrshrn.s32 d16, q8, #13 650 vqrshrn.s64 d16, q8, #13 651 vqrshrn.u16 d16, q8, #4 652 vqrshrn.u32 d16, q8, #13 653 vqrshrn.u64 d16, q8, #13 654 vsra.s8 d17, d16, #8 655 vsra.s16 d17, d16, #16 656 vsra.s32 d17, d16, #32 657 vsra.s64 d17, d16, #64 658 vsra.s8 q8, q9, #8 659 vsra.s16 q8, q9, #16 660 vsra.s32 q8, q9, #32 661 vsra.s64 q8, q9, #64 662 vsra.u8 d17, d16, #8 663 vsra.u16 d17, d16, #16 664 vsra.u32 d17, d16, #32 665 vsra.u64 d17, d16, #64 666 vsra.u8 q8, q9, #8 667 vsra.u16 q8, q9, #16 668 vsra.u32 q8, q9, #32 669 vsra.u64 q8, q9, #64 670 vrsra.s8 d17, d16, #8 671 vrsra.s16 d17, d16, #16 672 vrsra.s32 d17, d16, #32 673 vrsra.s64 d17, d16, #64 674 vrsra.u8 d17, d16, #8 675 vrsra.u16 d17, d16, #16 676 vrsra.u32 d17, d16, #32 677 vrsra.u64 d17, d16, #64 678 vrsra.s8 q8, q9, #8 679 vrsra.s16 q8, q9, #16 680 vrsra.s32 q8, q9, #32 681 vrsra.s64 q8, q9, #64 682 vrsra.u8 q8, q9, #8 683 vrsra.u16 q8, q9, #16 684 vrsra.u32 q8, q9, #32 685 vrsra.u64 q8, q9, #64 686 vsli.8 d17, d16, #7 687 vsli.16 d17, d16, #15 688 vsli.32 d17, d16, #31 689 vsli.64 d17, d16, #63 690 vsli.8 q9, q8, #7 691 vsli.16 q9, q8, #15 692 vsli.32 q9, q8, #31 693 vsli.64 q9, q8, #63 694 vsri.8 d17, d16, #8 695 vsri.16 d17, d16, #16 696 vsri.32 d17, d16, #32 697 vsri.64 d17, d16, #64 698 vsri.8 q9, q8, #8 699 vsri.16 q9, q8, #16 700 vsri.32 q9, q8, #32 701 vsri.64 q9, q8, #64 702 vext.8 d16, d17, d16, #3 703 vext.8 d16, d17, d16, #5 704 vext.8 q8, q9, q8, #3 705 vext.8 q8, q9, q8, #7 706 vext.16 d16, d17, d16, #3 707 vext.32 q8, q9, q8, #3 708 vtrn.8 d17, d16 709 vtrn.16 d17, d16 710 vtrn.32 d17, d16 711 vtrn.8 q9, q8 712 vtrn.16 q9, q8 713 vtrn.32 q9, q8 714 vuzp.8 d17, d16 715 vuzp.16 d17, d16 716 vuzp.8 q9, q8 717 vuzp.16 q9, q8 718 vuzp.32 q9, q8 719 vzip.8 d17, d16 720 vzip.16 d17, d16 721 vzip.8 q9, q8 722 vzip.16 q9, q8 723 vzip.32 q9, q8 724 vsub.i8 d16, d17, d16 725 vsub.i16 d16, d17, d16 726 vsub.i32 d16, d17, d16 727 vsub.i64 d16, d17, d16 728 vsub.f32 d16, d16, d17 729 vsub.i8 q8, q8, q9 730 vsub.i16 q8, q8, q9 731 vsub.i32 q8, q8, q9 732 vsub.i64 q8, q8, q9 733 vsub.f32 q8, q8, q9 734 vsubl.s8 q8, d17, d16 735 vsubl.s16 q8, d17, d16 736 vsubl.s32 q8, d17, d16 737 vsubl.u8 q8, d17, d16 738 vsubl.u16 q8, d17, d16 739 vsubl.u32 q8, d17, d16 740 vsubw.s8 q8, q8, d18 741 vsubw.s16 q8, q8, d18 742 vsubw.s32 q8, q8, d18 743 vsubw.u8 q8, q8, d18 744 vsubw.u16 q8, q8, d18 745 vsubw.u32 q8, q8, d18 746 vhsub.s8 d16, d16, d17 747 vhsub.s16 d16, d16, d17 748 vhsub.s32 d16, d16, d17 749 vhsub.u8 d16, d16, d17 750 vhsub.u16 d16, d16, d17 751 vhsub.u32 d16, d16, d17 752 vhsub.s8 q8, q8, q9 753 vhsub.s16 q8, q8, q9 754 vhsub.s32 q8, q8, q9 755 vqsub.s8 d16, d16, d17 756 vqsub.s16 d16, d16, d17 757 vqsub.s32 d16, d16, d17 758 vqsub.s64 d16, d16, d17 759 vqsub.u8 d16, d16, d17 760 vqsub.u16 d16, d16, d17 761 vqsub.u32 d16, d16, d17 762 vqsub.u64 d16, d16, d17 763 vqsub.s8 q8, q8, q9 764 vqsub.s16 q8, q8, q9 765 vqsub.s32 q8, q8, q9 766 vqsub.s64 q8, q8, q9 767 vqsub.u8 q8, q8, q9 768 vqsub.u16 q8, q8, q9 769 vqsub.u32 q8, q8, q9 770 vqsub.u64 q8, q8, q9 771 vsubhn.i16 d16, q8, q9 772 vsubhn.i32 d16, q8, q9 773 vsubhn.i64 d16, q8, q9 774 vrsubhn.i16 d16, q8, q9 775 vrsubhn.i32 d16, q8, q9 776 vrsubhn.i64 d16, q8, q9 777 vtbl.8 d16, {d17}, d16 778 vtbl.8 d16, {d16, d17}, d18 779 vtbl.8 d16, {d16, d17, d18}, d20 780 vtbl.8 d16, {d16, d17, d18, d19}, d20 781 vtbx.8 d18, {d16}, d17 782 vtbx.8 d19, {d16, d17}, d18 783 vtbx.8 d20, {d16, d17, d18}, d21 784 vtbx.8 d20, {d16, d17, d18, d19}, d21 785 vld1.8 {d16}, [r0:64] 786 vld1.16 {d16}, [r0] 787 vld1.32 {d16}, [r0] 788 vld1.64 {d16}, [r0] 789 vld1.8 {d16, d17}, [r0:64] 790 vld1.16 {d16, d17}, [r0:128] 791 vld1.32 {d16, d17}, [r0] 792 vld1.64 {d16, d17}, [r0] 793 vld2.8 {d16, d17}, [r0:64] 794 vld2.16 {d16, d17}, [r0:128] 795 vld2.32 {d16, d17}, [r0] 796 vld2.8 {d16, d17, d18, d19}, [r0:64] 797 vld2.16 {d16, d17, d18, d19}, [r0:128] 798 vld2.32 {d16, d17, d18, d19}, [r0:256] 799 vld3.8 {d16, d17, d18}, [r0:64] 800 vld3.16 {d16, d17, d18}, [r0] 801 vld3.32 {d16, d17, d18}, [r0] 802 vld3.8 {d16, d18, d20}, [r0:64]! 803 vld3.8 {d17, d19, d21}, [r0:64]! 804 vld3.16 {d16, d18, d20}, [r0]! 805 vld3.16 {d17, d19, d21}, [r0]! 806 vld3.32 {d16, d18, d20}, [r0]! 807 vld3.32 {d17, d19, d21}, [r0]! 808 vld4.8 {d16, d17, d18, d19}, [r0:64] 809 vld4.16 {d16, d17, d18, d19}, [r0:128] 810 vld4.32 {d16, d17, d18, d19}, [r0:256] 811 vld4.8 {d16, d18, d20, d22}, [r0:256]! 812 vld4.8 {d17, d19, d21, d23}, [r0:256]! 813 vld4.16 {d16, d18, d20, d22}, [r0]! 814 vld4.16 {d17, d19, d21, d23}, [r0]! 815 vld4.32 {d16, d18, d20, d22}, [r0]! 816 vld4.32 {d17, d19, d21, d23}, [r0]! 817 vld1.8 {d16[3]}, [r0] 818 vld1.16 {d16[2]}, [r0:16] 819 vld1.32 {d16[1]}, [r0:32] 820 vld2.8 {d16[1], d17[1]}, [r0:16] 821 vld2.16 {d16[1], d17[1]}, [r0:32] 822 vld2.32 {d16[1], d17[1]}, [r0] 823 vld2.16 {d17[1], d19[1]}, [r0] 824 vld2.32 {d17[0], d19[0]}, [r0:64] 825 vld3.8 {d16[1], d17[1], d18[1]}, [r0] 826 vld3.16 {d16[1], d17[1], d18[1]}, [r0] 827 vld3.32 {d16[1], d17[1], d18[1]}, [r0] 828 vld3.16 {d16[1], d18[1], d20[1]}, [r0] 829 vld3.32 {d17[1], d19[1], d21[1]}, [r0] 830 vld3.8 {d0[], d1[], d2[]}, [r4] 831 vld3.8 {d0[], d1[], d2[]}, [r4]! 832 vld3.8 {d0[], d2[], d4[]}, [r4], r5 833 vld3.16 {d0[], d2[], d4[]}, [r4] 834 vld3.16 {d0[], d1[], d2[]}, [r4]! 835 vld3.16 {d0[], d2[], d4[]}, [r4], r5 836 vld3.32 {d0[], d1[], d2[]}, [r4] 837 vld3.32 {d0[], d1[], d2[]}, [r4]! 838 vld3.32 {d0[], d2[], d4[]}, [r4], r5 839 vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0:32] 840 vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] 841 vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0:128] 842 vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0:64] 843 vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] 844 vld4.8 {d0[], d1[], d2[], d3[]}, [r4] 845 vld4.8 {d0[], d2[], d4[], d6[]}, [r4:32] 846 vld4.8 {d0[], d1[], d2[], d3[]}, [r4:32]! 847 vld4.8 {d0[], d2[], d4[], d6[]}, [r4:32], r5 848 vld4.16 {d0[], d1[], d2[], d3[]}, [r4] 849 vld4.16 {d0[], d2[], d4[], d6[]}, [r4:64] 850 vld4.16 {d0[], d1[], d2[], d3[]}, [r4:64]! 851 vld4.16 {d0[], d2[], d4[], d6[]}, [r4:64], r5 852 vld4.32 {d0[], d1[], d2[], d3[]}, [r4] 853 vld4.32 {d0[], d2[], d4[], d6[]}, [r4:64] 854 vld4.32 {d0[], d1[], d2[], d3[]}, [r4:128]! 855 vld4.32 {d0[], d2[], d4[], d6[]}, [r4:128], r5 856 vst1.8 {d16}, [r0:64] 857 vst1.16 {d16}, [r0] 858 vst1.32 {d16}, [r0] 859 vst1.64 {d16}, [r0] 860 vst1.8 {d16, d17}, [r0:64] 861 vst1.16 {d16, d17}, [r0:128] 862 vst1.32 {d16, d17}, [r0] 863 vst1.64 {d16, d17}, [r0] 864 vst2.8 {d16, d17}, [r0:64] 865 vst2.16 {d16, d17}, [r0:128] 866 vst2.32 {d16, d17}, [r0] 867 vst2.8 {d16, d17, d18, d19}, [r0:64] 868 vst2.16 {d16, d17, d18, d19}, [r0:128] 869 vst2.32 {d16, d17, d18, d19}, [r0:256] 870 vst3.8 {d16, d17, d18}, [r0:64] 871 vst3.16 {d16, d17, d18}, [r0] 872 vst3.32 {d16, d17, d18}, [r0] 873 vst3.8 {d16, d18, d20}, [r0:64]! 874 vst3.8 {d17, d19, d21}, [r0:64]! 875 vst3.16 {d16, d18, d20}, [r0]! 876 vst3.16 {d17, d19, d21}, [r0]! 877 vst3.32 {d16, d18, d20}, [r0]! 878 vst3.32 {d17, d19, d21}, [r0]! 879 vst4.8 {d16, d17, d18, d19}, [r0:64] 880 vst4.16 {d16, d17, d18, d19}, [r0:128] 881 vst4.8 {d16, d18, d20, d22}, [r0:256]! 882 vst4.8 {d17, d19, d21, d23}, [r0:256]! 883 vst4.16 {d16, d18, d20, d22}, [r0]! 884 vst4.16 {d17, d19, d21, d23}, [r0]! 885 vst4.32 {d16, d18, d20, d22}, [r0]! 886 vst4.32 {d17, d19, d21, d23}, [r0]! 887 vst2.8 {d16[1], d17[1]}, [r0:16] 888 vst2.16 {d16[1], d17[1]}, [r0:32] 889 vst2.32 {d16[1], d17[1]}, [r0] 890 vst2.16 {d17[1], d19[1]}, [r0] 891 vst2.32 {d17[0], d19[0]}, [r0:64] 892 vst3.8 {d16[1], d17[1], d18[1]}, [r0] 893 vst3.16 {d16[1], d17[1], d18[1]}, [r0] 894 vst3.32 {d16[1], d17[1], d18[1]}, [r0] 895 vst3.16 {d17[2], d19[2], d21[2]}, [r0] 896 vst3.32 {d16[0], d18[0], d20[0]}, [r0] 897 vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0:32] 898 vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] 899 vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0:128] 900 vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0:64] 901 vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] 902 vld1.8 {d0[]}, [r0], r0 903 vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0]! 904 vmovvs r2, lr, s27, s28 905 vmov s3, s4, r1, r2 906 vmov s2, s3, r1, r2 907 vmov r1, r2, s3, s4 908 vmov r1, r2, s2, s3 909 vmov d15, r1, r2 910 vmov d16, r1, r2 911 vmov r1, r2, d15 912 vmov r1, r2, d16 913 vcvttmi.f32.f16 s2, s19 914 vld1.8 {d23, d24, d25}, [r6:64]! 915 vld1.32 {d22, d23, d24, d25}, [pc:64]! 916 vst1.32 {d26, d27}, [r1:64]! 917 vmov.f32 d0, #1.600000e+01 918 vmov.f32 q0, #1.600000e+01 919 vst1.8 {d8}, [r4]! 920 vst1.16 {d8}, [r4]! 921 vst1.32 {d8}, [r4]! 922 vst1.64 {d8}, [r4]! 923 vst1.8 {d8}, [r4], r6 924 vst1.16 {d8}, [r4], r6 925 vst1.32 {d8}, [r4], r6 926 vst1.64 {d8}, [r4], r6 927 vst1.8 {d8, d9}, [r4]! 928 vst1.16 {d8, d9}, [r4]! 929 vst1.32 {d8, d9}, [r4]! 930 vst1.64 {d8, d9}, [r4]! 931 vst1.8 {d8, d9}, [r4], r6 932 vst1.16 {d8, d9}, [r4], r6 933 vst1.32 {d8, d9}, [r4], r6 934 vst1.64 {d8, d9}, [r4], r6 935 vst1.8 {d8, d9, d10}, [r4]! 936 vst1.16 {d8, d9, d10}, [r4]! 937 vst1.32 {d8, d9, d10}, [r4]! 938 vst1.64 {d8, d9, d10}, [r4]! 939 vst1.8 {d8, d9, d10}, [r4], r6 940 vst1.16 {d8, d9, d10}, [r4], r6 941 vst1.32 {d8, d9, d10}, [r4], r6 942 vst1.64 {d8, d9, d10}, [r4], r6 943 vst1.8 {d8, d9, d10, d11}, [r4]! 944 vst1.16 {d8, d9, d10, d11}, [r4]! 945 vst1.32 {d8, d9, d10, d11}, [r4]! 946 vst1.64 {d8, d9, d10, d11}, [r4]! 947 vst1.8 {d8, d9, d10, d11}, [r4], r6 948 vst1.16 {d8, d9, d10, d11}, [r4], r6 949 vst1.32 {d8, d9, d10, d11}, [r4], r6 950 vst1.64 {d8, d9, d10, d11}, [r4], r6 951 vst2.8 {d8, d9}, [r4]! 952 vst2.16 {d8, d9}, [r4]! 953 vst2.32 {d8, d9}, [r4]! 954 vst2.8 {d8, d9}, [r4], r6 955 vst2.16 {d8, d9}, [r4], r6 956 vst2.32 {d8, d9}, [r4], r6 957 vst2.8 {d8, d10}, [r4]! 958 vst2.16 {d8, d10}, [r4]! 959 vst2.32 {d8, d10}, [r4]! 960 vst2.8 {d8, d10}, [r4], r6 961 vst2.16 {d8, d10}, [r4], r6 962 vst2.32 {d8, d10}, [r4], r6 963 vst3.8 {d8, d9, d10}, [r4]! 964 vst3.16 {d8, d9, d10}, [r4]! 965 vst3.32 {d8, d9, d10}, [r4]! 966 vst3.8 {d8, d10, d12}, [r4], r6 967 vst3.16 {d8, d10, d12}, [r4], r6 968 vst3.32 {d8, d10, d12}, [r4], r6 969 vst4.8 {d8, d9, d10, d11}, [r4]! 970 vst4.16 {d8, d9, d10, d11}, [r4]! 971 vst4.32 {d8, d9, d10, d11}, [r4]! 972 vst4.8 {d8, d10, d12, d14}, [r4], r6 973 vst4.16 {d8, d10, d12, d14}, [r4], r6 974 vst4.32 {d8, d10, d12, d14}, [r4], r6 975 vst1.16 {d8, d9}, [r4] 976 vst1.32 {d8, d9}, [r4] 977 vst1.64 {d8, d9}, [r4] 978 vst1.8 {d8, d9}, [r4] 979 vst2.16 {d8, d9}, [r4] 980 vst2.32 {d8, d9}, [r4] 981 vst2.8 {d8, d9}, [r4] 982 vst2.16 {d8, d9}, [r4]! 983 vst2.16 {d8, d9}, [r4], r6 984 vst2.32 {d8, d9}, [r4]! 985 vst2.32 {d8, d9}, [r4], r6 986 vst2.8 {d8, d9}, [r4]! 987 vst2.8 {d8, d9}, [r4], r6 988 vst2.16 {d8, d10}, [r4] 989 vst2.32 {d8, d10}, [r4] 990 vst2.8 {d8, d10}, [r4] 991 vst3.8 {d8, d9, d10}, [r4] 992 vst3.16 {d8, d9, d10}, [r4] 993 vst3.32 {d8, d9, d10}, [r4] 994 vst4.8 {d8, d9, d10, d11}, [r4] 995 vst4.16 {d8, d9, d10, d11}, [r4] 996 vst4.32 {d8, d9, d10, d11}, [r4] 997 vst3.8 {d8, d10, d12}, [r4] 998 vst3.16 {d8, d10, d12}, [r4] 999 vst3.32 {d8, d10, d12}, [r4] 1000 vst4.8 {d8, d10, d12, d14}, [r4] 1001 vst4.16 {d8, d10, d12, d14}, [r4] 1002 vst4.32 {d8, d10, d12, d14}, [r4] 1003 vld1.8 {d8}, [r4]! 1004 vld1.16 {d8}, [r4]! 1005 vld1.32 {d8}, [r4]! 1006 vld1.64 {d8}, [r4]! 1007 vld1.8 {d8}, [r4], r6 1008 vld1.16 {d8}, [r4], r6 1009 vld1.32 {d8}, [r4], r6 1010 vld1.64 {d8}, [r4], r6 1011 vld1.8 {d8, d9}, [r4]! 1012 vld1.16 {d8, d9}, [r4]! 1013 vld1.32 {d8, d9}, [r4]! 1014 vld1.64 {d8, d9}, [r4]! 1015 vld1.8 {d8, d9}, [r4], r6 1016 vld1.16 {d8, d9}, [r4], r6 1017 vld1.32 {d8, d9}, [r4], r6 1018 vld1.64 {d8, d9}, [r4], r6 1019 vld1.8 {d8, d9, d10}, [r4]! 1020 vld1.16 {d8, d9, d10}, [r4]! 1021 vld1.32 {d8, d9, d10}, [r4]! 1022 vld1.64 {d8, d9, d10}, [r4]! 1023 vld1.8 {d8, d9, d10}, [r4], r6 1024 vld1.16 {d8, d9, d10}, [r4], r6 1025 vld1.32 {d8, d9, d10}, [r4], r6 1026 vld1.64 {d8, d9, d10}, [r4], r6 1027 vld1.8 {d8, d9, d10, d11}, [r4]! 1028 vld1.16 {d8, d9, d10, d11}, [r4]! 1029 vld1.32 {d8, d9, d10, d11}, [r4]! 1030 vld1.64 {d8, d9, d10, d11}, [r4]! 1031 vld1.8 {d8, d9, d10, d11}, [r4], r6 1032 vld1.16 {d8, d9, d10, d11}, [r4], r6 1033 vld1.32 {d8, d9, d10, d11}, [r4], r6 1034 vld1.64 {d8, d9, d10, d11}, [r4], r6 1035 vld2.8 {d8, d9}, [r4]! 1036 vld2.16 {d8, d9}, [r4]! 1037 vld2.32 {d8, d9}, [r4]! 1038 vld2.8 {d8, d9}, [r4], r6 1039 vld2.16 {d8, d9}, [r4], r6 1040 vld2.32 {d8, d9}, [r4], r6 1041 vld2.8 {d8, d10}, [r4]! 1042 vld2.16 {d8, d10}, [r4]! 1043 vld2.32 {d8, d10}, [r4]! 1044 vld2.8 {d8, d10}, [r4], r6 1045 vld2.16 {d8, d10}, [r4], r6 1046 vld2.32 {d8, d10}, [r4], r6 1047 vld3.8 {d8, d9, d10}, [r4]! 1048 vld3.16 {d8, d9, d10}, [r4]! 1049 vld3.32 {d8, d9, d10}, [r4]! 1050 vld3.8 {d8, d10, d12}, [r4], r6 1051 vld3.16 {d8, d10, d12}, [r4], r6 1052 vld3.32 {d8, d10, d12}, [r4], r6 1053 vld4.8 {d8, d9, d10, d11}, [r4]! 1054 vld4.16 {d8, d9, d10, d11}, [r4]! 1055 vld4.32 {d8, d9, d10, d11}, [r4]! 1056 vld4.8 {d8, d10, d12, d14}, [r4], r6 1057 vld4.16 {d8, d10, d12, d14}, [r4], r6 1058 vld4.32 {d8, d10, d12, d14}, [r4], r6 1059 vld1.16 {d8, d9}, [r4] 1060 vld1.32 {d8, d9}, [r4] 1061 vld1.64 {d8, d9}, [r4] 1062 vld1.8 {d8, d9}, [r4] 1063 vld2.16 {d8, d9}, [r4] 1064 vld2.32 {d8, d9}, [r4] 1065 vld2.8 {d8, d9}, [r4] 1066 vld2.16 {d8, d9}, [r4]! 1067 vld2.16 {d8, d9}, [r4], r6 1068 vld2.32 {d8, d9}, [r4]! 1069 vld2.32 {d8, d9}, [r4], r6 1070 vld2.8 {d8, d9}, [r4]! 1071 vld2.8 {d8, d9}, [r4], r6 1072 vld2.16 {d8, d10}, [r4] 1073 vld2.32 {d8, d10}, [r4] 1074 vld2.8 {d8, d10}, [r4] 1075 vld2.16 {d8, d9, d10, d11}, [r4]! 1076 vld2.16 {d8, d9, d10, d11}, [r4], r6 1077 vld2.32 {d8, d9, d10, d11}, [r4]! 1078 vld2.32 {d8, d9, d10, d11}, [r4], r6 1079 vld2.8 {d8, d9, d10, d11}, [r4]! 1080 vld2.8 {d8, d9, d10, d11}, [r4], r6 1081 vld3.8 {d8, d9, d10}, [r4] 1082 vld3.16 {d8, d9, d10}, [r4] 1083 vld3.32 {d8, d9, d10}, [r4] 1084 vld4.8 {d8, d9, d10, d11}, [r4] 1085 vld4.16 {d8, d9, d10, d11}, [r4] 1086 vld4.32 {d8, d9, d10, d11}, [r4] 1087 vld3.8 {d8, d10, d12}, [r4] 1088 vld3.16 {d8, d10, d12}, [r4] 1089 vld3.32 {d8, d10, d12}, [r4] 1090 vld4.8 {d8, d10, d12, d14}, [r4] 1091 vld4.16 {d8, d10, d12, d14}, [r4] 1092 vld4.32 {d8, d10, d12, d14}, [r4] 1093 vld2.8 {d0[], d1[]}, [r2] 1094 vld2.16 {d0[], d1[]}, [r2] 1095 vld2.32 {d0[], d1[]}, [r2] 1096 vld2.8 {d0[], d1[]}, [r2]! 1097 vld2.16 {d0[], d1[]}, [r2]! 1098 vld2.32 {d0[], d1[]}, [r2]! 1099 vld2.8 {d0[], d1[]}, [r2], r3 1100 vld2.16 {d0[], d1[]}, [r2], r3 1101 vld2.32 {d0[], d1[]}, [r2], r3 1102 vld2.8 {d0[], d2[]}, [r3] 1103 vld2.16 {d0[], d2[]}, [r3] 1104 vld2.32 {d0[], d2[]}, [r3] 1105 vld2.8 {d0[], d2[]}, [r3]! 1106 vld2.16 {d0[], d2[]}, [r3]! 1107 vld2.32 {d0[], d2[]}, [r3]! 1108 vld2.8 {d0[], d2[]}, [r3], r4 1109 vld2.16 {d0[], d2[]}, [r3], r4 1110 vld2.32 {d0[], d2[]}, [r3], r4 1111 1112# CHECK: Instruction Info: 1113# CHECK-NEXT: [1]: #uOps 1114# CHECK-NEXT: [2]: Latency 1115# CHECK-NEXT: [3]: RThroughput 1116# CHECK-NEXT: [4]: MayLoad 1117# CHECK-NEXT: [5]: MayStore 1118# CHECK-NEXT: [6]: HasSideEffects (U) 1119 1120# CHECK: [1] [2] [3] [4] [5] [6] Instructions: 1121# CHECK-NEXT: 1 3 0.50 vabs.s8 d16, d16 1122# CHECK-NEXT: 1 3 0.50 vabs.s16 d16, d16 1123# CHECK-NEXT: 1 3 0.50 vabs.s32 d16, d16 1124# CHECK-NEXT: 1 3 0.50 vabs.f32 d16, d16 1125# CHECK-NEXT: 1 3 0.50 vabs.s8 q8, q8 1126# CHECK-NEXT: 1 3 0.50 vabs.s16 q8, q8 1127# CHECK-NEXT: 1 3 0.50 vabs.s32 q8, q8 1128# CHECK-NEXT: 1 3 0.50 vabs.f32 q8, q8 1129# CHECK-NEXT: 1 3 0.50 vqabs.s8 d16, d16 1130# CHECK-NEXT: 1 3 0.50 vqabs.s16 d16, d16 1131# CHECK-NEXT: 1 3 0.50 vqabs.s32 d16, d16 1132# CHECK-NEXT: 1 3 0.50 vqabs.s8 q8, q8 1133# CHECK-NEXT: 1 3 0.50 vqabs.s16 q8, q8 1134# CHECK-NEXT: 1 3 0.50 vqabs.s32 q8, q8 1135# CHECK-NEXT: 1 3 0.50 vabd.s8 d16, d16, d17 1136# CHECK-NEXT: 1 3 0.50 vabd.s16 d16, d16, d17 1137# CHECK-NEXT: 1 3 0.50 vabd.s32 d16, d16, d17 1138# CHECK-NEXT: 1 3 0.50 vabd.u8 d16, d16, d17 1139# CHECK-NEXT: 1 3 0.50 vabd.u16 d16, d16, d17 1140# CHECK-NEXT: 1 3 0.50 vabd.u32 d16, d16, d17 1141# CHECK-NEXT: 1 5 0.50 vabd.f32 d16, d16, d17 1142# CHECK-NEXT: 1 3 0.50 vabd.s8 q8, q8, q9 1143# CHECK-NEXT: 1 3 0.50 vabd.s16 q8, q8, q9 1144# CHECK-NEXT: 1 3 0.50 vabd.s32 q8, q8, q9 1145# CHECK-NEXT: 1 3 0.50 vabd.u8 q8, q8, q9 1146# CHECK-NEXT: 1 3 0.50 vabd.u16 q8, q8, q9 1147# CHECK-NEXT: 1 3 0.50 vabd.u32 q8, q8, q9 1148# CHECK-NEXT: 1 5 0.50 vabd.f32 q8, q8, q9 1149# CHECK-NEXT: 1 3 0.50 vabdl.s8 q8, d16, d17 1150# CHECK-NEXT: 1 3 0.50 vabdl.s16 q8, d16, d17 1151# CHECK-NEXT: 1 3 0.50 vabdl.s32 q8, d16, d17 1152# CHECK-NEXT: 1 3 0.50 vabdl.u8 q8, d16, d17 1153# CHECK-NEXT: 1 3 0.50 vabdl.u16 q8, d16, d17 1154# CHECK-NEXT: 1 3 0.50 vabdl.u32 q8, d16, d17 1155# CHECK-NEXT: 1 4 1.00 vaba.s8 d16, d18, d17 1156# CHECK-NEXT: 1 4 1.00 vaba.s16 d16, d18, d17 1157# CHECK-NEXT: 1 4 1.00 vaba.s32 d16, d18, d17 1158# CHECK-NEXT: 1 4 1.00 vaba.u8 d16, d18, d17 1159# CHECK-NEXT: 1 4 1.00 vaba.u16 d16, d18, d17 1160# CHECK-NEXT: 1 4 1.00 vaba.u32 d16, d18, d17 1161# CHECK-NEXT: 1 5 1.00 vaba.s8 q9, q8, q10 1162# CHECK-NEXT: 1 5 1.00 vaba.s16 q9, q8, q10 1163# CHECK-NEXT: 1 5 1.00 vaba.s32 q9, q8, q10 1164# CHECK-NEXT: 1 5 1.00 vaba.u8 q9, q8, q10 1165# CHECK-NEXT: 1 5 1.00 vaba.u16 q9, q8, q10 1166# CHECK-NEXT: 1 5 1.00 vaba.u32 q9, q8, q10 1167# CHECK-NEXT: 1 4 1.00 vabal.s8 q8, d19, d18 1168# CHECK-NEXT: 1 4 1.00 vabal.s16 q8, d19, d18 1169# CHECK-NEXT: 1 4 1.00 vabal.s32 q8, d19, d18 1170# CHECK-NEXT: 1 4 1.00 vabal.u8 q8, d19, d18 1171# CHECK-NEXT: 1 4 1.00 vabal.u16 q8, d19, d18 1172# CHECK-NEXT: 1 4 1.00 vabal.u32 q8, d19, d18 1173# CHECK-NEXT: 1 3 0.50 vadd.i8 d16, d17, d16 1174# CHECK-NEXT: 1 3 0.50 vadd.i16 d16, d17, d16 1175# CHECK-NEXT: 1 3 0.50 vadd.i64 d16, d17, d16 1176# CHECK-NEXT: 1 3 0.50 vadd.i32 d16, d17, d16 1177# CHECK-NEXT: 1 5 0.50 vadd.f32 d16, d16, d17 1178# CHECK-NEXT: 1 5 0.50 vadd.f32 q8, q8, q9 1179# CHECK-NEXT: 1 3 0.50 vaddl.s8 q8, d17, d16 1180# CHECK-NEXT: 1 3 0.50 vaddl.s16 q8, d17, d16 1181# CHECK-NEXT: 1 3 0.50 vaddl.s32 q8, d17, d16 1182# CHECK-NEXT: 1 3 0.50 vaddl.u8 q8, d17, d16 1183# CHECK-NEXT: 1 3 0.50 vaddl.u16 q8, d17, d16 1184# CHECK-NEXT: 1 3 0.50 vaddl.u32 q8, d17, d16 1185# CHECK-NEXT: 1 3 0.50 vaddw.s8 q8, q8, d18 1186# CHECK-NEXT: 1 3 0.50 vaddw.s16 q8, q8, d18 1187# CHECK-NEXT: 1 3 0.50 vaddw.s32 q8, q8, d18 1188# CHECK-NEXT: 1 3 0.50 vaddw.u8 q8, q8, d18 1189# CHECK-NEXT: 1 3 0.50 vaddw.u16 q8, q8, d18 1190# CHECK-NEXT: 1 3 0.50 vaddw.u32 q8, q8, d18 1191# CHECK-NEXT: 1 3 0.50 vhadd.s8 d16, d16, d17 1192# CHECK-NEXT: 1 3 0.50 vhadd.s16 d16, d16, d17 1193# CHECK-NEXT: 1 3 0.50 vhadd.s32 d16, d16, d17 1194# CHECK-NEXT: 1 3 0.50 vhadd.u8 d16, d16, d17 1195# CHECK-NEXT: 1 3 0.50 vhadd.u16 d16, d16, d17 1196# CHECK-NEXT: 1 3 0.50 vhadd.u32 d16, d16, d17 1197# CHECK-NEXT: 1 3 0.50 vhadd.s8 q8, q8, q9 1198# CHECK-NEXT: 1 3 0.50 vhadd.s16 q8, q8, q9 1199# CHECK-NEXT: 1 3 0.50 vhadd.s32 q8, q8, q9 1200# CHECK-NEXT: 1 3 0.50 vhadd.u8 q8, q8, q9 1201# CHECK-NEXT: 1 3 0.50 vhadd.u16 q8, q8, q9 1202# CHECK-NEXT: 1 3 0.50 vhadd.u32 q8, q8, q9 1203# CHECK-NEXT: 1 3 0.50 vrhadd.s8 d16, d16, d17 1204# CHECK-NEXT: 1 3 0.50 vrhadd.s16 d16, d16, d17 1205# CHECK-NEXT: 1 3 0.50 vrhadd.s32 d16, d16, d17 1206# CHECK-NEXT: 1 3 0.50 vrhadd.u8 d16, d16, d17 1207# CHECK-NEXT: 1 3 0.50 vrhadd.u16 d16, d16, d17 1208# CHECK-NEXT: 1 3 0.50 vrhadd.u32 d16, d16, d17 1209# CHECK-NEXT: 1 3 0.50 vrhadd.s8 q8, q8, q9 1210# CHECK-NEXT: 1 3 0.50 vrhadd.s16 q8, q8, q9 1211# CHECK-NEXT: 1 3 0.50 vrhadd.s32 q8, q8, q9 1212# CHECK-NEXT: 1 3 0.50 vrhadd.u8 q8, q8, q9 1213# CHECK-NEXT: 1 3 0.50 vrhadd.u16 q8, q8, q9 1214# CHECK-NEXT: 1 3 0.50 vrhadd.u32 q8, q8, q9 1215# CHECK-NEXT: 1 3 0.50 vqadd.s8 d16, d16, d17 1216# CHECK-NEXT: 1 3 0.50 vqadd.s16 d16, d16, d17 1217# CHECK-NEXT: 1 3 0.50 vqadd.s32 d16, d16, d17 1218# CHECK-NEXT: 1 3 0.50 vqadd.s64 d16, d16, d17 1219# CHECK-NEXT: 1 3 0.50 vqadd.u8 d16, d16, d17 1220# CHECK-NEXT: 1 3 0.50 vqadd.u16 d16, d16, d17 1221# CHECK-NEXT: 1 3 0.50 vqadd.u32 d16, d16, d17 1222# CHECK-NEXT: 1 3 0.50 vqadd.u64 d16, d16, d17 1223# CHECK-NEXT: 1 3 0.50 vqadd.s8 q8, q8, q9 1224# CHECK-NEXT: 1 3 0.50 vqadd.s16 q8, q8, q9 1225# CHECK-NEXT: 1 3 0.50 vqadd.s32 q8, q8, q9 1226# CHECK-NEXT: 1 3 0.50 vqadd.s64 q8, q8, q9 1227# CHECK-NEXT: 1 3 0.50 vqadd.u8 q8, q8, q9 1228# CHECK-NEXT: 1 3 0.50 vqadd.u16 q8, q8, q9 1229# CHECK-NEXT: 1 3 0.50 vqadd.u32 q8, q8, q9 1230# CHECK-NEXT: 1 3 0.50 vqadd.u64 q8, q8, q9 1231# CHECK-NEXT: 1 3 0.50 vaddhn.i16 d16, q8, q9 1232# CHECK-NEXT: 1 3 0.50 vaddhn.i32 d16, q8, q9 1233# CHECK-NEXT: 1 3 0.50 vaddhn.i64 d16, q8, q9 1234# CHECK-NEXT: 1 3 0.50 vraddhn.i16 d16, q8, q9 1235# CHECK-NEXT: 1 3 0.50 vraddhn.i32 d16, q8, q9 1236# CHECK-NEXT: 1 3 0.50 vraddhn.i64 d16, q8, q9 1237# CHECK-NEXT: 1 3 0.50 vcnt.8 d16, d16 1238# CHECK-NEXT: 1 3 0.50 vcnt.8 q8, q8 1239# CHECK-NEXT: 1 3 0.50 vclz.i8 d16, d16 1240# CHECK-NEXT: 1 3 0.50 vclz.i16 d16, d16 1241# CHECK-NEXT: 1 3 0.50 vclz.i32 d16, d16 1242# CHECK-NEXT: 1 3 0.50 vclz.i8 q8, q8 1243# CHECK-NEXT: 1 3 0.50 vclz.i16 q8, q8 1244# CHECK-NEXT: 1 3 0.50 vclz.i32 q8, q8 1245# CHECK-NEXT: 1 3 0.50 vcls.s8 d16, d16 1246# CHECK-NEXT: 1 3 0.50 vcls.s16 d16, d16 1247# CHECK-NEXT: 1 3 0.50 vcls.s32 d16, d16 1248# CHECK-NEXT: 1 3 0.50 vcls.s8 q8, q8 1249# CHECK-NEXT: 1 3 0.50 vcls.s16 q8, q8 1250# CHECK-NEXT: 1 3 0.50 vcls.s32 q8, q8 1251# CHECK-NEXT: 1 3 0.50 vand d16, d17, d16 1252# CHECK-NEXT: 1 3 0.50 vand q8, q8, q9 1253# CHECK-NEXT: 1 3 0.50 veor d16, d17, d16 1254# CHECK-NEXT: 1 3 0.50 veor q8, q8, q9 1255# CHECK-NEXT: 1 3 0.50 vorr d16, d17, d16 1256# CHECK-NEXT: 1 3 0.50 vorr q8, q8, q9 1257# CHECK-NEXT: 1 3 0.50 vorr.i32 d16, #0x1000000 1258# CHECK-NEXT: 1 3 0.50 vorr.i32 q8, #0x1000000 1259# CHECK-NEXT: 1 3 0.50 vorr.i32 q8, #0x0 1260# CHECK-NEXT: 1 3 0.50 vbic d16, d17, d16 1261# CHECK-NEXT: 1 3 0.50 vbic q8, q8, q9 1262# CHECK-NEXT: 1 3 0.50 vbic.i32 d16, #0xff000000 1263# CHECK-NEXT: 1 3 0.50 vbic.i32 q8, #0xff000000 1264# CHECK-NEXT: 1 3 0.50 vorn d16, d17, d16 1265# CHECK-NEXT: 1 3 0.50 vorn q8, q8, q9 1266# CHECK-NEXT: 1 3 0.50 vmvn d16, d16 1267# CHECK-NEXT: 1 3 0.50 vmvn q8, q8 1268# CHECK-NEXT: 1 3 0.50 U vbsl d18, d17, d16 1269# CHECK-NEXT: 1 3 0.50 U vbsl q8, q10, q9 1270# CHECK-NEXT: 1 3 0.50 U vbit d18, d17, d16 1271# CHECK-NEXT: 1 3 0.50 U vbit q8, q10, q9 1272# CHECK-NEXT: 1 3 0.50 U vbif d18, d17, d16 1273# CHECK-NEXT: 1 3 0.50 U vbif q8, q10, q9 1274# CHECK-NEXT: 1 3 0.50 vceq.i8 d16, d16, d17 1275# CHECK-NEXT: 1 3 0.50 vceq.i16 d16, d16, d17 1276# CHECK-NEXT: 1 3 0.50 vceq.i32 d16, d16, d17 1277# CHECK-NEXT: 1 3 0.50 vceq.f32 d16, d16, d17 1278# CHECK-NEXT: 1 3 0.50 vceq.i8 q8, q8, q9 1279# CHECK-NEXT: 1 3 0.50 vceq.i16 q8, q8, q9 1280# CHECK-NEXT: 1 3 0.50 vceq.i32 q8, q8, q9 1281# CHECK-NEXT: 1 3 0.50 vceq.f32 q8, q8, q9 1282# CHECK-NEXT: 1 3 0.50 vcge.s8 d16, d16, d17 1283# CHECK-NEXT: 1 3 0.50 vcge.s16 d16, d16, d17 1284# CHECK-NEXT: 1 3 0.50 vcge.s32 d16, d16, d17 1285# CHECK-NEXT: 1 3 0.50 vcge.u8 d16, d16, d17 1286# CHECK-NEXT: 1 3 0.50 vcge.u16 d16, d16, d17 1287# CHECK-NEXT: 1 3 0.50 vcge.u32 d16, d16, d17 1288# CHECK-NEXT: 1 3 0.50 vcge.f32 d16, d16, d17 1289# CHECK-NEXT: 1 3 0.50 vcge.s8 q8, q8, q9 1290# CHECK-NEXT: 1 3 0.50 vcge.s16 q8, q8, q9 1291# CHECK-NEXT: 1 3 0.50 vcge.s32 q8, q8, q9 1292# CHECK-NEXT: 1 3 0.50 vcge.u8 q8, q8, q9 1293# CHECK-NEXT: 1 3 0.50 vcge.u16 q8, q8, q9 1294# CHECK-NEXT: 1 3 0.50 vcge.u32 q8, q8, q9 1295# CHECK-NEXT: 1 3 0.50 vcge.f32 q8, q8, q9 1296# CHECK-NEXT: 1 5 0.50 vacge.f32 d16, d16, d17 1297# CHECK-NEXT: 1 5 0.50 vacge.f32 q8, q8, q9 1298# CHECK-NEXT: 1 3 0.50 vcgt.s8 d16, d16, d17 1299# CHECK-NEXT: 1 3 0.50 vcgt.s16 d16, d16, d17 1300# CHECK-NEXT: 1 3 0.50 vcgt.s32 d16, d16, d17 1301# CHECK-NEXT: 1 3 0.50 vcgt.u8 d16, d16, d17 1302# CHECK-NEXT: 1 3 0.50 vcgt.u16 d16, d16, d17 1303# CHECK-NEXT: 1 3 0.50 vcgt.u32 d16, d16, d17 1304# CHECK-NEXT: 1 3 0.50 vcgt.f32 d16, d16, d17 1305# CHECK-NEXT: 1 3 0.50 vcgt.s8 q8, q8, q9 1306# CHECK-NEXT: 1 3 0.50 vcgt.s16 q8, q8, q9 1307# CHECK-NEXT: 1 3 0.50 vcgt.s32 q8, q8, q9 1308# CHECK-NEXT: 1 3 0.50 vcgt.u8 q8, q8, q9 1309# CHECK-NEXT: 1 3 0.50 vcgt.u16 q8, q8, q9 1310# CHECK-NEXT: 1 3 0.50 vcgt.u32 q8, q8, q9 1311# CHECK-NEXT: 1 3 0.50 vcgt.f32 q8, q8, q9 1312# CHECK-NEXT: 1 5 0.50 vacgt.f32 d16, d16, d17 1313# CHECK-NEXT: 1 5 0.50 vacgt.f32 q8, q8, q9 1314# CHECK-NEXT: 1 3 0.50 vtst.8 d16, d16, d17 1315# CHECK-NEXT: 1 3 0.50 vtst.16 d16, d16, d17 1316# CHECK-NEXT: 1 3 0.50 vtst.32 d16, d16, d17 1317# CHECK-NEXT: 1 3 0.50 vtst.8 q8, q8, q9 1318# CHECK-NEXT: 1 3 0.50 vtst.16 q8, q8, q9 1319# CHECK-NEXT: 1 3 0.50 vtst.32 q8, q8, q9 1320# CHECK-NEXT: 1 3 0.50 vceq.i8 d16, d16, #0 1321# CHECK-NEXT: 1 3 0.50 vcge.s8 d16, d16, #0 1322# CHECK-NEXT: 1 3 0.50 vcle.s8 d16, d16, #0 1323# CHECK-NEXT: 1 3 0.50 vcgt.s8 d16, d16, #0 1324# CHECK-NEXT: 1 3 0.50 vclt.s8 d16, d16, #0 1325# CHECK-NEXT: 1 5 0.50 vcvt.s32.f32 d16, d16 1326# CHECK-NEXT: 1 5 0.50 vcvt.u32.f32 d16, d16 1327# CHECK-NEXT: 1 5 0.50 vcvt.f32.s32 d16, d16 1328# CHECK-NEXT: 1 5 0.50 vcvt.f32.u32 d16, d16 1329# CHECK-NEXT: 1 5 0.50 vcvt.s32.f32 q8, q8 1330# CHECK-NEXT: 1 5 0.50 vcvt.u32.f32 q8, q8 1331# CHECK-NEXT: 1 5 0.50 vcvt.f32.s32 q8, q8 1332# CHECK-NEXT: 1 5 0.50 vcvt.f32.u32 q8, q8 1333# CHECK-NEXT: 1 5 0.50 vcvt.s32.f32 d16, d16, #1 1334# CHECK-NEXT: 1 5 0.50 vcvt.u32.f32 d16, d16, #1 1335# CHECK-NEXT: 1 5 0.50 vcvt.f32.s32 d16, d16, #1 1336# CHECK-NEXT: 1 5 0.50 vcvt.f32.u32 d16, d16, #1 1337# CHECK-NEXT: 1 5 0.50 vcvt.s32.f32 q8, q8, #1 1338# CHECK-NEXT: 1 5 0.50 vcvt.u32.f32 q8, q8, #1 1339# CHECK-NEXT: 1 5 0.50 vcvt.f32.s32 q8, q8, #1 1340# CHECK-NEXT: 1 5 0.50 vcvt.f32.u32 q8, q8, #1 1341# CHECK-NEXT: 1 8 0.50 vcvt.f32.f16 q8, d16 1342# CHECK-NEXT: 1 8 0.50 vcvt.f16.f32 d16, q8 1343# CHECK-NEXT: 2 8 1.00 vdup.8 d16, r0 1344# CHECK-NEXT: 2 8 1.00 vdup.16 d16, r0 1345# CHECK-NEXT: 2 8 1.00 vdup.32 d16, r0 1346# CHECK-NEXT: 2 8 1.00 vdup.8 q8, r0 1347# CHECK-NEXT: 2 8 1.00 vdup.16 q8, r0 1348# CHECK-NEXT: 2 8 1.00 vdup.32 q8, r0 1349# CHECK-NEXT: 1 3 0.50 vdup.8 d16, d16[1] 1350# CHECK-NEXT: 1 3 0.50 vdup.16 d16, d16[1] 1351# CHECK-NEXT: 1 3 0.50 vdup.32 d16, d16[1] 1352# CHECK-NEXT: 1 3 0.50 vdup.8 q8, d16[1] 1353# CHECK-NEXT: 1 3 0.50 vdup.16 q8, d16[1] 1354# CHECK-NEXT: 1 3 0.50 vdup.32 q8, d16[1] 1355# CHECK-NEXT: 1 5 0.50 vmin.s8 d16, d16, d17 1356# CHECK-NEXT: 1 5 0.50 vmin.s16 d16, d16, d17 1357# CHECK-NEXT: 1 5 0.50 vmin.s32 d16, d16, d17 1358# CHECK-NEXT: 1 5 0.50 vmin.u8 d16, d16, d17 1359# CHECK-NEXT: 1 5 0.50 vmin.u16 d16, d16, d17 1360# CHECK-NEXT: 1 5 0.50 vmin.u32 d16, d16, d17 1361# CHECK-NEXT: 1 5 0.50 vmin.f32 d16, d16, d17 1362# CHECK-NEXT: 1 5 0.50 vmin.s8 q8, q8, q9 1363# CHECK-NEXT: 1 5 0.50 vmin.s16 q8, q8, q9 1364# CHECK-NEXT: 1 5 0.50 vmin.s32 q8, q8, q9 1365# CHECK-NEXT: 1 5 0.50 vmin.u8 q8, q8, q9 1366# CHECK-NEXT: 1 5 0.50 vmin.u16 q8, q8, q9 1367# CHECK-NEXT: 1 5 0.50 vmin.u32 q8, q8, q9 1368# CHECK-NEXT: 1 5 0.50 vmin.f32 q8, q8, q9 1369# CHECK-NEXT: 1 5 0.50 vmax.s8 d16, d16, d17 1370# CHECK-NEXT: 1 5 0.50 vmax.s16 d16, d16, d17 1371# CHECK-NEXT: 1 5 0.50 vmax.s32 d16, d16, d17 1372# CHECK-NEXT: 1 5 0.50 vmax.u8 d16, d16, d17 1373# CHECK-NEXT: 1 5 0.50 vmax.u16 d16, d16, d17 1374# CHECK-NEXT: 1 5 0.50 vmax.u32 d16, d16, d17 1375# CHECK-NEXT: 1 5 0.50 vmax.f32 d16, d16, d17 1376# CHECK-NEXT: 1 5 0.50 vmax.s8 q8, q8, q9 1377# CHECK-NEXT: 1 5 0.50 vmax.s16 q8, q8, q9 1378# CHECK-NEXT: 1 5 0.50 vmax.s32 q8, q8, q9 1379# CHECK-NEXT: 1 5 0.50 vmax.u8 q8, q8, q9 1380# CHECK-NEXT: 1 5 0.50 vmax.u16 q8, q8, q9 1381# CHECK-NEXT: 1 5 0.50 vmax.u32 q8, q8, q9 1382# CHECK-NEXT: 1 5 0.50 vmax.f32 q8, q8, q9 1383# CHECK-NEXT: 1 3 0.50 vmov.i8 d16, #0x8 1384# CHECK-NEXT: 1 3 0.50 vmov.i16 d16, #0x10 1385# CHECK-NEXT: 1 3 0.50 vmov.i16 d16, #0x1000 1386# CHECK-NEXT: 1 3 0.50 vmov.i32 d16, #0x20 1387# CHECK-NEXT: 1 3 0.50 vmov.i32 d16, #0x2000 1388# CHECK-NEXT: 1 3 0.50 vmov.i32 d16, #0x200000 1389# CHECK-NEXT: 1 3 0.50 vmov.i32 d16, #0x20000000 1390# CHECK-NEXT: 1 3 0.50 vmov.i32 d16, #0x20ff 1391# CHECK-NEXT: 1 3 0.50 vmov.i32 d16, #0x20ffff 1392# CHECK-NEXT: 1 3 0.50 vmov.i64 d16, #0xff0000ff0000ffff 1393# CHECK-NEXT: 1 3 0.50 vmov.i8 q8, #0x8 1394# CHECK-NEXT: 1 3 0.50 vmov.i16 q8, #0x10 1395# CHECK-NEXT: 1 3 0.50 vmov.i16 q8, #0x1000 1396# CHECK-NEXT: 1 3 0.50 vmov.i32 q8, #0x20 1397# CHECK-NEXT: 1 3 0.50 vmov.i32 q8, #0x2000 1398# CHECK-NEXT: 1 3 0.50 vmov.i32 q8, #0x200000 1399# CHECK-NEXT: 1 3 0.50 vmov.i32 q8, #0x20000000 1400# CHECK-NEXT: 1 3 0.50 vmov.i32 q8, #0x20ff 1401# CHECK-NEXT: 1 3 0.50 vmov.i32 q8, #0x20ffff 1402# CHECK-NEXT: 1 3 0.50 vmov.i64 q8, #0xff0000ff0000ffff 1403# CHECK-NEXT: 1 3 0.50 vmvn.i16 d16, #0x10 1404# CHECK-NEXT: 1 3 0.50 vmvn.i16 d16, #0x1000 1405# CHECK-NEXT: 1 3 0.50 vmvn.i32 d16, #0x20 1406# CHECK-NEXT: 1 3 0.50 vmvn.i32 d16, #0x2000 1407# CHECK-NEXT: 1 3 0.50 vmvn.i32 d16, #0x200000 1408# CHECK-NEXT: 1 3 0.50 vmvn.i32 d16, #0x20000000 1409# CHECK-NEXT: 1 3 0.50 vmvn.i32 d16, #0x20ff 1410# CHECK-NEXT: 1 3 0.50 vmvn.i32 d16, #0x20ffff 1411# CHECK-NEXT: 1 3 1.00 vmovl.s8 q8, d16 1412# CHECK-NEXT: 1 3 1.00 vmovl.s16 q8, d16 1413# CHECK-NEXT: 1 3 1.00 vmovl.s32 q8, d16 1414# CHECK-NEXT: 1 3 1.00 vmovl.u8 q8, d16 1415# CHECK-NEXT: 1 3 1.00 vmovl.u16 q8, d16 1416# CHECK-NEXT: 1 3 1.00 vmovl.u32 q8, d16 1417# CHECK-NEXT: 1 3 0.50 vmovn.i16 d16, q8 1418# CHECK-NEXT: 1 3 0.50 vmovn.i32 d16, q8 1419# CHECK-NEXT: 1 3 0.50 vmovn.i64 d16, q8 1420# CHECK-NEXT: 1 4 1.00 vqmovn.s16 d16, q8 1421# CHECK-NEXT: 1 4 1.00 vqmovn.s32 d16, q8 1422# CHECK-NEXT: 1 4 1.00 vqmovn.s64 d16, q8 1423# CHECK-NEXT: 1 4 1.00 vqmovn.u16 d16, q8 1424# CHECK-NEXT: 1 4 1.00 vqmovn.u32 d16, q8 1425# CHECK-NEXT: 1 4 1.00 vqmovn.u64 d16, q8 1426# CHECK-NEXT: 1 4 1.00 vqmovun.s16 d16, q8 1427# CHECK-NEXT: 1 4 1.00 vqmovun.s32 d16, q8 1428# CHECK-NEXT: 1 4 1.00 vqmovun.s64 d16, q8 1429# CHECK-NEXT: 2 6 1.00 vmov.s8 r0, d16[1] 1430# CHECK-NEXT: 2 6 1.00 vmov.s16 r0, d16[1] 1431# CHECK-NEXT: 2 6 1.00 vmov.u8 r0, d16[1] 1432# CHECK-NEXT: 2 6 1.00 vmov.u16 r0, d16[1] 1433# CHECK-NEXT: 2 6 1.00 vmov.32 r0, d16[1] 1434# CHECK-NEXT: 2 8 1.00 vmov.8 d16[1], r1 1435# CHECK-NEXT: 2 8 1.00 vmov.16 d16[1], r1 1436# CHECK-NEXT: 2 8 1.00 vmov.32 d16[1], r1 1437# CHECK-NEXT: 2 8 1.00 vmov.8 d18[1], r1 1438# CHECK-NEXT: 2 8 1.00 vmov.16 d18[1], r1 1439# CHECK-NEXT: 2 8 1.00 vmov.32 d18[1], r1 1440# CHECK-NEXT: 1 5 1.00 vmla.i8 d16, d18, d17 1441# CHECK-NEXT: 1 5 1.00 vmla.i16 d16, d18, d17 1442# CHECK-NEXT: 1 5 1.00 vmla.i32 d16, d18, d17 1443# CHECK-NEXT: 1 9 0.50 vmla.f32 d16, d18, d17 1444# CHECK-NEXT: 1 6 1.00 vmla.i8 q9, q8, q10 1445# CHECK-NEXT: 1 6 1.00 vmla.i16 q9, q8, q10 1446# CHECK-NEXT: 1 6 1.00 vmla.i32 q9, q8, q10 1447# CHECK-NEXT: 1 9 0.50 vmla.f32 q9, q8, q10 1448# CHECK-NEXT: 1 5 1.00 vmlal.s8 q8, d19, d18 1449# CHECK-NEXT: 1 5 1.00 vmlal.s16 q8, d19, d18 1450# CHECK-NEXT: 1 5 1.00 vmlal.s32 q8, d19, d18 1451# CHECK-NEXT: 1 5 1.00 vmlal.u8 q8, d19, d18 1452# CHECK-NEXT: 1 5 1.00 vmlal.u16 q8, d19, d18 1453# CHECK-NEXT: 1 5 1.00 vmlal.u32 q8, d19, d18 1454# CHECK-NEXT: 1 5 1.00 vqdmlal.s16 q8, d19, d18 1455# CHECK-NEXT: 1 5 1.00 vqdmlal.s32 q8, d19, d18 1456# CHECK-NEXT: 1 5 1.00 vmls.i8 d16, d18, d17 1457# CHECK-NEXT: 1 5 1.00 vmls.i16 d16, d18, d17 1458# CHECK-NEXT: 1 5 1.00 vmls.i32 d16, d18, d17 1459# CHECK-NEXT: 1 9 0.50 vmls.f32 d16, d18, d17 1460# CHECK-NEXT: 1 6 1.00 vmls.i8 q9, q8, q10 1461# CHECK-NEXT: 1 6 1.00 vmls.i16 q9, q8, q10 1462# CHECK-NEXT: 1 6 1.00 vmls.i32 q9, q8, q10 1463# CHECK-NEXT: 1 9 0.50 vmls.f32 q9, q8, q10 1464# CHECK-NEXT: 1 5 1.00 vmlsl.s8 q8, d19, d18 1465# CHECK-NEXT: 1 5 1.00 vmlsl.s16 q8, d19, d18 1466# CHECK-NEXT: 1 5 1.00 vmlsl.s32 q8, d19, d18 1467# CHECK-NEXT: 1 5 1.00 vmlsl.u8 q8, d19, d18 1468# CHECK-NEXT: 1 5 1.00 vmlsl.u16 q8, d19, d18 1469# CHECK-NEXT: 1 5 1.00 vmlsl.u32 q8, d19, d18 1470# CHECK-NEXT: 1 5 1.00 vqdmlsl.s16 q8, d19, d18 1471# CHECK-NEXT: 1 5 1.00 vqdmlsl.s32 q8, d19, d18 1472# CHECK-NEXT: 1 5 1.00 vmul.i8 d16, d16, d17 1473# CHECK-NEXT: 1 5 1.00 vmul.i16 d16, d16, d17 1474# CHECK-NEXT: 1 5 1.00 vmul.i32 d16, d16, d17 1475# CHECK-NEXT: 1 5 0.50 vmul.f32 d16, d16, d17 1476# CHECK-NEXT: 1 6 1.00 vmul.i8 q8, q8, q9 1477# CHECK-NEXT: 1 6 1.00 vmul.i16 q8, q8, q9 1478# CHECK-NEXT: 1 6 1.00 vmul.i32 q8, q8, q9 1479# CHECK-NEXT: 1 5 0.50 vmul.f32 q8, q8, q9 1480# CHECK-NEXT: 1 5 1.00 vmul.p8 d16, d16, d17 1481# CHECK-NEXT: 1 6 1.00 vmul.p8 q8, q8, q9 1482# CHECK-NEXT: 1 5 1.00 vqdmulh.s16 d16, d16, d17 1483# CHECK-NEXT: 1 5 1.00 vqdmulh.s32 d16, d16, d17 1484# CHECK-NEXT: 1 6 1.00 vqdmulh.s16 q8, q8, q9 1485# CHECK-NEXT: 1 6 1.00 vqdmulh.s32 q8, q8, q9 1486# CHECK-NEXT: 1 5 1.00 vqrdmulh.s16 d16, d16, d17 1487# CHECK-NEXT: 1 5 1.00 vqrdmulh.s32 d16, d16, d17 1488# CHECK-NEXT: 1 6 1.00 vqrdmulh.s16 q8, q8, q9 1489# CHECK-NEXT: 1 6 1.00 vqrdmulh.s32 q8, q8, q9 1490# CHECK-NEXT: 1 5 1.00 vmull.s8 q8, d16, d17 1491# CHECK-NEXT: 1 5 1.00 vmull.s16 q8, d16, d17 1492# CHECK-NEXT: 1 5 1.00 vmull.s32 q8, d16, d17 1493# CHECK-NEXT: 1 5 1.00 vmull.u8 q8, d16, d17 1494# CHECK-NEXT: 1 5 1.00 vmull.u16 q8, d16, d17 1495# CHECK-NEXT: 1 5 1.00 vmull.u32 q8, d16, d17 1496# CHECK-NEXT: 1 5 1.00 vmull.p8 q8, d16, d17 1497# CHECK-NEXT: 1 5 1.00 vqdmull.s16 q8, d16, d17 1498# CHECK-NEXT: 1 5 1.00 vqdmull.s32 q8, d16, d17 1499# CHECK-NEXT: 1 3 0.50 vneg.s8 d16, d16 1500# CHECK-NEXT: 1 3 0.50 vneg.s16 d16, d16 1501# CHECK-NEXT: 1 3 0.50 vneg.s32 d16, d16 1502# CHECK-NEXT: 1 3 0.50 vneg.f32 d16, d16 1503# CHECK-NEXT: 1 3 0.50 vneg.s8 q8, q8 1504# CHECK-NEXT: 1 3 0.50 vneg.s16 q8, q8 1505# CHECK-NEXT: 1 3 0.50 vneg.s32 q8, q8 1506# CHECK-NEXT: 1 3 0.50 vneg.f32 q8, q8 1507# CHECK-NEXT: 1 3 0.50 vqneg.s8 d16, d16 1508# CHECK-NEXT: 1 3 0.50 vqneg.s16 d16, d16 1509# CHECK-NEXT: 1 3 0.50 vqneg.s32 d16, d16 1510# CHECK-NEXT: 1 3 0.50 vqneg.s8 q8, q8 1511# CHECK-NEXT: 1 3 0.50 vqneg.s16 q8, q8 1512# CHECK-NEXT: 1 3 0.50 vqneg.s32 q8, q8 1513# CHECK-NEXT: 1 3 0.50 vpadd.i8 d16, d17, d16 1514# CHECK-NEXT: 1 3 0.50 vpadd.i16 d16, d17, d16 1515# CHECK-NEXT: 1 3 0.50 vpadd.i32 d16, d17, d16 1516# CHECK-NEXT: 1 5 0.50 vpadd.f32 d16, d16, d17 1517# CHECK-NEXT: 1 3 0.50 vpaddl.s8 d16, d16 1518# CHECK-NEXT: 1 3 0.50 vpaddl.s16 d16, d16 1519# CHECK-NEXT: 1 3 0.50 vpaddl.s32 d16, d16 1520# CHECK-NEXT: 1 3 0.50 vpaddl.u8 d16, d16 1521# CHECK-NEXT: 1 3 0.50 vpaddl.u16 d16, d16 1522# CHECK-NEXT: 1 3 0.50 vpaddl.u32 d16, d16 1523# CHECK-NEXT: 1 3 0.50 vpaddl.s8 q8, q8 1524# CHECK-NEXT: 1 3 0.50 vpaddl.s16 q8, q8 1525# CHECK-NEXT: 1 3 0.50 vpaddl.s32 q8, q8 1526# CHECK-NEXT: 1 3 0.50 vpaddl.u8 q8, q8 1527# CHECK-NEXT: 1 3 0.50 vpaddl.u16 q8, q8 1528# CHECK-NEXT: 1 3 0.50 vpaddl.u32 q8, q8 1529# CHECK-NEXT: 1 4 1.00 vpadal.s8 d16, d17 1530# CHECK-NEXT: 1 4 1.00 vpadal.s16 d16, d17 1531# CHECK-NEXT: 1 4 1.00 vpadal.s32 d16, d17 1532# CHECK-NEXT: 1 4 1.00 vpadal.u8 d16, d17 1533# CHECK-NEXT: 1 4 1.00 vpadal.u16 d16, d17 1534# CHECK-NEXT: 1 4 1.00 vpadal.u32 d16, d17 1535# CHECK-NEXT: 1 4 1.00 vpadal.s8 q9, q8 1536# CHECK-NEXT: 1 4 1.00 vpadal.s16 q9, q8 1537# CHECK-NEXT: 1 4 1.00 vpadal.s32 q9, q8 1538# CHECK-NEXT: 1 4 1.00 vpadal.u8 q9, q8 1539# CHECK-NEXT: 1 4 1.00 vpadal.u16 q9, q8 1540# CHECK-NEXT: 1 4 1.00 vpadal.u32 q9, q8 1541# CHECK-NEXT: 1 3 0.50 vpmin.s8 d16, d16, d17 1542# CHECK-NEXT: 1 3 0.50 vpmin.s16 d16, d16, d17 1543# CHECK-NEXT: 1 3 0.50 vpmin.s32 d16, d16, d17 1544# CHECK-NEXT: 1 3 0.50 vpmin.u8 d16, d16, d17 1545# CHECK-NEXT: 1 3 0.50 vpmin.u16 d16, d16, d17 1546# CHECK-NEXT: 1 3 0.50 vpmin.u32 d16, d16, d17 1547# CHECK-NEXT: 1 5 0.50 vpmin.f32 d16, d16, d17 1548# CHECK-NEXT: 1 3 0.50 vpmax.s8 d16, d16, d17 1549# CHECK-NEXT: 1 3 0.50 vpmax.s16 d16, d16, d17 1550# CHECK-NEXT: 1 3 0.50 vpmax.s32 d16, d16, d17 1551# CHECK-NEXT: 1 3 0.50 vpmax.u8 d16, d16, d17 1552# CHECK-NEXT: 1 3 0.50 vpmax.u16 d16, d16, d17 1553# CHECK-NEXT: 1 3 0.50 vpmax.u32 d16, d16, d17 1554# CHECK-NEXT: 1 5 0.50 vpmax.f32 d16, d16, d17 1555# CHECK-NEXT: 1 5 0.50 vrecpe.u32 d16, d16 1556# CHECK-NEXT: 1 5 0.50 vrecpe.u32 q8, q8 1557# CHECK-NEXT: 1 5 0.50 vrecpe.f32 d16, d16 1558# CHECK-NEXT: 1 5 0.50 vrecpe.f32 q8, q8 1559# CHECK-NEXT: 1 9 0.50 vrecps.f32 d16, d16, d17 1560# CHECK-NEXT: 1 9 0.50 vrecps.f32 q8, q8, q9 1561# CHECK-NEXT: 1 5 0.50 vrsqrte.u32 d16, d16 1562# CHECK-NEXT: 1 5 0.50 vrsqrte.u32 q8, q8 1563# CHECK-NEXT: 1 5 0.50 vrsqrte.f32 d16, d16 1564# CHECK-NEXT: 1 5 0.50 vrsqrte.f32 q8, q8 1565# CHECK-NEXT: 1 9 0.50 vrsqrts.f32 d16, d16, d17 1566# CHECK-NEXT: 1 9 0.50 vrsqrts.f32 q8, q8, q9 1567# CHECK-NEXT: 1 3 0.50 vrev64.8 d16, d16 1568# CHECK-NEXT: 1 3 0.50 vrev64.16 d16, d16 1569# CHECK-NEXT: 1 3 0.50 vrev64.32 d16, d16 1570# CHECK-NEXT: 1 3 0.50 vrev64.8 q8, q8 1571# CHECK-NEXT: 1 3 0.50 vrev64.16 q8, q8 1572# CHECK-NEXT: 1 3 0.50 vrev64.32 q8, q8 1573# CHECK-NEXT: 1 3 0.50 vrev32.8 d16, d16 1574# CHECK-NEXT: 1 3 0.50 vrev32.16 d16, d16 1575# CHECK-NEXT: 1 3 0.50 vrev32.8 q8, q8 1576# CHECK-NEXT: 1 3 0.50 vrev32.16 q8, q8 1577# CHECK-NEXT: 1 3 0.50 vrev16.8 d16, d16 1578# CHECK-NEXT: 1 3 0.50 vrev16.8 q8, q8 1579# CHECK-NEXT: 1 4 1.00 vqshl.s8 d16, d16, d17 1580# CHECK-NEXT: 1 4 1.00 vqshl.s16 d16, d16, d17 1581# CHECK-NEXT: 1 4 1.00 vqshl.s32 d16, d16, d17 1582# CHECK-NEXT: 1 4 1.00 vqshl.s64 d16, d16, d17 1583# CHECK-NEXT: 1 4 1.00 vqshl.u8 d16, d16, d17 1584# CHECK-NEXT: 1 4 1.00 vqshl.u16 d16, d16, d17 1585# CHECK-NEXT: 1 4 1.00 vqshl.u32 d16, d16, d17 1586# CHECK-NEXT: 1 4 1.00 vqshl.u64 d16, d16, d17 1587# CHECK-NEXT: 1 5 1.00 vqshl.s8 q8, q8, q9 1588# CHECK-NEXT: 1 5 1.00 vqshl.s16 q8, q8, q9 1589# CHECK-NEXT: 1 5 1.00 vqshl.s32 q8, q8, q9 1590# CHECK-NEXT: 1 5 1.00 vqshl.s64 q8, q8, q9 1591# CHECK-NEXT: 1 5 1.00 vqshl.u8 q8, q8, q9 1592# CHECK-NEXT: 1 5 1.00 vqshl.u16 q8, q8, q9 1593# CHECK-NEXT: 1 5 1.00 vqshl.u32 q8, q8, q9 1594# CHECK-NEXT: 1 5 1.00 vqshl.u64 q8, q8, q9 1595# CHECK-NEXT: 1 4 1.00 vqshl.s8 d16, d16, #7 1596# CHECK-NEXT: 1 4 1.00 vqshl.s16 d16, d16, #15 1597# CHECK-NEXT: 1 4 1.00 vqshl.s32 d16, d16, #31 1598# CHECK-NEXT: 1 4 1.00 vqshl.s64 d16, d16, #63 1599# CHECK-NEXT: 1 4 1.00 vqshl.u8 d16, d16, #7 1600# CHECK-NEXT: 1 4 1.00 vqshl.u16 d16, d16, #15 1601# CHECK-NEXT: 1 4 1.00 vqshl.u32 d16, d16, #31 1602# CHECK-NEXT: 1 4 1.00 vqshl.u64 d16, d16, #63 1603# CHECK-NEXT: 1 4 1.00 vqshlu.s8 d16, d16, #7 1604# CHECK-NEXT: 1 4 1.00 vqshlu.s16 d16, d16, #15 1605# CHECK-NEXT: 1 4 1.00 vqshlu.s32 d16, d16, #31 1606# CHECK-NEXT: 1 4 1.00 vqshlu.s64 d16, d16, #63 1607# CHECK-NEXT: 1 4 1.00 vqshl.s8 q8, q8, #7 1608# CHECK-NEXT: 1 4 1.00 vqshl.s16 q8, q8, #15 1609# CHECK-NEXT: 1 4 1.00 vqshl.s32 q8, q8, #31 1610# CHECK-NEXT: 1 4 1.00 vqshl.s64 q8, q8, #63 1611# CHECK-NEXT: 1 4 1.00 vqshl.u8 q8, q8, #7 1612# CHECK-NEXT: 1 4 1.00 vqshl.u16 q8, q8, #15 1613# CHECK-NEXT: 1 4 1.00 vqshl.u32 q8, q8, #31 1614# CHECK-NEXT: 1 4 1.00 vqshl.u64 q8, q8, #63 1615# CHECK-NEXT: 1 4 1.00 vqshlu.s8 q8, q8, #7 1616# CHECK-NEXT: 1 4 1.00 vqshlu.s16 q8, q8, #15 1617# CHECK-NEXT: 1 4 1.00 vqshlu.s32 q8, q8, #31 1618# CHECK-NEXT: 1 4 1.00 vqshlu.s64 q8, q8, #63 1619# CHECK-NEXT: 1 4 1.00 vqrshl.s8 d16, d16, d17 1620# CHECK-NEXT: 1 4 1.00 vqrshl.s16 d16, d16, d17 1621# CHECK-NEXT: 1 4 1.00 vqrshl.s32 d16, d16, d17 1622# CHECK-NEXT: 1 4 1.00 vqrshl.s64 d16, d16, d17 1623# CHECK-NEXT: 1 4 1.00 vqrshl.u8 d16, d16, d17 1624# CHECK-NEXT: 1 4 1.00 vqrshl.u16 d16, d16, d17 1625# CHECK-NEXT: 1 4 1.00 vqrshl.u32 d16, d16, d17 1626# CHECK-NEXT: 1 4 1.00 vqrshl.u64 d16, d16, d17 1627# CHECK-NEXT: 1 5 1.00 vqrshl.s8 q8, q8, q9 1628# CHECK-NEXT: 1 5 1.00 vqrshl.s16 q8, q8, q9 1629# CHECK-NEXT: 1 5 1.00 vqrshl.s32 q8, q8, q9 1630# CHECK-NEXT: 1 5 1.00 vqrshl.s64 q8, q8, q9 1631# CHECK-NEXT: 1 5 1.00 vqrshl.u8 q8, q8, q9 1632# CHECK-NEXT: 1 5 1.00 vqrshl.u16 q8, q8, q9 1633# CHECK-NEXT: 1 5 1.00 vqrshl.u32 q8, q8, q9 1634# CHECK-NEXT: 1 5 1.00 vqrshl.u64 q8, q8, q9 1635# CHECK-NEXT: 1 4 1.00 vqshrn.s16 d16, q8, #8 1636# CHECK-NEXT: 1 4 1.00 vqshrn.s32 d16, q8, #16 1637# CHECK-NEXT: 1 4 1.00 vqshrn.s64 d16, q8, #32 1638# CHECK-NEXT: 1 4 1.00 vqshrn.u16 d16, q8, #8 1639# CHECK-NEXT: 1 4 1.00 vqshrn.u32 d16, q8, #16 1640# CHECK-NEXT: 1 4 1.00 vqshrn.u64 d16, q8, #32 1641# CHECK-NEXT: 1 4 1.00 vqshrun.s16 d16, q8, #8 1642# CHECK-NEXT: 1 4 1.00 vqshrun.s32 d16, q8, #16 1643# CHECK-NEXT: 1 4 1.00 vqshrun.s64 d16, q8, #32 1644# CHECK-NEXT: 1 4 1.00 vqrshrn.s16 d16, q8, #8 1645# CHECK-NEXT: 1 4 1.00 vqrshrn.s32 d16, q8, #16 1646# CHECK-NEXT: 1 4 1.00 vqrshrn.s64 d16, q8, #32 1647# CHECK-NEXT: 1 4 1.00 vqrshrn.u16 d16, q8, #8 1648# CHECK-NEXT: 1 4 1.00 vqrshrn.u32 d16, q8, #16 1649# CHECK-NEXT: 1 4 1.00 vqrshrn.u64 d16, q8, #32 1650# CHECK-NEXT: 1 4 1.00 vqrshrun.s16 d16, q8, #8 1651# CHECK-NEXT: 1 4 1.00 vqrshrun.s32 d16, q8, #16 1652# CHECK-NEXT: 1 4 1.00 vqrshrun.s64 d16, q8, #32 1653# CHECK-NEXT: 1 3 1.00 vshl.u8 d16, d17, d16 1654# CHECK-NEXT: 1 3 1.00 vshl.u16 d16, d17, d16 1655# CHECK-NEXT: 1 3 1.00 vshl.u32 d16, d17, d16 1656# CHECK-NEXT: 1 3 1.00 vshl.u64 d16, d17, d16 1657# CHECK-NEXT: 1 3 1.00 vshl.i8 d16, d16, #7 1658# CHECK-NEXT: 1 3 1.00 vshl.i16 d16, d16, #15 1659# CHECK-NEXT: 1 3 1.00 vshl.i32 d16, d16, #31 1660# CHECK-NEXT: 1 3 1.00 vshl.i64 d16, d16, #63 1661# CHECK-NEXT: 1 4 1.00 vshl.u8 q8, q9, q8 1662# CHECK-NEXT: 1 4 1.00 vshl.u16 q8, q9, q8 1663# CHECK-NEXT: 1 4 1.00 vshl.u32 q8, q9, q8 1664# CHECK-NEXT: 1 4 1.00 vshl.u64 q8, q9, q8 1665# CHECK-NEXT: 1 3 1.00 vshl.i8 q8, q8, #7 1666# CHECK-NEXT: 1 3 1.00 vshl.i16 q8, q8, #15 1667# CHECK-NEXT: 1 3 1.00 vshl.i32 q8, q8, #31 1668# CHECK-NEXT: 1 3 1.00 vshl.i64 q8, q8, #63 1669# CHECK-NEXT: 1 3 1.00 vshr.u8 d16, d16, #7 1670# CHECK-NEXT: 1 3 1.00 vshr.u16 d16, d16, #15 1671# CHECK-NEXT: 1 3 1.00 vshr.u32 d16, d16, #31 1672# CHECK-NEXT: 1 3 1.00 vshr.u64 d16, d16, #63 1673# CHECK-NEXT: 1 3 1.00 vshr.u8 q8, q8, #7 1674# CHECK-NEXT: 1 3 1.00 vshr.u16 q8, q8, #15 1675# CHECK-NEXT: 1 3 1.00 vshr.u32 q8, q8, #31 1676# CHECK-NEXT: 1 3 1.00 vshr.u64 q8, q8, #63 1677# CHECK-NEXT: 1 3 1.00 vshr.s8 d16, d16, #7 1678# CHECK-NEXT: 1 3 1.00 vshr.s16 d16, d16, #15 1679# CHECK-NEXT: 1 3 1.00 vshr.s32 d16, d16, #31 1680# CHECK-NEXT: 1 3 1.00 vshr.s64 d16, d16, #63 1681# CHECK-NEXT: 1 3 1.00 vshr.s8 q8, q8, #7 1682# CHECK-NEXT: 1 3 1.00 vshr.s16 q8, q8, #15 1683# CHECK-NEXT: 1 3 1.00 vshr.s32 q8, q8, #31 1684# CHECK-NEXT: 1 3 1.00 vshr.s64 q8, q8, #63 1685# CHECK-NEXT: 1 4 1.00 vsra.u8 d16, d16, #7 1686# CHECK-NEXT: 1 4 1.00 vsra.u16 d16, d16, #15 1687# CHECK-NEXT: 1 4 1.00 vsra.u32 d16, d16, #31 1688# CHECK-NEXT: 1 4 1.00 vsra.u64 d16, d16, #63 1689# CHECK-NEXT: 1 4 1.00 vsra.u8 q8, q8, #7 1690# CHECK-NEXT: 1 4 1.00 vsra.u16 q8, q8, #15 1691# CHECK-NEXT: 1 4 1.00 vsra.u32 q8, q8, #31 1692# CHECK-NEXT: 1 4 1.00 vsra.u64 q8, q8, #63 1693# CHECK-NEXT: 1 4 1.00 vsra.s8 d16, d16, #7 1694# CHECK-NEXT: 1 4 1.00 vsra.s16 d16, d16, #15 1695# CHECK-NEXT: 1 4 1.00 vsra.s32 d16, d16, #31 1696# CHECK-NEXT: 1 4 1.00 vsra.s64 d16, d16, #63 1697# CHECK-NEXT: 1 4 1.00 vsra.s8 q8, q8, #7 1698# CHECK-NEXT: 1 4 1.00 vsra.s16 q8, q8, #15 1699# CHECK-NEXT: 1 4 1.00 vsra.s32 q8, q8, #31 1700# CHECK-NEXT: 1 4 1.00 vsra.s64 q8, q8, #63 1701# CHECK-NEXT: 1 4 1.00 vsri.8 d16, d16, #7 1702# CHECK-NEXT: 1 4 1.00 vsri.16 d16, d16, #15 1703# CHECK-NEXT: 1 4 1.00 vsri.32 d16, d16, #31 1704# CHECK-NEXT: 1 4 1.00 vsri.64 d16, d16, #63 1705# CHECK-NEXT: 1 5 1.00 vsri.8 q8, q8, #7 1706# CHECK-NEXT: 1 5 1.00 vsri.16 q8, q8, #15 1707# CHECK-NEXT: 1 5 1.00 vsri.32 q8, q8, #31 1708# CHECK-NEXT: 1 5 1.00 vsri.64 q8, q8, #63 1709# CHECK-NEXT: 1 4 1.00 vsli.8 d16, d16, #7 1710# CHECK-NEXT: 1 4 1.00 vsli.16 d16, d16, #15 1711# CHECK-NEXT: 1 4 1.00 vsli.32 d16, d16, #31 1712# CHECK-NEXT: 1 4 1.00 vsli.64 d16, d16, #63 1713# CHECK-NEXT: 1 5 1.00 vsli.8 q8, q8, #7 1714# CHECK-NEXT: 1 5 1.00 vsli.16 q8, q8, #15 1715# CHECK-NEXT: 1 5 1.00 vsli.32 q8, q8, #31 1716# CHECK-NEXT: 1 5 1.00 vsli.64 q8, q8, #63 1717# CHECK-NEXT: 1 3 1.00 vshll.s8 q8, d16, #7 1718# CHECK-NEXT: 1 3 1.00 vshll.s16 q8, d16, #15 1719# CHECK-NEXT: 1 3 1.00 vshll.s32 q8, d16, #31 1720# CHECK-NEXT: 1 3 1.00 vshll.u8 q8, d16, #7 1721# CHECK-NEXT: 1 3 1.00 vshll.u16 q8, d16, #15 1722# CHECK-NEXT: 1 3 1.00 vshll.u32 q8, d16, #31 1723# CHECK-NEXT: 1 3 1.00 vshll.i8 q8, d16, #8 1724# CHECK-NEXT: 1 3 1.00 vshll.i16 q8, d16, #16 1725# CHECK-NEXT: 1 3 1.00 vshll.i32 q8, d16, #32 1726# CHECK-NEXT: 1 3 1.00 vshrn.i16 d16, q8, #8 1727# CHECK-NEXT: 1 3 1.00 vshrn.i32 d16, q8, #16 1728# CHECK-NEXT: 1 3 1.00 vshrn.i64 d16, q8, #32 1729# CHECK-NEXT: 1 4 1.00 vrshl.s8 d16, d17, d16 1730# CHECK-NEXT: 1 4 1.00 vrshl.s16 d16, d17, d16 1731# CHECK-NEXT: 1 4 1.00 vrshl.s32 d16, d17, d16 1732# CHECK-NEXT: 1 4 1.00 vrshl.s64 d16, d17, d16 1733# CHECK-NEXT: 1 4 1.00 vrshl.u8 d16, d17, d16 1734# CHECK-NEXT: 1 4 1.00 vrshl.u16 d16, d17, d16 1735# CHECK-NEXT: 1 4 1.00 vrshl.u32 d16, d17, d16 1736# CHECK-NEXT: 1 4 1.00 vrshl.u64 d16, d17, d16 1737# CHECK-NEXT: 1 5 1.00 vrshl.s8 q8, q9, q8 1738# CHECK-NEXT: 1 5 1.00 vrshl.s16 q8, q9, q8 1739# CHECK-NEXT: 1 5 1.00 vrshl.s32 q8, q9, q8 1740# CHECK-NEXT: 1 5 1.00 vrshl.s64 q8, q9, q8 1741# CHECK-NEXT: 1 5 1.00 vrshl.u8 q8, q9, q8 1742# CHECK-NEXT: 1 5 1.00 vrshl.u16 q8, q9, q8 1743# CHECK-NEXT: 1 5 1.00 vrshl.u32 q8, q9, q8 1744# CHECK-NEXT: 1 5 1.00 vrshl.u64 q8, q9, q8 1745# CHECK-NEXT: 1 4 1.00 vrshr.s8 d16, d16, #8 1746# CHECK-NEXT: 1 4 1.00 vrshr.s16 d16, d16, #16 1747# CHECK-NEXT: 1 4 1.00 vrshr.s32 d16, d16, #32 1748# CHECK-NEXT: 1 4 1.00 vrshr.s64 d16, d16, #64 1749# CHECK-NEXT: 1 4 1.00 vrshr.u8 d16, d16, #8 1750# CHECK-NEXT: 1 4 1.00 vrshr.u16 d16, d16, #16 1751# CHECK-NEXT: 1 4 1.00 vrshr.u32 d16, d16, #32 1752# CHECK-NEXT: 1 4 1.00 vrshr.u64 d16, d16, #64 1753# CHECK-NEXT: 1 4 1.00 vrshr.s8 q8, q8, #8 1754# CHECK-NEXT: 1 4 1.00 vrshr.s16 q8, q8, #16 1755# CHECK-NEXT: 1 4 1.00 vrshr.s32 q8, q8, #32 1756# CHECK-NEXT: 1 4 1.00 vrshr.s64 q8, q8, #64 1757# CHECK-NEXT: 1 4 1.00 vrshr.u8 q8, q8, #8 1758# CHECK-NEXT: 1 4 1.00 vrshr.u16 q8, q8, #16 1759# CHECK-NEXT: 1 4 1.00 vrshr.u32 q8, q8, #32 1760# CHECK-NEXT: 1 4 1.00 vrshr.u64 q8, q8, #64 1761# CHECK-NEXT: 1 4 1.00 vrshrn.i16 d16, q8, #8 1762# CHECK-NEXT: 1 4 1.00 vrshrn.i32 d16, q8, #16 1763# CHECK-NEXT: 1 4 1.00 vrshrn.i64 d16, q8, #32 1764# CHECK-NEXT: 1 4 1.00 vqrshrn.s16 d16, q8, #4 1765# CHECK-NEXT: 1 4 1.00 vqrshrn.s32 d16, q8, #13 1766# CHECK-NEXT: 1 4 1.00 vqrshrn.s64 d16, q8, #13 1767# CHECK-NEXT: 1 4 1.00 vqrshrn.u16 d16, q8, #4 1768# CHECK-NEXT: 1 4 1.00 vqrshrn.u32 d16, q8, #13 1769# CHECK-NEXT: 1 4 1.00 vqrshrn.u64 d16, q8, #13 1770# CHECK-NEXT: 1 4 1.00 vsra.s8 d17, d16, #8 1771# CHECK-NEXT: 1 4 1.00 vsra.s16 d17, d16, #16 1772# CHECK-NEXT: 1 4 1.00 vsra.s32 d17, d16, #32 1773# CHECK-NEXT: 1 4 1.00 vsra.s64 d17, d16, #64 1774# CHECK-NEXT: 1 4 1.00 vsra.s8 q8, q9, #8 1775# CHECK-NEXT: 1 4 1.00 vsra.s16 q8, q9, #16 1776# CHECK-NEXT: 1 4 1.00 vsra.s32 q8, q9, #32 1777# CHECK-NEXT: 1 4 1.00 vsra.s64 q8, q9, #64 1778# CHECK-NEXT: 1 4 1.00 vsra.u8 d17, d16, #8 1779# CHECK-NEXT: 1 4 1.00 vsra.u16 d17, d16, #16 1780# CHECK-NEXT: 1 4 1.00 vsra.u32 d17, d16, #32 1781# CHECK-NEXT: 1 4 1.00 vsra.u64 d17, d16, #64 1782# CHECK-NEXT: 1 4 1.00 vsra.u8 q8, q9, #8 1783# CHECK-NEXT: 1 4 1.00 vsra.u16 q8, q9, #16 1784# CHECK-NEXT: 1 4 1.00 vsra.u32 q8, q9, #32 1785# CHECK-NEXT: 1 4 1.00 vsra.u64 q8, q9, #64 1786# CHECK-NEXT: 1 4 1.00 vrsra.s8 d17, d16, #8 1787# CHECK-NEXT: 1 4 1.00 vrsra.s16 d17, d16, #16 1788# CHECK-NEXT: 1 4 1.00 vrsra.s32 d17, d16, #32 1789# CHECK-NEXT: 1 4 1.00 vrsra.s64 d17, d16, #64 1790# CHECK-NEXT: 1 4 1.00 vrsra.u8 d17, d16, #8 1791# CHECK-NEXT: 1 4 1.00 vrsra.u16 d17, d16, #16 1792# CHECK-NEXT: 1 4 1.00 vrsra.u32 d17, d16, #32 1793# CHECK-NEXT: 1 4 1.00 vrsra.u64 d17, d16, #64 1794# CHECK-NEXT: 1 4 1.00 vrsra.s8 q8, q9, #8 1795# CHECK-NEXT: 1 4 1.00 vrsra.s16 q8, q9, #16 1796# CHECK-NEXT: 1 4 1.00 vrsra.s32 q8, q9, #32 1797# CHECK-NEXT: 1 4 1.00 vrsra.s64 q8, q9, #64 1798# CHECK-NEXT: 1 4 1.00 vrsra.u8 q8, q9, #8 1799# CHECK-NEXT: 1 4 1.00 vrsra.u16 q8, q9, #16 1800# CHECK-NEXT: 1 4 1.00 vrsra.u32 q8, q9, #32 1801# CHECK-NEXT: 1 4 1.00 vrsra.u64 q8, q9, #64 1802# CHECK-NEXT: 1 4 1.00 vsli.8 d17, d16, #7 1803# CHECK-NEXT: 1 4 1.00 vsli.16 d17, d16, #15 1804# CHECK-NEXT: 1 4 1.00 vsli.32 d17, d16, #31 1805# CHECK-NEXT: 1 4 1.00 vsli.64 d17, d16, #63 1806# CHECK-NEXT: 1 5 1.00 vsli.8 q9, q8, #7 1807# CHECK-NEXT: 1 5 1.00 vsli.16 q9, q8, #15 1808# CHECK-NEXT: 1 5 1.00 vsli.32 q9, q8, #31 1809# CHECK-NEXT: 1 5 1.00 vsli.64 q9, q8, #63 1810# CHECK-NEXT: 1 4 1.00 vsri.8 d17, d16, #8 1811# CHECK-NEXT: 1 4 1.00 vsri.16 d17, d16, #16 1812# CHECK-NEXT: 1 4 1.00 vsri.32 d17, d16, #32 1813# CHECK-NEXT: 1 4 1.00 vsri.64 d17, d16, #64 1814# CHECK-NEXT: 1 5 1.00 vsri.8 q9, q8, #8 1815# CHECK-NEXT: 1 5 1.00 vsri.16 q9, q8, #16 1816# CHECK-NEXT: 1 5 1.00 vsri.32 q9, q8, #32 1817# CHECK-NEXT: 1 5 1.00 vsri.64 q9, q8, #64 1818# CHECK-NEXT: 1 3 0.50 vext.8 d16, d17, d16, #3 1819# CHECK-NEXT: 1 3 0.50 vext.8 d16, d17, d16, #5 1820# CHECK-NEXT: 1 3 0.50 vext.8 q8, q9, q8, #3 1821# CHECK-NEXT: 1 3 0.50 vext.8 q8, q9, q8, #7 1822# CHECK-NEXT: 1 3 0.50 vext.16 d16, d17, d16, #3 1823# CHECK-NEXT: 1 3 0.50 vext.32 q8, q9, q8, #3 1824# CHECK-NEXT: 2 3 1.00 U vtrn.8 d17, d16 1825# CHECK-NEXT: 2 3 1.00 U vtrn.16 d17, d16 1826# CHECK-NEXT: 2 3 1.00 U vtrn.32 d17, d16 1827# CHECK-NEXT: 2 3 1.00 U vtrn.8 q9, q8 1828# CHECK-NEXT: 2 3 1.00 U vtrn.16 q9, q8 1829# CHECK-NEXT: 2 3 1.00 U vtrn.32 q9, q8 1830# CHECK-NEXT: 2 3 1.00 U vuzp.8 d17, d16 1831# CHECK-NEXT: 2 3 1.00 U vuzp.16 d17, d16 1832# CHECK-NEXT: 2 6 1.00 U vuzp.8 q9, q8 1833# CHECK-NEXT: 2 6 1.00 U vuzp.16 q9, q8 1834# CHECK-NEXT: 2 6 1.00 U vuzp.32 q9, q8 1835# CHECK-NEXT: 2 3 1.00 U vzip.8 d17, d16 1836# CHECK-NEXT: 2 3 1.00 U vzip.16 d17, d16 1837# CHECK-NEXT: 2 6 1.00 U vzip.8 q9, q8 1838# CHECK-NEXT: 2 6 1.00 U vzip.16 q9, q8 1839# CHECK-NEXT: 2 6 1.00 U vzip.32 q9, q8 1840# CHECK-NEXT: 1 3 0.50 vsub.i8 d16, d17, d16 1841# CHECK-NEXT: 1 3 0.50 vsub.i16 d16, d17, d16 1842# CHECK-NEXT: 1 3 0.50 vsub.i32 d16, d17, d16 1843# CHECK-NEXT: 1 3 0.50 vsub.i64 d16, d17, d16 1844# CHECK-NEXT: 1 5 0.50 vsub.f32 d16, d16, d17 1845# CHECK-NEXT: 1 3 0.50 vsub.i8 q8, q8, q9 1846# CHECK-NEXT: 1 3 0.50 vsub.i16 q8, q8, q9 1847# CHECK-NEXT: 1 3 0.50 vsub.i32 q8, q8, q9 1848# CHECK-NEXT: 1 3 0.50 vsub.i64 q8, q8, q9 1849# CHECK-NEXT: 1 5 0.50 vsub.f32 q8, q8, q9 1850# CHECK-NEXT: 1 3 0.50 vsubl.s8 q8, d17, d16 1851# CHECK-NEXT: 1 3 0.50 vsubl.s16 q8, d17, d16 1852# CHECK-NEXT: 1 3 0.50 vsubl.s32 q8, d17, d16 1853# CHECK-NEXT: 1 3 0.50 vsubl.u8 q8, d17, d16 1854# CHECK-NEXT: 1 3 0.50 vsubl.u16 q8, d17, d16 1855# CHECK-NEXT: 1 3 0.50 vsubl.u32 q8, d17, d16 1856# CHECK-NEXT: 1 3 0.50 vsubw.s8 q8, q8, d18 1857# CHECK-NEXT: 1 3 0.50 vsubw.s16 q8, q8, d18 1858# CHECK-NEXT: 1 3 0.50 vsubw.s32 q8, q8, d18 1859# CHECK-NEXT: 1 3 0.50 vsubw.u8 q8, q8, d18 1860# CHECK-NEXT: 1 3 0.50 vsubw.u16 q8, q8, d18 1861# CHECK-NEXT: 1 3 0.50 vsubw.u32 q8, q8, d18 1862# CHECK-NEXT: 1 3 0.50 vhsub.s8 d16, d16, d17 1863# CHECK-NEXT: 1 3 0.50 vhsub.s16 d16, d16, d17 1864# CHECK-NEXT: 1 3 0.50 vhsub.s32 d16, d16, d17 1865# CHECK-NEXT: 1 3 0.50 vhsub.u8 d16, d16, d17 1866# CHECK-NEXT: 1 3 0.50 vhsub.u16 d16, d16, d17 1867# CHECK-NEXT: 1 3 0.50 vhsub.u32 d16, d16, d17 1868# CHECK-NEXT: 1 3 0.50 vhsub.s8 q8, q8, q9 1869# CHECK-NEXT: 1 3 0.50 vhsub.s16 q8, q8, q9 1870# CHECK-NEXT: 1 3 0.50 vhsub.s32 q8, q8, q9 1871# CHECK-NEXT: 1 3 0.50 vqsub.s8 d16, d16, d17 1872# CHECK-NEXT: 1 3 0.50 vqsub.s16 d16, d16, d17 1873# CHECK-NEXT: 1 3 0.50 vqsub.s32 d16, d16, d17 1874# CHECK-NEXT: 1 3 0.50 vqsub.s64 d16, d16, d17 1875# CHECK-NEXT: 1 3 0.50 vqsub.u8 d16, d16, d17 1876# CHECK-NEXT: 1 3 0.50 vqsub.u16 d16, d16, d17 1877# CHECK-NEXT: 1 3 0.50 vqsub.u32 d16, d16, d17 1878# CHECK-NEXT: 1 3 0.50 vqsub.u64 d16, d16, d17 1879# CHECK-NEXT: 1 3 0.50 vqsub.s8 q8, q8, q9 1880# CHECK-NEXT: 1 3 0.50 vqsub.s16 q8, q8, q9 1881# CHECK-NEXT: 1 3 0.50 vqsub.s32 q8, q8, q9 1882# CHECK-NEXT: 1 3 0.50 vqsub.s64 q8, q8, q9 1883# CHECK-NEXT: 1 3 0.50 vqsub.u8 q8, q8, q9 1884# CHECK-NEXT: 1 3 0.50 vqsub.u16 q8, q8, q9 1885# CHECK-NEXT: 1 3 0.50 vqsub.u32 q8, q8, q9 1886# CHECK-NEXT: 1 3 0.50 vqsub.u64 q8, q8, q9 1887# CHECK-NEXT: 1 3 0.50 vsubhn.i16 d16, q8, q9 1888# CHECK-NEXT: 1 3 0.50 vsubhn.i32 d16, q8, q9 1889# CHECK-NEXT: 1 3 0.50 vsubhn.i64 d16, q8, q9 1890# CHECK-NEXT: 1 3 0.50 vrsubhn.i16 d16, q8, q9 1891# CHECK-NEXT: 1 3 0.50 vrsubhn.i32 d16, q8, q9 1892# CHECK-NEXT: 1 3 0.50 vrsubhn.i64 d16, q8, q9 1893# CHECK-NEXT: 1 3 0.50 vtbl.8 d16, {d17}, d16 1894# CHECK-NEXT: 1 3 0.50 U vtbl.8 d16, {d16, d17}, d18 1895# CHECK-NEXT: 1 6 0.50 U vtbl.8 d16, {d16, d17, d18}, d20 1896# CHECK-NEXT: 1 6 0.50 U vtbl.8 d16, {d16, d17, d18, d19}, d20 1897# CHECK-NEXT: 1 3 0.50 vtbx.8 d18, {d16}, d17 1898# CHECK-NEXT: 1 3 0.50 U vtbx.8 d19, {d16, d17}, d18 1899# CHECK-NEXT: 1 6 0.50 U vtbx.8 d20, {d16, d17, d18}, d21 1900# CHECK-NEXT: 1 6 0.50 U vtbx.8 d20, {d16, d17, d18, d19}, d21 1901# CHECK-NEXT: 1 5 1.00 * vld1.8 {d16}, [r0:64] 1902# CHECK-NEXT: 1 5 1.00 * vld1.16 {d16}, [r0] 1903# CHECK-NEXT: 1 5 1.00 * vld1.32 {d16}, [r0] 1904# CHECK-NEXT: 1 5 1.00 * vld1.64 {d16}, [r0] 1905# CHECK-NEXT: 1 5 1.00 * vld1.8 {d16, d17}, [r0:64] 1906# CHECK-NEXT: 1 5 1.00 * vld1.16 {d16, d17}, [r0:128] 1907# CHECK-NEXT: 1 5 1.00 * vld1.32 {d16, d17}, [r0] 1908# CHECK-NEXT: 1 5 1.00 * vld1.64 {d16, d17}, [r0] 1909# CHECK-NEXT: 2 8 1.00 * vld2.8 {d16, d17}, [r0:64] 1910# CHECK-NEXT: 2 8 1.00 * vld2.16 {d16, d17}, [r0:128] 1911# CHECK-NEXT: 2 8 1.00 * vld2.32 {d16, d17}, [r0] 1912# CHECK-NEXT: 2 8 1.00 * vld2.8 {d16, d17, d18, d19}, [r0:64] 1913# CHECK-NEXT: 2 8 1.00 * vld2.16 {d16, d17, d18, d19}, [r0:128] 1914# CHECK-NEXT: 2 8 1.00 * vld2.32 {d16, d17, d18, d19}, [r0:256] 1915# CHECK-NEXT: 6 9 3.00 * vld3.8 {d16, d17, d18}, [r0:64] 1916# CHECK-NEXT: 6 9 3.00 * vld3.16 {d16, d17, d18}, [r0] 1917# CHECK-NEXT: 6 9 3.00 * vld3.32 {d16, d17, d18}, [r0] 1918# CHECK-NEXT: 9 9 3.00 * vld3.8 {d16, d18, d20}, [r0:64]! 1919# CHECK-NEXT: 9 9 3.00 * vld3.8 {d17, d19, d21}, [r0:64]! 1920# CHECK-NEXT: 9 9 3.00 * vld3.16 {d16, d18, d20}, [r0]! 1921# CHECK-NEXT: 9 9 3.00 * vld3.16 {d17, d19, d21}, [r0]! 1922# CHECK-NEXT: 9 9 3.00 * vld3.32 {d16, d18, d20}, [r0]! 1923# CHECK-NEXT: 9 9 3.00 * vld3.32 {d17, d19, d21}, [r0]! 1924# CHECK-NEXT: 8 9 4.00 * vld4.8 {d16, d17, d18, d19}, [r0:64] 1925# CHECK-NEXT: 8 9 4.00 * vld4.16 {d16, d17, d18, d19}, [r0:128] 1926# CHECK-NEXT: 8 9 4.00 * vld4.32 {d16, d17, d18, d19}, [r0:256] 1927# CHECK-NEXT: 12 9 4.00 * vld4.8 {d16, d18, d20, d22}, [r0:256]! 1928# CHECK-NEXT: 12 9 4.00 * vld4.8 {d17, d19, d21, d23}, [r0:256]! 1929# CHECK-NEXT: 12 9 4.00 * vld4.16 {d16, d18, d20, d22}, [r0]! 1930# CHECK-NEXT: 12 9 4.00 * vld4.16 {d17, d19, d21, d23}, [r0]! 1931# CHECK-NEXT: 12 9 4.00 * vld4.32 {d16, d18, d20, d22}, [r0]! 1932# CHECK-NEXT: 12 9 4.00 * vld4.32 {d17, d19, d21, d23}, [r0]! 1933# CHECK-NEXT: 2 8 1.00 * vld1.8 {d16[3]}, [r0] 1934# CHECK-NEXT: 2 8 1.00 * vld1.16 {d16[2]}, [r0:16] 1935# CHECK-NEXT: 2 8 1.00 * vld1.32 {d16[1]}, [r0:32] 1936# CHECK-NEXT: 4 8 2.00 * vld2.8 {d16[1], d17[1]}, [r0:16] 1937# CHECK-NEXT: 4 8 2.00 * vld2.16 {d16[1], d17[1]}, [r0:32] 1938# CHECK-NEXT: 4 8 2.00 * vld2.32 {d16[1], d17[1]}, [r0] 1939# CHECK-NEXT: 4 8 2.00 * vld2.16 {d17[1], d19[1]}, [r0] 1940# CHECK-NEXT: 4 8 2.00 * vld2.32 {d17[0], d19[0]}, [r0:64] 1941# CHECK-NEXT: 6 9 3.00 * vld3.8 {d16[1], d17[1], d18[1]}, [r0] 1942# CHECK-NEXT: 6 9 3.00 * vld3.16 {d16[1], d17[1], d18[1]}, [r0] 1943# CHECK-NEXT: 6 8 3.00 * vld3.32 {d16[1], d17[1], d18[1]}, [r0] 1944# CHECK-NEXT: 6 9 3.00 * vld3.16 {d16[1], d18[1], d20[1]}, [r0] 1945# CHECK-NEXT: 6 8 3.00 * vld3.32 {d17[1], d19[1], d21[1]}, [r0] 1946# CHECK-NEXT: 6 8 3.00 * vld3.8 {d0[], d1[], d2[]}, [r4] 1947# CHECK-NEXT: 9 8 3.00 * vld3.8 {d0[], d1[], d2[]}, [r4]! 1948# CHECK-NEXT: 9 8 3.00 * vld3.8 {d0[], d2[], d4[]}, [r4], r5 1949# CHECK-NEXT: 6 8 3.00 * vld3.16 {d0[], d2[], d4[]}, [r4] 1950# CHECK-NEXT: 9 8 3.00 * vld3.16 {d0[], d1[], d2[]}, [r4]! 1951# CHECK-NEXT: 9 8 3.00 * vld3.16 {d0[], d2[], d4[]}, [r4], r5 1952# CHECK-NEXT: 6 8 3.00 * vld3.32 {d0[], d1[], d2[]}, [r4] 1953# CHECK-NEXT: 9 8 3.00 * vld3.32 {d0[], d1[], d2[]}, [r4]! 1954# CHECK-NEXT: 9 8 3.00 * vld3.32 {d0[], d2[], d4[]}, [r4], r5 1955# CHECK-NEXT: 8 9 4.00 * vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0:32] 1956# CHECK-NEXT: 8 9 4.00 * vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] 1957# CHECK-NEXT: 8 8 4.00 * vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0:128] 1958# CHECK-NEXT: 8 9 4.00 * vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0:64] 1959# CHECK-NEXT: 8 8 4.00 * vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] 1960# CHECK-NEXT: 8 8 4.00 * vld4.8 {d0[], d1[], d2[], d3[]}, [r4] 1961# CHECK-NEXT: 8 8 4.00 * vld4.8 {d0[], d2[], d4[], d6[]}, [r4:32] 1962# CHECK-NEXT: 12 8 4.00 * vld4.8 {d0[], d1[], d2[], d3[]}, [r4:32]! 1963# CHECK-NEXT: 12 8 4.00 * vld4.8 {d0[], d2[], d4[], d6[]}, [r4:32], r5 1964# CHECK-NEXT: 8 8 4.00 * vld4.16 {d0[], d1[], d2[], d3[]}, [r4] 1965# CHECK-NEXT: 8 8 4.00 * vld4.16 {d0[], d2[], d4[], d6[]}, [r4:64] 1966# CHECK-NEXT: 12 8 4.00 * vld4.16 {d0[], d1[], d2[], d3[]}, [r4:64]! 1967# CHECK-NEXT: 12 8 4.00 * vld4.16 {d0[], d2[], d4[], d6[]}, [r4:64], r5 1968# CHECK-NEXT: 8 8 4.00 * vld4.32 {d0[], d1[], d2[], d3[]}, [r4] 1969# CHECK-NEXT: 8 8 4.00 * vld4.32 {d0[], d2[], d4[], d6[]}, [r4:64] 1970# CHECK-NEXT: 12 8 4.00 * vld4.32 {d0[], d1[], d2[], d3[]}, [r4:128]! 1971# CHECK-NEXT: 12 8 4.00 * vld4.32 {d0[], d2[], d4[], d6[]}, [r4:128], r5 1972# CHECK-NEXT: 1 1 1.00 * vst1.8 {d16}, [r0:64] 1973# CHECK-NEXT: 1 1 1.00 * vst1.16 {d16}, [r0] 1974# CHECK-NEXT: 1 1 1.00 * vst1.32 {d16}, [r0] 1975# CHECK-NEXT: 1 1 1.00 * vst1.64 {d16}, [r0] 1976# CHECK-NEXT: 1 2 1.00 * vst1.8 {d16, d17}, [r0:64] 1977# CHECK-NEXT: 1 2 1.00 * vst1.16 {d16, d17}, [r0:128] 1978# CHECK-NEXT: 1 2 1.00 * vst1.32 {d16, d17}, [r0] 1979# CHECK-NEXT: 1 2 1.00 * vst1.64 {d16, d17}, [r0] 1980# CHECK-NEXT: 2 3 1.00 * vst2.8 {d16, d17}, [r0:64] 1981# CHECK-NEXT: 2 3 1.00 * vst2.16 {d16, d17}, [r0:128] 1982# CHECK-NEXT: 2 3 1.00 * vst2.32 {d16, d17}, [r0] 1983# CHECK-NEXT: 2 4 1.00 * vst2.8 {d16, d17, d18, d19}, [r0:64] 1984# CHECK-NEXT: 2 4 1.00 * vst2.16 {d16, d17, d18, d19}, [r0:128] 1985# CHECK-NEXT: 2 4 1.00 * vst2.32 {d16, d17, d18, d19}, [r0:256] 1986# CHECK-NEXT: 2 3 1.00 * vst3.8 {d16, d17, d18}, [r0:64] 1987# CHECK-NEXT: 2 3 1.00 * vst3.16 {d16, d17, d18}, [r0] 1988# CHECK-NEXT: 2 3 1.00 * vst3.32 {d16, d17, d18}, [r0] 1989# CHECK-NEXT: 3 3 1.00 * vst3.8 {d16, d18, d20}, [r0:64]! 1990# CHECK-NEXT: 3 3 1.00 * vst3.8 {d17, d19, d21}, [r0:64]! 1991# CHECK-NEXT: 3 3 1.00 * vst3.16 {d16, d18, d20}, [r0]! 1992# CHECK-NEXT: 3 3 1.00 * vst3.16 {d17, d19, d21}, [r0]! 1993# CHECK-NEXT: 3 3 1.00 * vst3.32 {d16, d18, d20}, [r0]! 1994# CHECK-NEXT: 3 3 1.00 * vst3.32 {d17, d19, d21}, [r0]! 1995# CHECK-NEXT: 2 4 1.00 * vst4.8 {d16, d17, d18, d19}, [r0:64] 1996# CHECK-NEXT: 2 4 1.00 * vst4.16 {d16, d17, d18, d19}, [r0:128] 1997# CHECK-NEXT: 3 4 1.00 * vst4.8 {d16, d18, d20, d22}, [r0:256]! 1998# CHECK-NEXT: 3 4 1.00 * vst4.8 {d17, d19, d21, d23}, [r0:256]! 1999# CHECK-NEXT: 3 4 1.00 * vst4.16 {d16, d18, d20, d22}, [r0]! 2000# CHECK-NEXT: 3 4 1.00 * vst4.16 {d17, d19, d21, d23}, [r0]! 2001# CHECK-NEXT: 3 4 1.00 * vst4.32 {d16, d18, d20, d22}, [r0]! 2002# CHECK-NEXT: 3 4 1.00 * vst4.32 {d17, d19, d21, d23}, [r0]! 2003# CHECK-NEXT: 2 3 1.00 * vst2.8 {d16[1], d17[1]}, [r0:16] 2004# CHECK-NEXT: 2 3 1.00 * vst2.16 {d16[1], d17[1]}, [r0:32] 2005# CHECK-NEXT: 2 3 1.00 * vst2.32 {d16[1], d17[1]}, [r0] 2006# CHECK-NEXT: 2 3 1.00 * vst2.16 {d17[1], d19[1]}, [r0] 2007# CHECK-NEXT: 2 3 1.00 * vst2.32 {d17[0], d19[0]}, [r0:64] 2008# CHECK-NEXT: 2 3 1.00 * vst3.8 {d16[1], d17[1], d18[1]}, [r0] 2009# CHECK-NEXT: 2 3 1.00 * vst3.16 {d16[1], d17[1], d18[1]}, [r0] 2010# CHECK-NEXT: 2 3 1.00 * vst3.32 {d16[1], d17[1], d18[1]}, [r0] 2011# CHECK-NEXT: 2 3 1.00 * vst3.16 {d17[2], d19[2], d21[2]}, [r0] 2012# CHECK-NEXT: 2 3 1.00 * vst3.32 {d16[0], d18[0], d20[0]}, [r0] 2013# CHECK-NEXT: 2 3 1.00 * vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0:32] 2014# CHECK-NEXT: 2 3 1.00 * vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] 2015# CHECK-NEXT: 2 3 1.00 * vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0:128] 2016# CHECK-NEXT: 2 3 1.00 * vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0:64] 2017# CHECK-NEXT: 2 3 1.00 * vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] 2018# CHECK-NEXT: 3 8 1.00 * vld1.8 {d0[]}, [r0], r0 2019# CHECK-NEXT: 3 3 1.00 * vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0]! 2020# CHECK-NEXT: 2 5 2.00 vmovvs r2, lr, s27, s28 2021# CHECK-NEXT: 1 5 1.00 vmov s3, s4, r1, r2 2022# CHECK-NEXT: 1 5 1.00 vmov s2, s3, r1, r2 2023# CHECK-NEXT: 2 5 2.00 vmov r1, r2, s3, s4 2024# CHECK-NEXT: 2 5 2.00 vmov r1, r2, s2, s3 2025# CHECK-NEXT: 2 8 1.00 vmov d15, r1, r2 2026# CHECK-NEXT: 2 8 1.00 vmov d16, r1, r2 2027# CHECK-NEXT: 2 5 2.00 vmov r1, r2, d15 2028# CHECK-NEXT: 2 5 2.00 vmov r1, r2, d16 2029# CHECK-NEXT: 1 5 0.50 vcvttmi.f32.f16 s2, s19 2030# CHECK-NEXT: 2 6 1.00 * vld1.8 {d23, d24, d25}, [r6:64]! 2031# CHECK-NEXT: 2 6 1.00 * vld1.32 {d22, d23, d24, d25}, [pc:64]! 2032# CHECK-NEXT: 2 2 1.00 * vst1.32 {d26, d27}, [r1:64]! 2033# CHECK-NEXT: 1 3 0.50 vmov.f32 d0, #1.600000e+01 2034# CHECK-NEXT: 1 3 0.50 vmov.f32 q0, #1.600000e+01 2035# CHECK-NEXT: 2 1 1.00 * vst1.8 {d8}, [r4]! 2036# CHECK-NEXT: 2 1 1.00 * vst1.16 {d8}, [r4]! 2037# CHECK-NEXT: 2 1 1.00 * vst1.32 {d8}, [r4]! 2038# CHECK-NEXT: 2 1 1.00 * vst1.64 {d8}, [r4]! 2039# CHECK-NEXT: 2 1 1.00 * vst1.8 {d8}, [r4], r6 2040# CHECK-NEXT: 2 1 1.00 * vst1.16 {d8}, [r4], r6 2041# CHECK-NEXT: 2 1 1.00 * vst1.32 {d8}, [r4], r6 2042# CHECK-NEXT: 2 1 1.00 * vst1.64 {d8}, [r4], r6 2043# CHECK-NEXT: 2 2 1.00 * vst1.8 {d8, d9}, [r4]! 2044# CHECK-NEXT: 2 2 1.00 * vst1.16 {d8, d9}, [r4]! 2045# CHECK-NEXT: 2 2 1.00 * vst1.32 {d8, d9}, [r4]! 2046# CHECK-NEXT: 2 2 1.00 * vst1.64 {d8, d9}, [r4]! 2047# CHECK-NEXT: 2 2 1.00 * vst1.8 {d8, d9}, [r4], r6 2048# CHECK-NEXT: 2 2 1.00 * vst1.16 {d8, d9}, [r4], r6 2049# CHECK-NEXT: 2 2 1.00 * vst1.32 {d8, d9}, [r4], r6 2050# CHECK-NEXT: 2 2 1.00 * vst1.64 {d8, d9}, [r4], r6 2051# CHECK-NEXT: 2 3 1.00 * vst1.8 {d8, d9, d10}, [r4]! 2052# CHECK-NEXT: 2 3 1.00 * vst1.16 {d8, d9, d10}, [r4]! 2053# CHECK-NEXT: 2 3 1.00 * vst1.32 {d8, d9, d10}, [r4]! 2054# CHECK-NEXT: 2 3 1.00 * vst1.64 {d8, d9, d10}, [r4]! 2055# CHECK-NEXT: 2 3 1.00 * vst1.8 {d8, d9, d10}, [r4], r6 2056# CHECK-NEXT: 2 3 1.00 * vst1.16 {d8, d9, d10}, [r4], r6 2057# CHECK-NEXT: 2 3 1.00 * vst1.32 {d8, d9, d10}, [r4], r6 2058# CHECK-NEXT: 2 3 1.00 * vst1.64 {d8, d9, d10}, [r4], r6 2059# CHECK-NEXT: 2 4 1.00 * vst1.8 {d8, d9, d10, d11}, [r4]! 2060# CHECK-NEXT: 2 4 1.00 * vst1.16 {d8, d9, d10, d11}, [r4]! 2061# CHECK-NEXT: 2 4 1.00 * vst1.32 {d8, d9, d10, d11}, [r4]! 2062# CHECK-NEXT: 2 4 1.00 * vst1.64 {d8, d9, d10, d11}, [r4]! 2063# CHECK-NEXT: 2 4 1.00 * vst1.8 {d8, d9, d10, d11}, [r4], r6 2064# CHECK-NEXT: 2 4 1.00 * vst1.16 {d8, d9, d10, d11}, [r4], r6 2065# CHECK-NEXT: 2 4 1.00 * vst1.32 {d8, d9, d10, d11}, [r4], r6 2066# CHECK-NEXT: 2 4 1.00 * vst1.64 {d8, d9, d10, d11}, [r4], r6 2067# CHECK-NEXT: 3 3 1.00 * vst2.8 {d8, d9}, [r4]! 2068# CHECK-NEXT: 3 3 1.00 * vst2.16 {d8, d9}, [r4]! 2069# CHECK-NEXT: 3 3 1.00 * vst2.32 {d8, d9}, [r4]! 2070# CHECK-NEXT: 3 3 1.00 * vst2.8 {d8, d9}, [r4], r6 2071# CHECK-NEXT: 3 3 1.00 * vst2.16 {d8, d9}, [r4], r6 2072# CHECK-NEXT: 3 3 1.00 * vst2.32 {d8, d9}, [r4], r6 2073# CHECK-NEXT: 3 3 1.00 * vst2.8 {d8, d10}, [r4]! 2074# CHECK-NEXT: 3 3 1.00 * vst2.16 {d8, d10}, [r4]! 2075# CHECK-NEXT: 3 3 1.00 * vst2.32 {d8, d10}, [r4]! 2076# CHECK-NEXT: 3 3 1.00 * vst2.8 {d8, d10}, [r4], r6 2077# CHECK-NEXT: 3 3 1.00 * vst2.16 {d8, d10}, [r4], r6 2078# CHECK-NEXT: 3 3 1.00 * vst2.32 {d8, d10}, [r4], r6 2079# CHECK-NEXT: 3 3 1.00 * vst3.8 {d8, d9, d10}, [r4]! 2080# CHECK-NEXT: 3 3 1.00 * vst3.16 {d8, d9, d10}, [r4]! 2081# CHECK-NEXT: 3 3 1.00 * vst3.32 {d8, d9, d10}, [r4]! 2082# CHECK-NEXT: 3 3 1.00 * vst3.8 {d8, d10, d12}, [r4], r6 2083# CHECK-NEXT: 3 3 1.00 * vst3.16 {d8, d10, d12}, [r4], r6 2084# CHECK-NEXT: 3 3 1.00 * vst3.32 {d8, d10, d12}, [r4], r6 2085# CHECK-NEXT: 3 4 1.00 * vst4.8 {d8, d9, d10, d11}, [r4]! 2086# CHECK-NEXT: 3 4 1.00 * vst4.16 {d8, d9, d10, d11}, [r4]! 2087# CHECK-NEXT: 3 4 1.00 * vst4.32 {d8, d9, d10, d11}, [r4]! 2088# CHECK-NEXT: 3 4 1.00 * vst4.8 {d8, d10, d12, d14}, [r4], r6 2089# CHECK-NEXT: 3 4 1.00 * vst4.16 {d8, d10, d12, d14}, [r4], r6 2090# CHECK-NEXT: 3 4 1.00 * vst4.32 {d8, d10, d12, d14}, [r4], r6 2091# CHECK-NEXT: 1 2 1.00 * vst1.16 {d8, d9}, [r4] 2092# CHECK-NEXT: 1 2 1.00 * vst1.32 {d8, d9}, [r4] 2093# CHECK-NEXT: 1 2 1.00 * vst1.64 {d8, d9}, [r4] 2094# CHECK-NEXT: 1 2 1.00 * vst1.8 {d8, d9}, [r4] 2095# CHECK-NEXT: 2 3 1.00 * vst2.16 {d8, d9}, [r4] 2096# CHECK-NEXT: 2 3 1.00 * vst2.32 {d8, d9}, [r4] 2097# CHECK-NEXT: 2 3 1.00 * vst2.8 {d8, d9}, [r4] 2098# CHECK-NEXT: 3 3 1.00 * vst2.16 {d8, d9}, [r4]! 2099# CHECK-NEXT: 3 3 1.00 * vst2.16 {d8, d9}, [r4], r6 2100# CHECK-NEXT: 3 3 1.00 * vst2.32 {d8, d9}, [r4]! 2101# CHECK-NEXT: 3 3 1.00 * vst2.32 {d8, d9}, [r4], r6 2102# CHECK-NEXT: 3 3 1.00 * vst2.8 {d8, d9}, [r4]! 2103# CHECK-NEXT: 3 3 1.00 * vst2.8 {d8, d9}, [r4], r6 2104# CHECK-NEXT: 2 3 1.00 * vst2.16 {d8, d10}, [r4] 2105# CHECK-NEXT: 2 3 1.00 * vst2.32 {d8, d10}, [r4] 2106# CHECK-NEXT: 2 3 1.00 * vst2.8 {d8, d10}, [r4] 2107# CHECK-NEXT: 2 3 1.00 * vst3.8 {d8, d9, d10}, [r4] 2108# CHECK-NEXT: 2 3 1.00 * vst3.16 {d8, d9, d10}, [r4] 2109# CHECK-NEXT: 2 3 1.00 * vst3.32 {d8, d9, d10}, [r4] 2110# CHECK-NEXT: 2 4 1.00 * vst4.8 {d8, d9, d10, d11}, [r4] 2111# CHECK-NEXT: 2 4 1.00 * vst4.16 {d8, d9, d10, d11}, [r4] 2112# CHECK-NEXT: 2 4 1.00 * vst4.32 {d8, d9, d10, d11}, [r4] 2113# CHECK-NEXT: 2 3 1.00 * vst3.8 {d8, d10, d12}, [r4] 2114# CHECK-NEXT: 2 3 1.00 * vst3.16 {d8, d10, d12}, [r4] 2115# CHECK-NEXT: 2 3 1.00 * vst3.32 {d8, d10, d12}, [r4] 2116# CHECK-NEXT: 2 4 1.00 * vst4.8 {d8, d10, d12, d14}, [r4] 2117# CHECK-NEXT: 2 4 1.00 * vst4.16 {d8, d10, d12, d14}, [r4] 2118# CHECK-NEXT: 2 4 1.00 * vst4.32 {d8, d10, d12, d14}, [r4] 2119# CHECK-NEXT: 2 5 1.00 * vld1.8 {d8}, [r4]! 2120# CHECK-NEXT: 2 5 1.00 * vld1.16 {d8}, [r4]! 2121# CHECK-NEXT: 2 5 1.00 * vld1.32 {d8}, [r4]! 2122# CHECK-NEXT: 2 5 1.00 * vld1.64 {d8}, [r4]! 2123# CHECK-NEXT: 2 5 1.00 * vld1.8 {d8}, [r4], r6 2124# CHECK-NEXT: 2 5 1.00 * vld1.16 {d8}, [r4], r6 2125# CHECK-NEXT: 2 5 1.00 * vld1.32 {d8}, [r4], r6 2126# CHECK-NEXT: 2 5 1.00 * vld1.64 {d8}, [r4], r6 2127# CHECK-NEXT: 2 5 1.00 * vld1.8 {d8, d9}, [r4]! 2128# CHECK-NEXT: 2 5 1.00 * vld1.16 {d8, d9}, [r4]! 2129# CHECK-NEXT: 2 5 1.00 * vld1.32 {d8, d9}, [r4]! 2130# CHECK-NEXT: 2 5 1.00 * vld1.64 {d8, d9}, [r4]! 2131# CHECK-NEXT: 2 5 1.00 * vld1.8 {d8, d9}, [r4], r6 2132# CHECK-NEXT: 2 5 1.00 * vld1.16 {d8, d9}, [r4], r6 2133# CHECK-NEXT: 2 5 1.00 * vld1.32 {d8, d9}, [r4], r6 2134# CHECK-NEXT: 2 5 1.00 * vld1.64 {d8, d9}, [r4], r6 2135# CHECK-NEXT: 2 6 1.00 * vld1.8 {d8, d9, d10}, [r4]! 2136# CHECK-NEXT: 2 6 1.00 * vld1.16 {d8, d9, d10}, [r4]! 2137# CHECK-NEXT: 2 6 1.00 * vld1.32 {d8, d9, d10}, [r4]! 2138# CHECK-NEXT: 2 6 1.00 * vld1.64 {d8, d9, d10}, [r4]! 2139# CHECK-NEXT: 2 6 1.00 * vld1.8 {d8, d9, d10}, [r4], r6 2140# CHECK-NEXT: 2 6 1.00 * vld1.16 {d8, d9, d10}, [r4], r6 2141# CHECK-NEXT: 2 6 1.00 * vld1.32 {d8, d9, d10}, [r4], r6 2142# CHECK-NEXT: 2 6 1.00 * vld1.64 {d8, d9, d10}, [r4], r6 2143# CHECK-NEXT: 2 6 1.00 * vld1.8 {d8, d9, d10, d11}, [r4]! 2144# CHECK-NEXT: 2 6 1.00 * vld1.16 {d8, d9, d10, d11}, [r4]! 2145# CHECK-NEXT: 2 6 1.00 * vld1.32 {d8, d9, d10, d11}, [r4]! 2146# CHECK-NEXT: 2 6 1.00 * vld1.64 {d8, d9, d10, d11}, [r4]! 2147# CHECK-NEXT: 2 6 1.00 * vld1.8 {d8, d9, d10, d11}, [r4], r6 2148# CHECK-NEXT: 2 6 1.00 * vld1.16 {d8, d9, d10, d11}, [r4], r6 2149# CHECK-NEXT: 2 6 1.00 * vld1.32 {d8, d9, d10, d11}, [r4], r6 2150# CHECK-NEXT: 2 6 1.00 * vld1.64 {d8, d9, d10, d11}, [r4], r6 2151# CHECK-NEXT: 3 8 1.00 * vld2.8 {d8, d9}, [r4]! 2152# CHECK-NEXT: 3 8 1.00 * vld2.16 {d8, d9}, [r4]! 2153# CHECK-NEXT: 3 8 1.00 * vld2.32 {d8, d9}, [r4]! 2154# CHECK-NEXT: 3 8 1.00 * vld2.8 {d8, d9}, [r4], r6 2155# CHECK-NEXT: 3 8 1.00 * vld2.16 {d8, d9}, [r4], r6 2156# CHECK-NEXT: 3 8 1.00 * vld2.32 {d8, d9}, [r4], r6 2157# CHECK-NEXT: 3 9 1.00 * vld2.8 {d8, d10}, [r4]! 2158# CHECK-NEXT: 3 9 1.00 * vld2.16 {d8, d10}, [r4]! 2159# CHECK-NEXT: 3 9 1.00 * vld2.32 {d8, d10}, [r4]! 2160# CHECK-NEXT: 3 9 1.00 * vld2.8 {d8, d10}, [r4], r6 2161# CHECK-NEXT: 3 9 1.00 * vld2.16 {d8, d10}, [r4], r6 2162# CHECK-NEXT: 3 9 1.00 * vld2.32 {d8, d10}, [r4], r6 2163# CHECK-NEXT: 9 9 3.00 * vld3.8 {d8, d9, d10}, [r4]! 2164# CHECK-NEXT: 9 9 3.00 * vld3.16 {d8, d9, d10}, [r4]! 2165# CHECK-NEXT: 9 9 3.00 * vld3.32 {d8, d9, d10}, [r4]! 2166# CHECK-NEXT: 9 9 3.00 * vld3.8 {d8, d10, d12}, [r4], r6 2167# CHECK-NEXT: 9 9 3.00 * vld3.16 {d8, d10, d12}, [r4], r6 2168# CHECK-NEXT: 9 9 3.00 * vld3.32 {d8, d10, d12}, [r4], r6 2169# CHECK-NEXT: 12 9 4.00 * vld4.8 {d8, d9, d10, d11}, [r4]! 2170# CHECK-NEXT: 12 9 4.00 * vld4.16 {d8, d9, d10, d11}, [r4]! 2171# CHECK-NEXT: 12 9 4.00 * vld4.32 {d8, d9, d10, d11}, [r4]! 2172# CHECK-NEXT: 12 9 4.00 * vld4.8 {d8, d10, d12, d14}, [r4], r6 2173# CHECK-NEXT: 12 9 4.00 * vld4.16 {d8, d10, d12, d14}, [r4], r6 2174# CHECK-NEXT: 12 9 4.00 * vld4.32 {d8, d10, d12, d14}, [r4], r6 2175# CHECK-NEXT: 1 5 1.00 * vld1.16 {d8, d9}, [r4] 2176# CHECK-NEXT: 1 5 1.00 * vld1.32 {d8, d9}, [r4] 2177# CHECK-NEXT: 1 5 1.00 * vld1.64 {d8, d9}, [r4] 2178# CHECK-NEXT: 1 5 1.00 * vld1.8 {d8, d9}, [r4] 2179# CHECK-NEXT: 2 8 1.00 * vld2.16 {d8, d9}, [r4] 2180# CHECK-NEXT: 2 8 1.00 * vld2.32 {d8, d9}, [r4] 2181# CHECK-NEXT: 2 8 1.00 * vld2.8 {d8, d9}, [r4] 2182# CHECK-NEXT: 3 8 1.00 * vld2.16 {d8, d9}, [r4]! 2183# CHECK-NEXT: 3 8 1.00 * vld2.16 {d8, d9}, [r4], r6 2184# CHECK-NEXT: 3 8 1.00 * vld2.32 {d8, d9}, [r4]! 2185# CHECK-NEXT: 3 8 1.00 * vld2.32 {d8, d9}, [r4], r6 2186# CHECK-NEXT: 3 8 1.00 * vld2.8 {d8, d9}, [r4]! 2187# CHECK-NEXT: 3 8 1.00 * vld2.8 {d8, d9}, [r4], r6 2188# CHECK-NEXT: 2 9 1.00 * vld2.16 {d8, d10}, [r4] 2189# CHECK-NEXT: 2 9 1.00 * vld2.32 {d8, d10}, [r4] 2190# CHECK-NEXT: 2 9 1.00 * vld2.8 {d8, d10}, [r4] 2191# CHECK-NEXT: 3 8 1.00 * vld2.16 {d8, d9, d10, d11}, [r4]! 2192# CHECK-NEXT: 3 8 1.00 * vld2.16 {d8, d9, d10, d11}, [r4], r6 2193# CHECK-NEXT: 3 8 1.00 * vld2.32 {d8, d9, d10, d11}, [r4]! 2194# CHECK-NEXT: 3 8 1.00 * vld2.32 {d8, d9, d10, d11}, [r4], r6 2195# CHECK-NEXT: 3 8 1.00 * vld2.8 {d8, d9, d10, d11}, [r4]! 2196# CHECK-NEXT: 3 8 1.00 * vld2.8 {d8, d9, d10, d11}, [r4], r6 2197# CHECK-NEXT: 6 9 3.00 * vld3.8 {d8, d9, d10}, [r4] 2198# CHECK-NEXT: 6 9 3.00 * vld3.16 {d8, d9, d10}, [r4] 2199# CHECK-NEXT: 6 9 3.00 * vld3.32 {d8, d9, d10}, [r4] 2200# CHECK-NEXT: 8 9 4.00 * vld4.8 {d8, d9, d10, d11}, [r4] 2201# CHECK-NEXT: 8 9 4.00 * vld4.16 {d8, d9, d10, d11}, [r4] 2202# CHECK-NEXT: 8 9 4.00 * vld4.32 {d8, d9, d10, d11}, [r4] 2203# CHECK-NEXT: 6 9 3.00 * vld3.8 {d8, d10, d12}, [r4] 2204# CHECK-NEXT: 6 9 3.00 * vld3.16 {d8, d10, d12}, [r4] 2205# CHECK-NEXT: 6 9 3.00 * vld3.32 {d8, d10, d12}, [r4] 2206# CHECK-NEXT: 8 9 4.00 * vld4.8 {d8, d10, d12, d14}, [r4] 2207# CHECK-NEXT: 8 9 4.00 * vld4.16 {d8, d10, d12, d14}, [r4] 2208# CHECK-NEXT: 8 9 4.00 * vld4.32 {d8, d10, d12, d14}, [r4] 2209# CHECK-NEXT: 4 8 2.00 * vld2.8 {d0[], d1[]}, [r2] 2210# CHECK-NEXT: 4 8 2.00 * vld2.16 {d0[], d1[]}, [r2] 2211# CHECK-NEXT: 4 8 2.00 * vld2.32 {d0[], d1[]}, [r2] 2212# CHECK-NEXT: 3 8 1.00 * vld2.8 {d0[], d1[]}, [r2]! 2213# CHECK-NEXT: 3 8 1.00 * vld2.16 {d0[], d1[]}, [r2]! 2214# CHECK-NEXT: 3 8 1.00 * vld2.32 {d0[], d1[]}, [r2]! 2215# CHECK-NEXT: 3 8 1.00 * vld2.8 {d0[], d1[]}, [r2], r3 2216# CHECK-NEXT: 3 8 1.00 * vld2.16 {d0[], d1[]}, [r2], r3 2217# CHECK-NEXT: 3 8 1.00 * vld2.32 {d0[], d1[]}, [r2], r3 2218# CHECK-NEXT: 4 8 2.00 * vld2.8 {d0[], d2[]}, [r3] 2219# CHECK-NEXT: 4 8 2.00 * vld2.16 {d0[], d2[]}, [r3] 2220# CHECK-NEXT: 4 8 2.00 * vld2.32 {d0[], d2[]}, [r3] 2221# CHECK-NEXT: 3 8 1.00 * vld2.8 {d0[], d2[]}, [r3]! 2222# CHECK-NEXT: 3 8 1.00 * vld2.16 {d0[], d2[]}, [r3]! 2223# CHECK-NEXT: 3 8 1.00 * vld2.32 {d0[], d2[]}, [r3]! 2224# CHECK-NEXT: 3 8 1.00 * vld2.8 {d0[], d2[]}, [r3], r4 2225# CHECK-NEXT: 3 8 1.00 * vld2.16 {d0[], d2[]}, [r3], r4 2226# CHECK-NEXT: 3 8 1.00 * vld2.32 {d0[], d2[]}, [r3], r4 2227 2228# CHECK: Resources: 2229# CHECK-NEXT: [0] - A57UnitB 2230# CHECK-NEXT: [1.0] - A57UnitI 2231# CHECK-NEXT: [1.1] - A57UnitI 2232# CHECK-NEXT: [2] - A57UnitL 2233# CHECK-NEXT: [3] - A57UnitM 2234# CHECK-NEXT: [4] - A57UnitS 2235# CHECK-NEXT: [5] - A57UnitW 2236# CHECK-NEXT: [6] - A57UnitX 2237 2238# CHECK: Resource pressure per iteration: 2239# CHECK-NEXT: [0] [1.0] [1.1] [2] [3] [4] [5] [6] 2240# CHECK-NEXT: - 140.00 140.00 408.00 - 132.00 490.50 721.50 2241 2242# CHECK: Resource pressure by instruction: 2243# CHECK-NEXT: [0] [1.0] [1.1] [2] [3] [4] [5] [6] Instructions: 2244# CHECK-NEXT: - - - - - - 0.50 0.50 vabs.s8 d16, d16 2245# CHECK-NEXT: - - - - - - 0.50 0.50 vabs.s16 d16, d16 2246# CHECK-NEXT: - - - - - - 0.50 0.50 vabs.s32 d16, d16 2247# CHECK-NEXT: - - - - - - 0.50 0.50 vabs.f32 d16, d16 2248# CHECK-NEXT: - - - - - - 0.50 0.50 vabs.s8 q8, q8 2249# CHECK-NEXT: - - - - - - 0.50 0.50 vabs.s16 q8, q8 2250# CHECK-NEXT: - - - - - - 0.50 0.50 vabs.s32 q8, q8 2251# CHECK-NEXT: - - - - - - 0.50 0.50 vabs.f32 q8, q8 2252# CHECK-NEXT: - - - - - - 0.50 0.50 vqabs.s8 d16, d16 2253# CHECK-NEXT: - - - - - - 0.50 0.50 vqabs.s16 d16, d16 2254# CHECK-NEXT: - - - - - - 0.50 0.50 vqabs.s32 d16, d16 2255# CHECK-NEXT: - - - - - - 0.50 0.50 vqabs.s8 q8, q8 2256# CHECK-NEXT: - - - - - - 0.50 0.50 vqabs.s16 q8, q8 2257# CHECK-NEXT: - - - - - - 0.50 0.50 vqabs.s32 q8, q8 2258# CHECK-NEXT: - - - - - - 0.50 0.50 vabd.s8 d16, d16, d17 2259# CHECK-NEXT: - - - - - - 0.50 0.50 vabd.s16 d16, d16, d17 2260# CHECK-NEXT: - - - - - - 0.50 0.50 vabd.s32 d16, d16, d17 2261# CHECK-NEXT: - - - - - - 0.50 0.50 vabd.u8 d16, d16, d17 2262# CHECK-NEXT: - - - - - - 0.50 0.50 vabd.u16 d16, d16, d17 2263# CHECK-NEXT: - - - - - - 0.50 0.50 vabd.u32 d16, d16, d17 2264# CHECK-NEXT: - - - - - - 0.50 0.50 vabd.f32 d16, d16, d17 2265# CHECK-NEXT: - - - - - - 0.50 0.50 vabd.s8 q8, q8, q9 2266# CHECK-NEXT: - - - - - - 0.50 0.50 vabd.s16 q8, q8, q9 2267# CHECK-NEXT: - - - - - - 0.50 0.50 vabd.s32 q8, q8, q9 2268# CHECK-NEXT: - - - - - - 0.50 0.50 vabd.u8 q8, q8, q9 2269# CHECK-NEXT: - - - - - - 0.50 0.50 vabd.u16 q8, q8, q9 2270# CHECK-NEXT: - - - - - - 0.50 0.50 vabd.u32 q8, q8, q9 2271# CHECK-NEXT: - - - - - - 0.50 0.50 vabd.f32 q8, q8, q9 2272# CHECK-NEXT: - - - - - - 0.50 0.50 vabdl.s8 q8, d16, d17 2273# CHECK-NEXT: - - - - - - 0.50 0.50 vabdl.s16 q8, d16, d17 2274# CHECK-NEXT: - - - - - - 0.50 0.50 vabdl.s32 q8, d16, d17 2275# CHECK-NEXT: - - - - - - 0.50 0.50 vabdl.u8 q8, d16, d17 2276# CHECK-NEXT: - - - - - - 0.50 0.50 vabdl.u16 q8, d16, d17 2277# CHECK-NEXT: - - - - - - 0.50 0.50 vabdl.u32 q8, d16, d17 2278# CHECK-NEXT: - - - - - - - 1.00 vaba.s8 d16, d18, d17 2279# CHECK-NEXT: - - - - - - - 1.00 vaba.s16 d16, d18, d17 2280# CHECK-NEXT: - - - - - - - 1.00 vaba.s32 d16, d18, d17 2281# CHECK-NEXT: - - - - - - - 1.00 vaba.u8 d16, d18, d17 2282# CHECK-NEXT: - - - - - - - 1.00 vaba.u16 d16, d18, d17 2283# CHECK-NEXT: - - - - - - - 1.00 vaba.u32 d16, d18, d17 2284# CHECK-NEXT: - - - - - - - 1.00 vaba.s8 q9, q8, q10 2285# CHECK-NEXT: - - - - - - - 1.00 vaba.s16 q9, q8, q10 2286# CHECK-NEXT: - - - - - - - 1.00 vaba.s32 q9, q8, q10 2287# CHECK-NEXT: - - - - - - - 1.00 vaba.u8 q9, q8, q10 2288# CHECK-NEXT: - - - - - - - 1.00 vaba.u16 q9, q8, q10 2289# CHECK-NEXT: - - - - - - - 1.00 vaba.u32 q9, q8, q10 2290# CHECK-NEXT: - - - - - - - 1.00 vabal.s8 q8, d19, d18 2291# CHECK-NEXT: - - - - - - - 1.00 vabal.s16 q8, d19, d18 2292# CHECK-NEXT: - - - - - - - 1.00 vabal.s32 q8, d19, d18 2293# CHECK-NEXT: - - - - - - - 1.00 vabal.u8 q8, d19, d18 2294# CHECK-NEXT: - - - - - - - 1.00 vabal.u16 q8, d19, d18 2295# CHECK-NEXT: - - - - - - - 1.00 vabal.u32 q8, d19, d18 2296# CHECK-NEXT: - - - - - - 0.50 0.50 vadd.i8 d16, d17, d16 2297# CHECK-NEXT: - - - - - - 0.50 0.50 vadd.i16 d16, d17, d16 2298# CHECK-NEXT: - - - - - - 0.50 0.50 vadd.i64 d16, d17, d16 2299# CHECK-NEXT: - - - - - - 0.50 0.50 vadd.i32 d16, d17, d16 2300# CHECK-NEXT: - - - - - - 0.50 0.50 vadd.f32 d16, d16, d17 2301# CHECK-NEXT: - - - - - - 0.50 0.50 vadd.f32 q8, q8, q9 2302# CHECK-NEXT: - - - - - - 0.50 0.50 vaddl.s8 q8, d17, d16 2303# CHECK-NEXT: - - - - - - 0.50 0.50 vaddl.s16 q8, d17, d16 2304# CHECK-NEXT: - - - - - - 0.50 0.50 vaddl.s32 q8, d17, d16 2305# CHECK-NEXT: - - - - - - 0.50 0.50 vaddl.u8 q8, d17, d16 2306# CHECK-NEXT: - - - - - - 0.50 0.50 vaddl.u16 q8, d17, d16 2307# CHECK-NEXT: - - - - - - 0.50 0.50 vaddl.u32 q8, d17, d16 2308# CHECK-NEXT: - - - - - - 0.50 0.50 vaddw.s8 q8, q8, d18 2309# CHECK-NEXT: - - - - - - 0.50 0.50 vaddw.s16 q8, q8, d18 2310# CHECK-NEXT: - - - - - - 0.50 0.50 vaddw.s32 q8, q8, d18 2311# CHECK-NEXT: - - - - - - 0.50 0.50 vaddw.u8 q8, q8, d18 2312# CHECK-NEXT: - - - - - - 0.50 0.50 vaddw.u16 q8, q8, d18 2313# CHECK-NEXT: - - - - - - 0.50 0.50 vaddw.u32 q8, q8, d18 2314# CHECK-NEXT: - - - - - - 0.50 0.50 vhadd.s8 d16, d16, d17 2315# CHECK-NEXT: - - - - - - 0.50 0.50 vhadd.s16 d16, d16, d17 2316# CHECK-NEXT: - - - - - - 0.50 0.50 vhadd.s32 d16, d16, d17 2317# CHECK-NEXT: - - - - - - 0.50 0.50 vhadd.u8 d16, d16, d17 2318# CHECK-NEXT: - - - - - - 0.50 0.50 vhadd.u16 d16, d16, d17 2319# CHECK-NEXT: - - - - - - 0.50 0.50 vhadd.u32 d16, d16, d17 2320# CHECK-NEXT: - - - - - - 0.50 0.50 vhadd.s8 q8, q8, q9 2321# CHECK-NEXT: - - - - - - 0.50 0.50 vhadd.s16 q8, q8, q9 2322# CHECK-NEXT: - - - - - - 0.50 0.50 vhadd.s32 q8, q8, q9 2323# CHECK-NEXT: - - - - - - 0.50 0.50 vhadd.u8 q8, q8, q9 2324# CHECK-NEXT: - - - - - - 0.50 0.50 vhadd.u16 q8, q8, q9 2325# CHECK-NEXT: - - - - - - 0.50 0.50 vhadd.u32 q8, q8, q9 2326# CHECK-NEXT: - - - - - - 0.50 0.50 vrhadd.s8 d16, d16, d17 2327# CHECK-NEXT: - - - - - - 0.50 0.50 vrhadd.s16 d16, d16, d17 2328# CHECK-NEXT: - - - - - - 0.50 0.50 vrhadd.s32 d16, d16, d17 2329# CHECK-NEXT: - - - - - - 0.50 0.50 vrhadd.u8 d16, d16, d17 2330# CHECK-NEXT: - - - - - - 0.50 0.50 vrhadd.u16 d16, d16, d17 2331# CHECK-NEXT: - - - - - - 0.50 0.50 vrhadd.u32 d16, d16, d17 2332# CHECK-NEXT: - - - - - - 0.50 0.50 vrhadd.s8 q8, q8, q9 2333# CHECK-NEXT: - - - - - - 0.50 0.50 vrhadd.s16 q8, q8, q9 2334# CHECK-NEXT: - - - - - - 0.50 0.50 vrhadd.s32 q8, q8, q9 2335# CHECK-NEXT: - - - - - - 0.50 0.50 vrhadd.u8 q8, q8, q9 2336# CHECK-NEXT: - - - - - - 0.50 0.50 vrhadd.u16 q8, q8, q9 2337# CHECK-NEXT: - - - - - - 0.50 0.50 vrhadd.u32 q8, q8, q9 2338# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.s8 d16, d16, d17 2339# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.s16 d16, d16, d17 2340# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.s32 d16, d16, d17 2341# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.s64 d16, d16, d17 2342# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.u8 d16, d16, d17 2343# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.u16 d16, d16, d17 2344# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.u32 d16, d16, d17 2345# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.u64 d16, d16, d17 2346# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.s8 q8, q8, q9 2347# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.s16 q8, q8, q9 2348# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.s32 q8, q8, q9 2349# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.s64 q8, q8, q9 2350# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.u8 q8, q8, q9 2351# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.u16 q8, q8, q9 2352# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.u32 q8, q8, q9 2353# CHECK-NEXT: - - - - - - 0.50 0.50 vqadd.u64 q8, q8, q9 2354# CHECK-NEXT: - - - - - - 0.50 0.50 vaddhn.i16 d16, q8, q9 2355# CHECK-NEXT: - - - - - - 0.50 0.50 vaddhn.i32 d16, q8, q9 2356# CHECK-NEXT: - - - - - - 0.50 0.50 vaddhn.i64 d16, q8, q9 2357# CHECK-NEXT: - - - - - - 0.50 0.50 vraddhn.i16 d16, q8, q9 2358# CHECK-NEXT: - - - - - - 0.50 0.50 vraddhn.i32 d16, q8, q9 2359# CHECK-NEXT: - - - - - - 0.50 0.50 vraddhn.i64 d16, q8, q9 2360# CHECK-NEXT: - - - - - - 0.50 0.50 vcnt.8 d16, d16 2361# CHECK-NEXT: - - - - - - 0.50 0.50 vcnt.8 q8, q8 2362# CHECK-NEXT: - - - - - - 0.50 0.50 vclz.i8 d16, d16 2363# CHECK-NEXT: - - - - - - 0.50 0.50 vclz.i16 d16, d16 2364# CHECK-NEXT: - - - - - - 0.50 0.50 vclz.i32 d16, d16 2365# CHECK-NEXT: - - - - - - 0.50 0.50 vclz.i8 q8, q8 2366# CHECK-NEXT: - - - - - - 0.50 0.50 vclz.i16 q8, q8 2367# CHECK-NEXT: - - - - - - 0.50 0.50 vclz.i32 q8, q8 2368# CHECK-NEXT: - - - - - - 0.50 0.50 vcls.s8 d16, d16 2369# CHECK-NEXT: - - - - - - 0.50 0.50 vcls.s16 d16, d16 2370# CHECK-NEXT: - - - - - - 0.50 0.50 vcls.s32 d16, d16 2371# CHECK-NEXT: - - - - - - 0.50 0.50 vcls.s8 q8, q8 2372# CHECK-NEXT: - - - - - - 0.50 0.50 vcls.s16 q8, q8 2373# CHECK-NEXT: - - - - - - 0.50 0.50 vcls.s32 q8, q8 2374# CHECK-NEXT: - - - - - - 0.50 0.50 vand d16, d17, d16 2375# CHECK-NEXT: - - - - - - 0.50 0.50 vand q8, q8, q9 2376# CHECK-NEXT: - - - - - - 0.50 0.50 veor d16, d17, d16 2377# CHECK-NEXT: - - - - - - 0.50 0.50 veor q8, q8, q9 2378# CHECK-NEXT: - - - - - - 0.50 0.50 vorr d16, d17, d16 2379# CHECK-NEXT: - - - - - - 0.50 0.50 vorr q8, q8, q9 2380# CHECK-NEXT: - - - - - - 0.50 0.50 vorr.i32 d16, #0x1000000 2381# CHECK-NEXT: - - - - - - 0.50 0.50 vorr.i32 q8, #0x1000000 2382# CHECK-NEXT: - - - - - - 0.50 0.50 vorr.i32 q8, #0x0 2383# CHECK-NEXT: - - - - - - 0.50 0.50 vbic d16, d17, d16 2384# CHECK-NEXT: - - - - - - 0.50 0.50 vbic q8, q8, q9 2385# CHECK-NEXT: - - - - - - 0.50 0.50 vbic.i32 d16, #0xff000000 2386# CHECK-NEXT: - - - - - - 0.50 0.50 vbic.i32 q8, #0xff000000 2387# CHECK-NEXT: - - - - - - 0.50 0.50 vorn d16, d17, d16 2388# CHECK-NEXT: - - - - - - 0.50 0.50 vorn q8, q8, q9 2389# CHECK-NEXT: - - - - - - 0.50 0.50 vmvn d16, d16 2390# CHECK-NEXT: - - - - - - 0.50 0.50 vmvn q8, q8 2391# CHECK-NEXT: - - - - - - 0.50 0.50 vbsl d18, d17, d16 2392# CHECK-NEXT: - - - - - - 0.50 0.50 vbsl q8, q10, q9 2393# CHECK-NEXT: - - - - - - 0.50 0.50 vbit d18, d17, d16 2394# CHECK-NEXT: - - - - - - 0.50 0.50 vbit q8, q10, q9 2395# CHECK-NEXT: - - - - - - 0.50 0.50 vbif d18, d17, d16 2396# CHECK-NEXT: - - - - - - 0.50 0.50 vbif q8, q10, q9 2397# CHECK-NEXT: - - - - - - 0.50 0.50 vceq.i8 d16, d16, d17 2398# CHECK-NEXT: - - - - - - 0.50 0.50 vceq.i16 d16, d16, d17 2399# CHECK-NEXT: - - - - - - 0.50 0.50 vceq.i32 d16, d16, d17 2400# CHECK-NEXT: - - - - - - 0.50 0.50 vceq.f32 d16, d16, d17 2401# CHECK-NEXT: - - - - - - 0.50 0.50 vceq.i8 q8, q8, q9 2402# CHECK-NEXT: - - - - - - 0.50 0.50 vceq.i16 q8, q8, q9 2403# CHECK-NEXT: - - - - - - 0.50 0.50 vceq.i32 q8, q8, q9 2404# CHECK-NEXT: - - - - - - 0.50 0.50 vceq.f32 q8, q8, q9 2405# CHECK-NEXT: - - - - - - 0.50 0.50 vcge.s8 d16, d16, d17 2406# CHECK-NEXT: - - - - - - 0.50 0.50 vcge.s16 d16, d16, d17 2407# CHECK-NEXT: - - - - - - 0.50 0.50 vcge.s32 d16, d16, d17 2408# CHECK-NEXT: - - - - - - 0.50 0.50 vcge.u8 d16, d16, d17 2409# CHECK-NEXT: - - - - - - 0.50 0.50 vcge.u16 d16, d16, d17 2410# CHECK-NEXT: - - - - - - 0.50 0.50 vcge.u32 d16, d16, d17 2411# CHECK-NEXT: - - - - - - 0.50 0.50 vcge.f32 d16, d16, d17 2412# CHECK-NEXT: - - - - - - 0.50 0.50 vcge.s8 q8, q8, q9 2413# CHECK-NEXT: - - - - - - 0.50 0.50 vcge.s16 q8, q8, q9 2414# CHECK-NEXT: - - - - - - 0.50 0.50 vcge.s32 q8, q8, q9 2415# CHECK-NEXT: - - - - - - 0.50 0.50 vcge.u8 q8, q8, q9 2416# CHECK-NEXT: - - - - - - 0.50 0.50 vcge.u16 q8, q8, q9 2417# CHECK-NEXT: - - - - - - 0.50 0.50 vcge.u32 q8, q8, q9 2418# CHECK-NEXT: - - - - - - 0.50 0.50 vcge.f32 q8, q8, q9 2419# CHECK-NEXT: - - - - - - 0.50 0.50 vacge.f32 d16, d16, d17 2420# CHECK-NEXT: - - - - - - 0.50 0.50 vacge.f32 q8, q8, q9 2421# CHECK-NEXT: - - - - - - 0.50 0.50 vcgt.s8 d16, d16, d17 2422# CHECK-NEXT: - - - - - - 0.50 0.50 vcgt.s16 d16, d16, d17 2423# CHECK-NEXT: - - - - - - 0.50 0.50 vcgt.s32 d16, d16, d17 2424# CHECK-NEXT: - - - - - - 0.50 0.50 vcgt.u8 d16, d16, d17 2425# CHECK-NEXT: - - - - - - 0.50 0.50 vcgt.u16 d16, d16, d17 2426# CHECK-NEXT: - - - - - - 0.50 0.50 vcgt.u32 d16, d16, d17 2427# CHECK-NEXT: - - - - - - 0.50 0.50 vcgt.f32 d16, d16, d17 2428# CHECK-NEXT: - - - - - - 0.50 0.50 vcgt.s8 q8, q8, q9 2429# CHECK-NEXT: - - - - - - 0.50 0.50 vcgt.s16 q8, q8, q9 2430# CHECK-NEXT: - - - - - - 0.50 0.50 vcgt.s32 q8, q8, q9 2431# CHECK-NEXT: - - - - - - 0.50 0.50 vcgt.u8 q8, q8, q9 2432# CHECK-NEXT: - - - - - - 0.50 0.50 vcgt.u16 q8, q8, q9 2433# CHECK-NEXT: - - - - - - 0.50 0.50 vcgt.u32 q8, q8, q9 2434# CHECK-NEXT: - - - - - - 0.50 0.50 vcgt.f32 q8, q8, q9 2435# CHECK-NEXT: - - - - - - 0.50 0.50 vacgt.f32 d16, d16, d17 2436# CHECK-NEXT: - - - - - - 0.50 0.50 vacgt.f32 q8, q8, q9 2437# CHECK-NEXT: - - - - - - 0.50 0.50 vtst.8 d16, d16, d17 2438# CHECK-NEXT: - - - - - - 0.50 0.50 vtst.16 d16, d16, d17 2439# CHECK-NEXT: - - - - - - 0.50 0.50 vtst.32 d16, d16, d17 2440# CHECK-NEXT: - - - - - - 0.50 0.50 vtst.8 q8, q8, q9 2441# CHECK-NEXT: - - - - - - 0.50 0.50 vtst.16 q8, q8, q9 2442# CHECK-NEXT: - - - - - - 0.50 0.50 vtst.32 q8, q8, q9 2443# CHECK-NEXT: - - - - - - 0.50 0.50 vceq.i8 d16, d16, #0 2444# CHECK-NEXT: - - - - - - 0.50 0.50 vcge.s8 d16, d16, #0 2445# CHECK-NEXT: - - - - - - 0.50 0.50 vcle.s8 d16, d16, #0 2446# CHECK-NEXT: - - - - - - 0.50 0.50 vcgt.s8 d16, d16, #0 2447# CHECK-NEXT: - - - - - - 0.50 0.50 vclt.s8 d16, d16, #0 2448# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.s32.f32 d16, d16 2449# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.u32.f32 d16, d16 2450# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.f32.s32 d16, d16 2451# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.f32.u32 d16, d16 2452# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.s32.f32 q8, q8 2453# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.u32.f32 q8, q8 2454# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.f32.s32 q8, q8 2455# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.f32.u32 q8, q8 2456# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.s32.f32 d16, d16, #1 2457# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.u32.f32 d16, d16, #1 2458# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.f32.s32 d16, d16, #1 2459# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.f32.u32 d16, d16, #1 2460# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.s32.f32 q8, q8, #1 2461# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.u32.f32 q8, q8, #1 2462# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.f32.s32 q8, q8, #1 2463# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.f32.u32 q8, q8, #1 2464# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.f32.f16 q8, d16 2465# CHECK-NEXT: - - - - - - 0.50 0.50 vcvt.f16.f32 d16, q8 2466# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vdup.8 d16, r0 2467# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vdup.16 d16, r0 2468# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vdup.32 d16, r0 2469# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vdup.8 q8, r0 2470# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vdup.16 q8, r0 2471# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vdup.32 q8, r0 2472# CHECK-NEXT: - - - - - - 0.50 0.50 vdup.8 d16, d16[1] 2473# CHECK-NEXT: - - - - - - 0.50 0.50 vdup.16 d16, d16[1] 2474# CHECK-NEXT: - - - - - - 0.50 0.50 vdup.32 d16, d16[1] 2475# CHECK-NEXT: - - - - - - 0.50 0.50 vdup.8 q8, d16[1] 2476# CHECK-NEXT: - - - - - - 0.50 0.50 vdup.16 q8, d16[1] 2477# CHECK-NEXT: - - - - - - 0.50 0.50 vdup.32 q8, d16[1] 2478# CHECK-NEXT: - - - - - - 0.50 0.50 vmin.s8 d16, d16, d17 2479# CHECK-NEXT: - - - - - - 0.50 0.50 vmin.s16 d16, d16, d17 2480# CHECK-NEXT: - - - - - - 0.50 0.50 vmin.s32 d16, d16, d17 2481# CHECK-NEXT: - - - - - - 0.50 0.50 vmin.u8 d16, d16, d17 2482# CHECK-NEXT: - - - - - - 0.50 0.50 vmin.u16 d16, d16, d17 2483# CHECK-NEXT: - - - - - - 0.50 0.50 vmin.u32 d16, d16, d17 2484# CHECK-NEXT: - - - - - - 0.50 0.50 vmin.f32 d16, d16, d17 2485# CHECK-NEXT: - - - - - - 0.50 0.50 vmin.s8 q8, q8, q9 2486# CHECK-NEXT: - - - - - - 0.50 0.50 vmin.s16 q8, q8, q9 2487# CHECK-NEXT: - - - - - - 0.50 0.50 vmin.s32 q8, q8, q9 2488# CHECK-NEXT: - - - - - - 0.50 0.50 vmin.u8 q8, q8, q9 2489# CHECK-NEXT: - - - - - - 0.50 0.50 vmin.u16 q8, q8, q9 2490# CHECK-NEXT: - - - - - - 0.50 0.50 vmin.u32 q8, q8, q9 2491# CHECK-NEXT: - - - - - - 0.50 0.50 vmin.f32 q8, q8, q9 2492# CHECK-NEXT: - - - - - - 0.50 0.50 vmax.s8 d16, d16, d17 2493# CHECK-NEXT: - - - - - - 0.50 0.50 vmax.s16 d16, d16, d17 2494# CHECK-NEXT: - - - - - - 0.50 0.50 vmax.s32 d16, d16, d17 2495# CHECK-NEXT: - - - - - - 0.50 0.50 vmax.u8 d16, d16, d17 2496# CHECK-NEXT: - - - - - - 0.50 0.50 vmax.u16 d16, d16, d17 2497# CHECK-NEXT: - - - - - - 0.50 0.50 vmax.u32 d16, d16, d17 2498# CHECK-NEXT: - - - - - - 0.50 0.50 vmax.f32 d16, d16, d17 2499# CHECK-NEXT: - - - - - - 0.50 0.50 vmax.s8 q8, q8, q9 2500# CHECK-NEXT: - - - - - - 0.50 0.50 vmax.s16 q8, q8, q9 2501# CHECK-NEXT: - - - - - - 0.50 0.50 vmax.s32 q8, q8, q9 2502# CHECK-NEXT: - - - - - - 0.50 0.50 vmax.u8 q8, q8, q9 2503# CHECK-NEXT: - - - - - - 0.50 0.50 vmax.u16 q8, q8, q9 2504# CHECK-NEXT: - - - - - - 0.50 0.50 vmax.u32 q8, q8, q9 2505# CHECK-NEXT: - - - - - - 0.50 0.50 vmax.f32 q8, q8, q9 2506# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i8 d16, #0x8 2507# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i16 d16, #0x10 2508# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i16 d16, #0x1000 2509# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i32 d16, #0x20 2510# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i32 d16, #0x2000 2511# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i32 d16, #0x200000 2512# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i32 d16, #0x20000000 2513# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i32 d16, #0x20ff 2514# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i32 d16, #0x20ffff 2515# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i64 d16, #0xff0000ff0000ffff 2516# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i8 q8, #0x8 2517# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i16 q8, #0x10 2518# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i16 q8, #0x1000 2519# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i32 q8, #0x20 2520# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i32 q8, #0x2000 2521# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i32 q8, #0x200000 2522# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i32 q8, #0x20000000 2523# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i32 q8, #0x20ff 2524# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i32 q8, #0x20ffff 2525# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.i64 q8, #0xff0000ff0000ffff 2526# CHECK-NEXT: - - - - - - 0.50 0.50 vmvn.i16 d16, #0x10 2527# CHECK-NEXT: - - - - - - 0.50 0.50 vmvn.i16 d16, #0x1000 2528# CHECK-NEXT: - - - - - - 0.50 0.50 vmvn.i32 d16, #0x20 2529# CHECK-NEXT: - - - - - - 0.50 0.50 vmvn.i32 d16, #0x2000 2530# CHECK-NEXT: - - - - - - 0.50 0.50 vmvn.i32 d16, #0x200000 2531# CHECK-NEXT: - - - - - - 0.50 0.50 vmvn.i32 d16, #0x20000000 2532# CHECK-NEXT: - - - - - - 0.50 0.50 vmvn.i32 d16, #0x20ff 2533# CHECK-NEXT: - - - - - - 0.50 0.50 vmvn.i32 d16, #0x20ffff 2534# CHECK-NEXT: - - - - - - - 1.00 vmovl.s8 q8, d16 2535# CHECK-NEXT: - - - - - - - 1.00 vmovl.s16 q8, d16 2536# CHECK-NEXT: - - - - - - - 1.00 vmovl.s32 q8, d16 2537# CHECK-NEXT: - - - - - - - 1.00 vmovl.u8 q8, d16 2538# CHECK-NEXT: - - - - - - - 1.00 vmovl.u16 q8, d16 2539# CHECK-NEXT: - - - - - - - 1.00 vmovl.u32 q8, d16 2540# CHECK-NEXT: - - - - - - 0.50 0.50 vmovn.i16 d16, q8 2541# CHECK-NEXT: - - - - - - 0.50 0.50 vmovn.i32 d16, q8 2542# CHECK-NEXT: - - - - - - 0.50 0.50 vmovn.i64 d16, q8 2543# CHECK-NEXT: - - - - - - - 1.00 vqmovn.s16 d16, q8 2544# CHECK-NEXT: - - - - - - - 1.00 vqmovn.s32 d16, q8 2545# CHECK-NEXT: - - - - - - - 1.00 vqmovn.s64 d16, q8 2546# CHECK-NEXT: - - - - - - - 1.00 vqmovn.u16 d16, q8 2547# CHECK-NEXT: - - - - - - - 1.00 vqmovn.u32 d16, q8 2548# CHECK-NEXT: - - - - - - - 1.00 vqmovn.u64 d16, q8 2549# CHECK-NEXT: - - - - - - - 1.00 vqmovun.s16 d16, q8 2550# CHECK-NEXT: - - - - - - - 1.00 vqmovun.s32 d16, q8 2551# CHECK-NEXT: - - - - - - - 1.00 vqmovun.s64 d16, q8 2552# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vmov.s8 r0, d16[1] 2553# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vmov.s16 r0, d16[1] 2554# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vmov.u8 r0, d16[1] 2555# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vmov.u16 r0, d16[1] 2556# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vmov.32 r0, d16[1] 2557# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vmov.8 d16[1], r1 2558# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vmov.16 d16[1], r1 2559# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vmov.32 d16[1], r1 2560# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vmov.8 d18[1], r1 2561# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vmov.16 d18[1], r1 2562# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vmov.32 d18[1], r1 2563# CHECK-NEXT: - - - - - - 1.00 - vmla.i8 d16, d18, d17 2564# CHECK-NEXT: - - - - - - 1.00 - vmla.i16 d16, d18, d17 2565# CHECK-NEXT: - - - - - - 1.00 - vmla.i32 d16, d18, d17 2566# CHECK-NEXT: - - - - - - 0.50 0.50 vmla.f32 d16, d18, d17 2567# CHECK-NEXT: - - - - - - 1.00 - vmla.i8 q9, q8, q10 2568# CHECK-NEXT: - - - - - - 1.00 - vmla.i16 q9, q8, q10 2569# CHECK-NEXT: - - - - - - 1.00 - vmla.i32 q9, q8, q10 2570# CHECK-NEXT: - - - - - - 0.50 0.50 vmla.f32 q9, q8, q10 2571# CHECK-NEXT: - - - - - - 1.00 - vmlal.s8 q8, d19, d18 2572# CHECK-NEXT: - - - - - - 1.00 - vmlal.s16 q8, d19, d18 2573# CHECK-NEXT: - - - - - - 1.00 - vmlal.s32 q8, d19, d18 2574# CHECK-NEXT: - - - - - - 1.00 - vmlal.u8 q8, d19, d18 2575# CHECK-NEXT: - - - - - - 1.00 - vmlal.u16 q8, d19, d18 2576# CHECK-NEXT: - - - - - - 1.00 - vmlal.u32 q8, d19, d18 2577# CHECK-NEXT: - - - - - - 1.00 - vqdmlal.s16 q8, d19, d18 2578# CHECK-NEXT: - - - - - - 1.00 - vqdmlal.s32 q8, d19, d18 2579# CHECK-NEXT: - - - - - - 1.00 - vmls.i8 d16, d18, d17 2580# CHECK-NEXT: - - - - - - 1.00 - vmls.i16 d16, d18, d17 2581# CHECK-NEXT: - - - - - - 1.00 - vmls.i32 d16, d18, d17 2582# CHECK-NEXT: - - - - - - 0.50 0.50 vmls.f32 d16, d18, d17 2583# CHECK-NEXT: - - - - - - 1.00 - vmls.i8 q9, q8, q10 2584# CHECK-NEXT: - - - - - - 1.00 - vmls.i16 q9, q8, q10 2585# CHECK-NEXT: - - - - - - 1.00 - vmls.i32 q9, q8, q10 2586# CHECK-NEXT: - - - - - - 0.50 0.50 vmls.f32 q9, q8, q10 2587# CHECK-NEXT: - - - - - - 1.00 - vmlsl.s8 q8, d19, d18 2588# CHECK-NEXT: - - - - - - 1.00 - vmlsl.s16 q8, d19, d18 2589# CHECK-NEXT: - - - - - - 1.00 - vmlsl.s32 q8, d19, d18 2590# CHECK-NEXT: - - - - - - 1.00 - vmlsl.u8 q8, d19, d18 2591# CHECK-NEXT: - - - - - - 1.00 - vmlsl.u16 q8, d19, d18 2592# CHECK-NEXT: - - - - - - 1.00 - vmlsl.u32 q8, d19, d18 2593# CHECK-NEXT: - - - - - - 1.00 - vqdmlsl.s16 q8, d19, d18 2594# CHECK-NEXT: - - - - - - 1.00 - vqdmlsl.s32 q8, d19, d18 2595# CHECK-NEXT: - - - - - - 1.00 - vmul.i8 d16, d16, d17 2596# CHECK-NEXT: - - - - - - 1.00 - vmul.i16 d16, d16, d17 2597# CHECK-NEXT: - - - - - - 1.00 - vmul.i32 d16, d16, d17 2598# CHECK-NEXT: - - - - - - 0.50 0.50 vmul.f32 d16, d16, d17 2599# CHECK-NEXT: - - - - - - 1.00 - vmul.i8 q8, q8, q9 2600# CHECK-NEXT: - - - - - - 1.00 - vmul.i16 q8, q8, q9 2601# CHECK-NEXT: - - - - - - 1.00 - vmul.i32 q8, q8, q9 2602# CHECK-NEXT: - - - - - - 0.50 0.50 vmul.f32 q8, q8, q9 2603# CHECK-NEXT: - - - - - - 1.00 - vmul.p8 d16, d16, d17 2604# CHECK-NEXT: - - - - - - 1.00 - vmul.p8 q8, q8, q9 2605# CHECK-NEXT: - - - - - - 1.00 - vqdmulh.s16 d16, d16, d17 2606# CHECK-NEXT: - - - - - - 1.00 - vqdmulh.s32 d16, d16, d17 2607# CHECK-NEXT: - - - - - - 1.00 - vqdmulh.s16 q8, q8, q9 2608# CHECK-NEXT: - - - - - - 1.00 - vqdmulh.s32 q8, q8, q9 2609# CHECK-NEXT: - - - - - - 1.00 - vqrdmulh.s16 d16, d16, d17 2610# CHECK-NEXT: - - - - - - 1.00 - vqrdmulh.s32 d16, d16, d17 2611# CHECK-NEXT: - - - - - - 1.00 - vqrdmulh.s16 q8, q8, q9 2612# CHECK-NEXT: - - - - - - 1.00 - vqrdmulh.s32 q8, q8, q9 2613# CHECK-NEXT: - - - - - - 1.00 - vmull.s8 q8, d16, d17 2614# CHECK-NEXT: - - - - - - 1.00 - vmull.s16 q8, d16, d17 2615# CHECK-NEXT: - - - - - - 1.00 - vmull.s32 q8, d16, d17 2616# CHECK-NEXT: - - - - - - 1.00 - vmull.u8 q8, d16, d17 2617# CHECK-NEXT: - - - - - - 1.00 - vmull.u16 q8, d16, d17 2618# CHECK-NEXT: - - - - - - 1.00 - vmull.u32 q8, d16, d17 2619# CHECK-NEXT: - - - - - - 1.00 - vmull.p8 q8, d16, d17 2620# CHECK-NEXT: - - - - - - 1.00 - vqdmull.s16 q8, d16, d17 2621# CHECK-NEXT: - - - - - - 1.00 - vqdmull.s32 q8, d16, d17 2622# CHECK-NEXT: - - - - - - 0.50 0.50 vneg.s8 d16, d16 2623# CHECK-NEXT: - - - - - - 0.50 0.50 vneg.s16 d16, d16 2624# CHECK-NEXT: - - - - - - 0.50 0.50 vneg.s32 d16, d16 2625# CHECK-NEXT: - - - - - - 0.50 0.50 vneg.f32 d16, d16 2626# CHECK-NEXT: - - - - - - 0.50 0.50 vneg.s8 q8, q8 2627# CHECK-NEXT: - - - - - - 0.50 0.50 vneg.s16 q8, q8 2628# CHECK-NEXT: - - - - - - 0.50 0.50 vneg.s32 q8, q8 2629# CHECK-NEXT: - - - - - - 0.50 0.50 vneg.f32 q8, q8 2630# CHECK-NEXT: - - - - - - 0.50 0.50 vqneg.s8 d16, d16 2631# CHECK-NEXT: - - - - - - 0.50 0.50 vqneg.s16 d16, d16 2632# CHECK-NEXT: - - - - - - 0.50 0.50 vqneg.s32 d16, d16 2633# CHECK-NEXT: - - - - - - 0.50 0.50 vqneg.s8 q8, q8 2634# CHECK-NEXT: - - - - - - 0.50 0.50 vqneg.s16 q8, q8 2635# CHECK-NEXT: - - - - - - 0.50 0.50 vqneg.s32 q8, q8 2636# CHECK-NEXT: - - - - - - 0.50 0.50 vpadd.i8 d16, d17, d16 2637# CHECK-NEXT: - - - - - - 0.50 0.50 vpadd.i16 d16, d17, d16 2638# CHECK-NEXT: - - - - - - 0.50 0.50 vpadd.i32 d16, d17, d16 2639# CHECK-NEXT: - - - - - - 0.50 0.50 vpadd.f32 d16, d16, d17 2640# CHECK-NEXT: - - - - - - 0.50 0.50 vpaddl.s8 d16, d16 2641# CHECK-NEXT: - - - - - - 0.50 0.50 vpaddl.s16 d16, d16 2642# CHECK-NEXT: - - - - - - 0.50 0.50 vpaddl.s32 d16, d16 2643# CHECK-NEXT: - - - - - - 0.50 0.50 vpaddl.u8 d16, d16 2644# CHECK-NEXT: - - - - - - 0.50 0.50 vpaddl.u16 d16, d16 2645# CHECK-NEXT: - - - - - - 0.50 0.50 vpaddl.u32 d16, d16 2646# CHECK-NEXT: - - - - - - 0.50 0.50 vpaddl.s8 q8, q8 2647# CHECK-NEXT: - - - - - - 0.50 0.50 vpaddl.s16 q8, q8 2648# CHECK-NEXT: - - - - - - 0.50 0.50 vpaddl.s32 q8, q8 2649# CHECK-NEXT: - - - - - - 0.50 0.50 vpaddl.u8 q8, q8 2650# CHECK-NEXT: - - - - - - 0.50 0.50 vpaddl.u16 q8, q8 2651# CHECK-NEXT: - - - - - - 0.50 0.50 vpaddl.u32 q8, q8 2652# CHECK-NEXT: - - - - - - - 1.00 vpadal.s8 d16, d17 2653# CHECK-NEXT: - - - - - - - 1.00 vpadal.s16 d16, d17 2654# CHECK-NEXT: - - - - - - - 1.00 vpadal.s32 d16, d17 2655# CHECK-NEXT: - - - - - - - 1.00 vpadal.u8 d16, d17 2656# CHECK-NEXT: - - - - - - - 1.00 vpadal.u16 d16, d17 2657# CHECK-NEXT: - - - - - - - 1.00 vpadal.u32 d16, d17 2658# CHECK-NEXT: - - - - - - - 1.00 vpadal.s8 q9, q8 2659# CHECK-NEXT: - - - - - - - 1.00 vpadal.s16 q9, q8 2660# CHECK-NEXT: - - - - - - - 1.00 vpadal.s32 q9, q8 2661# CHECK-NEXT: - - - - - - - 1.00 vpadal.u8 q9, q8 2662# CHECK-NEXT: - - - - - - - 1.00 vpadal.u16 q9, q8 2663# CHECK-NEXT: - - - - - - - 1.00 vpadal.u32 q9, q8 2664# CHECK-NEXT: - - - - - - 0.50 0.50 vpmin.s8 d16, d16, d17 2665# CHECK-NEXT: - - - - - - 0.50 0.50 vpmin.s16 d16, d16, d17 2666# CHECK-NEXT: - - - - - - 0.50 0.50 vpmin.s32 d16, d16, d17 2667# CHECK-NEXT: - - - - - - 0.50 0.50 vpmin.u8 d16, d16, d17 2668# CHECK-NEXT: - - - - - - 0.50 0.50 vpmin.u16 d16, d16, d17 2669# CHECK-NEXT: - - - - - - 0.50 0.50 vpmin.u32 d16, d16, d17 2670# CHECK-NEXT: - - - - - - 0.50 0.50 vpmin.f32 d16, d16, d17 2671# CHECK-NEXT: - - - - - - 0.50 0.50 vpmax.s8 d16, d16, d17 2672# CHECK-NEXT: - - - - - - 0.50 0.50 vpmax.s16 d16, d16, d17 2673# CHECK-NEXT: - - - - - - 0.50 0.50 vpmax.s32 d16, d16, d17 2674# CHECK-NEXT: - - - - - - 0.50 0.50 vpmax.u8 d16, d16, d17 2675# CHECK-NEXT: - - - - - - 0.50 0.50 vpmax.u16 d16, d16, d17 2676# CHECK-NEXT: - - - - - - 0.50 0.50 vpmax.u32 d16, d16, d17 2677# CHECK-NEXT: - - - - - - 0.50 0.50 vpmax.f32 d16, d16, d17 2678# CHECK-NEXT: - - - - - - 0.50 0.50 vrecpe.u32 d16, d16 2679# CHECK-NEXT: - - - - - - 0.50 0.50 vrecpe.u32 q8, q8 2680# CHECK-NEXT: - - - - - - 0.50 0.50 vrecpe.f32 d16, d16 2681# CHECK-NEXT: - - - - - - 0.50 0.50 vrecpe.f32 q8, q8 2682# CHECK-NEXT: - - - - - - 0.50 0.50 vrecps.f32 d16, d16, d17 2683# CHECK-NEXT: - - - - - - 0.50 0.50 vrecps.f32 q8, q8, q9 2684# CHECK-NEXT: - - - - - - 0.50 0.50 vrsqrte.u32 d16, d16 2685# CHECK-NEXT: - - - - - - 0.50 0.50 vrsqrte.u32 q8, q8 2686# CHECK-NEXT: - - - - - - 0.50 0.50 vrsqrte.f32 d16, d16 2687# CHECK-NEXT: - - - - - - 0.50 0.50 vrsqrte.f32 q8, q8 2688# CHECK-NEXT: - - - - - - 0.50 0.50 vrsqrts.f32 d16, d16, d17 2689# CHECK-NEXT: - - - - - - 0.50 0.50 vrsqrts.f32 q8, q8, q9 2690# CHECK-NEXT: - - - - - - 0.50 0.50 vrev64.8 d16, d16 2691# CHECK-NEXT: - - - - - - 0.50 0.50 vrev64.16 d16, d16 2692# CHECK-NEXT: - - - - - - 0.50 0.50 vrev64.32 d16, d16 2693# CHECK-NEXT: - - - - - - 0.50 0.50 vrev64.8 q8, q8 2694# CHECK-NEXT: - - - - - - 0.50 0.50 vrev64.16 q8, q8 2695# CHECK-NEXT: - - - - - - 0.50 0.50 vrev64.32 q8, q8 2696# CHECK-NEXT: - - - - - - 0.50 0.50 vrev32.8 d16, d16 2697# CHECK-NEXT: - - - - - - 0.50 0.50 vrev32.16 d16, d16 2698# CHECK-NEXT: - - - - - - 0.50 0.50 vrev32.8 q8, q8 2699# CHECK-NEXT: - - - - - - 0.50 0.50 vrev32.16 q8, q8 2700# CHECK-NEXT: - - - - - - 0.50 0.50 vrev16.8 d16, d16 2701# CHECK-NEXT: - - - - - - 0.50 0.50 vrev16.8 q8, q8 2702# CHECK-NEXT: - - - - - - - 1.00 vqshl.s8 d16, d16, d17 2703# CHECK-NEXT: - - - - - - - 1.00 vqshl.s16 d16, d16, d17 2704# CHECK-NEXT: - - - - - - - 1.00 vqshl.s32 d16, d16, d17 2705# CHECK-NEXT: - - - - - - - 1.00 vqshl.s64 d16, d16, d17 2706# CHECK-NEXT: - - - - - - - 1.00 vqshl.u8 d16, d16, d17 2707# CHECK-NEXT: - - - - - - - 1.00 vqshl.u16 d16, d16, d17 2708# CHECK-NEXT: - - - - - - - 1.00 vqshl.u32 d16, d16, d17 2709# CHECK-NEXT: - - - - - - - 1.00 vqshl.u64 d16, d16, d17 2710# CHECK-NEXT: - - - - - - - 1.00 vqshl.s8 q8, q8, q9 2711# CHECK-NEXT: - - - - - - - 1.00 vqshl.s16 q8, q8, q9 2712# CHECK-NEXT: - - - - - - - 1.00 vqshl.s32 q8, q8, q9 2713# CHECK-NEXT: - - - - - - - 1.00 vqshl.s64 q8, q8, q9 2714# CHECK-NEXT: - - - - - - - 1.00 vqshl.u8 q8, q8, q9 2715# CHECK-NEXT: - - - - - - - 1.00 vqshl.u16 q8, q8, q9 2716# CHECK-NEXT: - - - - - - - 1.00 vqshl.u32 q8, q8, q9 2717# CHECK-NEXT: - - - - - - - 1.00 vqshl.u64 q8, q8, q9 2718# CHECK-NEXT: - - - - - - - 1.00 vqshl.s8 d16, d16, #7 2719# CHECK-NEXT: - - - - - - - 1.00 vqshl.s16 d16, d16, #15 2720# CHECK-NEXT: - - - - - - - 1.00 vqshl.s32 d16, d16, #31 2721# CHECK-NEXT: - - - - - - - 1.00 vqshl.s64 d16, d16, #63 2722# CHECK-NEXT: - - - - - - - 1.00 vqshl.u8 d16, d16, #7 2723# CHECK-NEXT: - - - - - - - 1.00 vqshl.u16 d16, d16, #15 2724# CHECK-NEXT: - - - - - - - 1.00 vqshl.u32 d16, d16, #31 2725# CHECK-NEXT: - - - - - - - 1.00 vqshl.u64 d16, d16, #63 2726# CHECK-NEXT: - - - - - - - 1.00 vqshlu.s8 d16, d16, #7 2727# CHECK-NEXT: - - - - - - - 1.00 vqshlu.s16 d16, d16, #15 2728# CHECK-NEXT: - - - - - - - 1.00 vqshlu.s32 d16, d16, #31 2729# CHECK-NEXT: - - - - - - - 1.00 vqshlu.s64 d16, d16, #63 2730# CHECK-NEXT: - - - - - - - 1.00 vqshl.s8 q8, q8, #7 2731# CHECK-NEXT: - - - - - - - 1.00 vqshl.s16 q8, q8, #15 2732# CHECK-NEXT: - - - - - - - 1.00 vqshl.s32 q8, q8, #31 2733# CHECK-NEXT: - - - - - - - 1.00 vqshl.s64 q8, q8, #63 2734# CHECK-NEXT: - - - - - - - 1.00 vqshl.u8 q8, q8, #7 2735# CHECK-NEXT: - - - - - - - 1.00 vqshl.u16 q8, q8, #15 2736# CHECK-NEXT: - - - - - - - 1.00 vqshl.u32 q8, q8, #31 2737# CHECK-NEXT: - - - - - - - 1.00 vqshl.u64 q8, q8, #63 2738# CHECK-NEXT: - - - - - - - 1.00 vqshlu.s8 q8, q8, #7 2739# CHECK-NEXT: - - - - - - - 1.00 vqshlu.s16 q8, q8, #15 2740# CHECK-NEXT: - - - - - - - 1.00 vqshlu.s32 q8, q8, #31 2741# CHECK-NEXT: - - - - - - - 1.00 vqshlu.s64 q8, q8, #63 2742# CHECK-NEXT: - - - - - - - 1.00 vqrshl.s8 d16, d16, d17 2743# CHECK-NEXT: - - - - - - - 1.00 vqrshl.s16 d16, d16, d17 2744# CHECK-NEXT: - - - - - - - 1.00 vqrshl.s32 d16, d16, d17 2745# CHECK-NEXT: - - - - - - - 1.00 vqrshl.s64 d16, d16, d17 2746# CHECK-NEXT: - - - - - - - 1.00 vqrshl.u8 d16, d16, d17 2747# CHECK-NEXT: - - - - - - - 1.00 vqrshl.u16 d16, d16, d17 2748# CHECK-NEXT: - - - - - - - 1.00 vqrshl.u32 d16, d16, d17 2749# CHECK-NEXT: - - - - - - - 1.00 vqrshl.u64 d16, d16, d17 2750# CHECK-NEXT: - - - - - - - 1.00 vqrshl.s8 q8, q8, q9 2751# CHECK-NEXT: - - - - - - - 1.00 vqrshl.s16 q8, q8, q9 2752# CHECK-NEXT: - - - - - - - 1.00 vqrshl.s32 q8, q8, q9 2753# CHECK-NEXT: - - - - - - - 1.00 vqrshl.s64 q8, q8, q9 2754# CHECK-NEXT: - - - - - - - 1.00 vqrshl.u8 q8, q8, q9 2755# CHECK-NEXT: - - - - - - - 1.00 vqrshl.u16 q8, q8, q9 2756# CHECK-NEXT: - - - - - - - 1.00 vqrshl.u32 q8, q8, q9 2757# CHECK-NEXT: - - - - - - - 1.00 vqrshl.u64 q8, q8, q9 2758# CHECK-NEXT: - - - - - - - 1.00 vqshrn.s16 d16, q8, #8 2759# CHECK-NEXT: - - - - - - - 1.00 vqshrn.s32 d16, q8, #16 2760# CHECK-NEXT: - - - - - - - 1.00 vqshrn.s64 d16, q8, #32 2761# CHECK-NEXT: - - - - - - - 1.00 vqshrn.u16 d16, q8, #8 2762# CHECK-NEXT: - - - - - - - 1.00 vqshrn.u32 d16, q8, #16 2763# CHECK-NEXT: - - - - - - - 1.00 vqshrn.u64 d16, q8, #32 2764# CHECK-NEXT: - - - - - - - 1.00 vqshrun.s16 d16, q8, #8 2765# CHECK-NEXT: - - - - - - - 1.00 vqshrun.s32 d16, q8, #16 2766# CHECK-NEXT: - - - - - - - 1.00 vqshrun.s64 d16, q8, #32 2767# CHECK-NEXT: - - - - - - - 1.00 vqrshrn.s16 d16, q8, #8 2768# CHECK-NEXT: - - - - - - - 1.00 vqrshrn.s32 d16, q8, #16 2769# CHECK-NEXT: - - - - - - - 1.00 vqrshrn.s64 d16, q8, #32 2770# CHECK-NEXT: - - - - - - - 1.00 vqrshrn.u16 d16, q8, #8 2771# CHECK-NEXT: - - - - - - - 1.00 vqrshrn.u32 d16, q8, #16 2772# CHECK-NEXT: - - - - - - - 1.00 vqrshrn.u64 d16, q8, #32 2773# CHECK-NEXT: - - - - - - - 1.00 vqrshrun.s16 d16, q8, #8 2774# CHECK-NEXT: - - - - - - - 1.00 vqrshrun.s32 d16, q8, #16 2775# CHECK-NEXT: - - - - - - - 1.00 vqrshrun.s64 d16, q8, #32 2776# CHECK-NEXT: - - - - - - - 1.00 vshl.u8 d16, d17, d16 2777# CHECK-NEXT: - - - - - - - 1.00 vshl.u16 d16, d17, d16 2778# CHECK-NEXT: - - - - - - - 1.00 vshl.u32 d16, d17, d16 2779# CHECK-NEXT: - - - - - - - 1.00 vshl.u64 d16, d17, d16 2780# CHECK-NEXT: - - - - - - - 1.00 vshl.i8 d16, d16, #7 2781# CHECK-NEXT: - - - - - - - 1.00 vshl.i16 d16, d16, #15 2782# CHECK-NEXT: - - - - - - - 1.00 vshl.i32 d16, d16, #31 2783# CHECK-NEXT: - - - - - - - 1.00 vshl.i64 d16, d16, #63 2784# CHECK-NEXT: - - - - - - - 1.00 vshl.u8 q8, q9, q8 2785# CHECK-NEXT: - - - - - - - 1.00 vshl.u16 q8, q9, q8 2786# CHECK-NEXT: - - - - - - - 1.00 vshl.u32 q8, q9, q8 2787# CHECK-NEXT: - - - - - - - 1.00 vshl.u64 q8, q9, q8 2788# CHECK-NEXT: - - - - - - - 1.00 vshl.i8 q8, q8, #7 2789# CHECK-NEXT: - - - - - - - 1.00 vshl.i16 q8, q8, #15 2790# CHECK-NEXT: - - - - - - - 1.00 vshl.i32 q8, q8, #31 2791# CHECK-NEXT: - - - - - - - 1.00 vshl.i64 q8, q8, #63 2792# CHECK-NEXT: - - - - - - - 1.00 vshr.u8 d16, d16, #7 2793# CHECK-NEXT: - - - - - - - 1.00 vshr.u16 d16, d16, #15 2794# CHECK-NEXT: - - - - - - - 1.00 vshr.u32 d16, d16, #31 2795# CHECK-NEXT: - - - - - - - 1.00 vshr.u64 d16, d16, #63 2796# CHECK-NEXT: - - - - - - - 1.00 vshr.u8 q8, q8, #7 2797# CHECK-NEXT: - - - - - - - 1.00 vshr.u16 q8, q8, #15 2798# CHECK-NEXT: - - - - - - - 1.00 vshr.u32 q8, q8, #31 2799# CHECK-NEXT: - - - - - - - 1.00 vshr.u64 q8, q8, #63 2800# CHECK-NEXT: - - - - - - - 1.00 vshr.s8 d16, d16, #7 2801# CHECK-NEXT: - - - - - - - 1.00 vshr.s16 d16, d16, #15 2802# CHECK-NEXT: - - - - - - - 1.00 vshr.s32 d16, d16, #31 2803# CHECK-NEXT: - - - - - - - 1.00 vshr.s64 d16, d16, #63 2804# CHECK-NEXT: - - - - - - - 1.00 vshr.s8 q8, q8, #7 2805# CHECK-NEXT: - - - - - - - 1.00 vshr.s16 q8, q8, #15 2806# CHECK-NEXT: - - - - - - - 1.00 vshr.s32 q8, q8, #31 2807# CHECK-NEXT: - - - - - - - 1.00 vshr.s64 q8, q8, #63 2808# CHECK-NEXT: - - - - - - - 1.00 vsra.u8 d16, d16, #7 2809# CHECK-NEXT: - - - - - - - 1.00 vsra.u16 d16, d16, #15 2810# CHECK-NEXT: - - - - - - - 1.00 vsra.u32 d16, d16, #31 2811# CHECK-NEXT: - - - - - - - 1.00 vsra.u64 d16, d16, #63 2812# CHECK-NEXT: - - - - - - - 1.00 vsra.u8 q8, q8, #7 2813# CHECK-NEXT: - - - - - - - 1.00 vsra.u16 q8, q8, #15 2814# CHECK-NEXT: - - - - - - - 1.00 vsra.u32 q8, q8, #31 2815# CHECK-NEXT: - - - - - - - 1.00 vsra.u64 q8, q8, #63 2816# CHECK-NEXT: - - - - - - - 1.00 vsra.s8 d16, d16, #7 2817# CHECK-NEXT: - - - - - - - 1.00 vsra.s16 d16, d16, #15 2818# CHECK-NEXT: - - - - - - - 1.00 vsra.s32 d16, d16, #31 2819# CHECK-NEXT: - - - - - - - 1.00 vsra.s64 d16, d16, #63 2820# CHECK-NEXT: - - - - - - - 1.00 vsra.s8 q8, q8, #7 2821# CHECK-NEXT: - - - - - - - 1.00 vsra.s16 q8, q8, #15 2822# CHECK-NEXT: - - - - - - - 1.00 vsra.s32 q8, q8, #31 2823# CHECK-NEXT: - - - - - - - 1.00 vsra.s64 q8, q8, #63 2824# CHECK-NEXT: - - - - - - - 1.00 vsri.8 d16, d16, #7 2825# CHECK-NEXT: - - - - - - - 1.00 vsri.16 d16, d16, #15 2826# CHECK-NEXT: - - - - - - - 1.00 vsri.32 d16, d16, #31 2827# CHECK-NEXT: - - - - - - - 1.00 vsri.64 d16, d16, #63 2828# CHECK-NEXT: - - - - - - - 1.00 vsri.8 q8, q8, #7 2829# CHECK-NEXT: - - - - - - - 1.00 vsri.16 q8, q8, #15 2830# CHECK-NEXT: - - - - - - - 1.00 vsri.32 q8, q8, #31 2831# CHECK-NEXT: - - - - - - - 1.00 vsri.64 q8, q8, #63 2832# CHECK-NEXT: - - - - - - - 1.00 vsli.8 d16, d16, #7 2833# CHECK-NEXT: - - - - - - - 1.00 vsli.16 d16, d16, #15 2834# CHECK-NEXT: - - - - - - - 1.00 vsli.32 d16, d16, #31 2835# CHECK-NEXT: - - - - - - - 1.00 vsli.64 d16, d16, #63 2836# CHECK-NEXT: - - - - - - - 1.00 vsli.8 q8, q8, #7 2837# CHECK-NEXT: - - - - - - - 1.00 vsli.16 q8, q8, #15 2838# CHECK-NEXT: - - - - - - - 1.00 vsli.32 q8, q8, #31 2839# CHECK-NEXT: - - - - - - - 1.00 vsli.64 q8, q8, #63 2840# CHECK-NEXT: - - - - - - - 1.00 vshll.s8 q8, d16, #7 2841# CHECK-NEXT: - - - - - - - 1.00 vshll.s16 q8, d16, #15 2842# CHECK-NEXT: - - - - - - - 1.00 vshll.s32 q8, d16, #31 2843# CHECK-NEXT: - - - - - - - 1.00 vshll.u8 q8, d16, #7 2844# CHECK-NEXT: - - - - - - - 1.00 vshll.u16 q8, d16, #15 2845# CHECK-NEXT: - - - - - - - 1.00 vshll.u32 q8, d16, #31 2846# CHECK-NEXT: - - - - - - - 1.00 vshll.i8 q8, d16, #8 2847# CHECK-NEXT: - - - - - - - 1.00 vshll.i16 q8, d16, #16 2848# CHECK-NEXT: - - - - - - - 1.00 vshll.i32 q8, d16, #32 2849# CHECK-NEXT: - - - - - - - 1.00 vshrn.i16 d16, q8, #8 2850# CHECK-NEXT: - - - - - - - 1.00 vshrn.i32 d16, q8, #16 2851# CHECK-NEXT: - - - - - - - 1.00 vshrn.i64 d16, q8, #32 2852# CHECK-NEXT: - - - - - - - 1.00 vrshl.s8 d16, d17, d16 2853# CHECK-NEXT: - - - - - - - 1.00 vrshl.s16 d16, d17, d16 2854# CHECK-NEXT: - - - - - - - 1.00 vrshl.s32 d16, d17, d16 2855# CHECK-NEXT: - - - - - - - 1.00 vrshl.s64 d16, d17, d16 2856# CHECK-NEXT: - - - - - - - 1.00 vrshl.u8 d16, d17, d16 2857# CHECK-NEXT: - - - - - - - 1.00 vrshl.u16 d16, d17, d16 2858# CHECK-NEXT: - - - - - - - 1.00 vrshl.u32 d16, d17, d16 2859# CHECK-NEXT: - - - - - - - 1.00 vrshl.u64 d16, d17, d16 2860# CHECK-NEXT: - - - - - - - 1.00 vrshl.s8 q8, q9, q8 2861# CHECK-NEXT: - - - - - - - 1.00 vrshl.s16 q8, q9, q8 2862# CHECK-NEXT: - - - - - - - 1.00 vrshl.s32 q8, q9, q8 2863# CHECK-NEXT: - - - - - - - 1.00 vrshl.s64 q8, q9, q8 2864# CHECK-NEXT: - - - - - - - 1.00 vrshl.u8 q8, q9, q8 2865# CHECK-NEXT: - - - - - - - 1.00 vrshl.u16 q8, q9, q8 2866# CHECK-NEXT: - - - - - - - 1.00 vrshl.u32 q8, q9, q8 2867# CHECK-NEXT: - - - - - - - 1.00 vrshl.u64 q8, q9, q8 2868# CHECK-NEXT: - - - - - - - 1.00 vrshr.s8 d16, d16, #8 2869# CHECK-NEXT: - - - - - - - 1.00 vrshr.s16 d16, d16, #16 2870# CHECK-NEXT: - - - - - - - 1.00 vrshr.s32 d16, d16, #32 2871# CHECK-NEXT: - - - - - - - 1.00 vrshr.s64 d16, d16, #64 2872# CHECK-NEXT: - - - - - - - 1.00 vrshr.u8 d16, d16, #8 2873# CHECK-NEXT: - - - - - - - 1.00 vrshr.u16 d16, d16, #16 2874# CHECK-NEXT: - - - - - - - 1.00 vrshr.u32 d16, d16, #32 2875# CHECK-NEXT: - - - - - - - 1.00 vrshr.u64 d16, d16, #64 2876# CHECK-NEXT: - - - - - - - 1.00 vrshr.s8 q8, q8, #8 2877# CHECK-NEXT: - - - - - - - 1.00 vrshr.s16 q8, q8, #16 2878# CHECK-NEXT: - - - - - - - 1.00 vrshr.s32 q8, q8, #32 2879# CHECK-NEXT: - - - - - - - 1.00 vrshr.s64 q8, q8, #64 2880# CHECK-NEXT: - - - - - - - 1.00 vrshr.u8 q8, q8, #8 2881# CHECK-NEXT: - - - - - - - 1.00 vrshr.u16 q8, q8, #16 2882# CHECK-NEXT: - - - - - - - 1.00 vrshr.u32 q8, q8, #32 2883# CHECK-NEXT: - - - - - - - 1.00 vrshr.u64 q8, q8, #64 2884# CHECK-NEXT: - - - - - - - 1.00 vrshrn.i16 d16, q8, #8 2885# CHECK-NEXT: - - - - - - - 1.00 vrshrn.i32 d16, q8, #16 2886# CHECK-NEXT: - - - - - - - 1.00 vrshrn.i64 d16, q8, #32 2887# CHECK-NEXT: - - - - - - - 1.00 vqrshrn.s16 d16, q8, #4 2888# CHECK-NEXT: - - - - - - - 1.00 vqrshrn.s32 d16, q8, #13 2889# CHECK-NEXT: - - - - - - - 1.00 vqrshrn.s64 d16, q8, #13 2890# CHECK-NEXT: - - - - - - - 1.00 vqrshrn.u16 d16, q8, #4 2891# CHECK-NEXT: - - - - - - - 1.00 vqrshrn.u32 d16, q8, #13 2892# CHECK-NEXT: - - - - - - - 1.00 vqrshrn.u64 d16, q8, #13 2893# CHECK-NEXT: - - - - - - - 1.00 vsra.s8 d17, d16, #8 2894# CHECK-NEXT: - - - - - - - 1.00 vsra.s16 d17, d16, #16 2895# CHECK-NEXT: - - - - - - - 1.00 vsra.s32 d17, d16, #32 2896# CHECK-NEXT: - - - - - - - 1.00 vsra.s64 d17, d16, #64 2897# CHECK-NEXT: - - - - - - - 1.00 vsra.s8 q8, q9, #8 2898# CHECK-NEXT: - - - - - - - 1.00 vsra.s16 q8, q9, #16 2899# CHECK-NEXT: - - - - - - - 1.00 vsra.s32 q8, q9, #32 2900# CHECK-NEXT: - - - - - - - 1.00 vsra.s64 q8, q9, #64 2901# CHECK-NEXT: - - - - - - - 1.00 vsra.u8 d17, d16, #8 2902# CHECK-NEXT: - - - - - - - 1.00 vsra.u16 d17, d16, #16 2903# CHECK-NEXT: - - - - - - - 1.00 vsra.u32 d17, d16, #32 2904# CHECK-NEXT: - - - - - - - 1.00 vsra.u64 d17, d16, #64 2905# CHECK-NEXT: - - - - - - - 1.00 vsra.u8 q8, q9, #8 2906# CHECK-NEXT: - - - - - - - 1.00 vsra.u16 q8, q9, #16 2907# CHECK-NEXT: - - - - - - - 1.00 vsra.u32 q8, q9, #32 2908# CHECK-NEXT: - - - - - - - 1.00 vsra.u64 q8, q9, #64 2909# CHECK-NEXT: - - - - - - - 1.00 vrsra.s8 d17, d16, #8 2910# CHECK-NEXT: - - - - - - - 1.00 vrsra.s16 d17, d16, #16 2911# CHECK-NEXT: - - - - - - - 1.00 vrsra.s32 d17, d16, #32 2912# CHECK-NEXT: - - - - - - - 1.00 vrsra.s64 d17, d16, #64 2913# CHECK-NEXT: - - - - - - - 1.00 vrsra.u8 d17, d16, #8 2914# CHECK-NEXT: - - - - - - - 1.00 vrsra.u16 d17, d16, #16 2915# CHECK-NEXT: - - - - - - - 1.00 vrsra.u32 d17, d16, #32 2916# CHECK-NEXT: - - - - - - - 1.00 vrsra.u64 d17, d16, #64 2917# CHECK-NEXT: - - - - - - - 1.00 vrsra.s8 q8, q9, #8 2918# CHECK-NEXT: - - - - - - - 1.00 vrsra.s16 q8, q9, #16 2919# CHECK-NEXT: - - - - - - - 1.00 vrsra.s32 q8, q9, #32 2920# CHECK-NEXT: - - - - - - - 1.00 vrsra.s64 q8, q9, #64 2921# CHECK-NEXT: - - - - - - - 1.00 vrsra.u8 q8, q9, #8 2922# CHECK-NEXT: - - - - - - - 1.00 vrsra.u16 q8, q9, #16 2923# CHECK-NEXT: - - - - - - - 1.00 vrsra.u32 q8, q9, #32 2924# CHECK-NEXT: - - - - - - - 1.00 vrsra.u64 q8, q9, #64 2925# CHECK-NEXT: - - - - - - - 1.00 vsli.8 d17, d16, #7 2926# CHECK-NEXT: - - - - - - - 1.00 vsli.16 d17, d16, #15 2927# CHECK-NEXT: - - - - - - - 1.00 vsli.32 d17, d16, #31 2928# CHECK-NEXT: - - - - - - - 1.00 vsli.64 d17, d16, #63 2929# CHECK-NEXT: - - - - - - - 1.00 vsli.8 q9, q8, #7 2930# CHECK-NEXT: - - - - - - - 1.00 vsli.16 q9, q8, #15 2931# CHECK-NEXT: - - - - - - - 1.00 vsli.32 q9, q8, #31 2932# CHECK-NEXT: - - - - - - - 1.00 vsli.64 q9, q8, #63 2933# CHECK-NEXT: - - - - - - - 1.00 vsri.8 d17, d16, #8 2934# CHECK-NEXT: - - - - - - - 1.00 vsri.16 d17, d16, #16 2935# CHECK-NEXT: - - - - - - - 1.00 vsri.32 d17, d16, #32 2936# CHECK-NEXT: - - - - - - - 1.00 vsri.64 d17, d16, #64 2937# CHECK-NEXT: - - - - - - - 1.00 vsri.8 q9, q8, #8 2938# CHECK-NEXT: - - - - - - - 1.00 vsri.16 q9, q8, #16 2939# CHECK-NEXT: - - - - - - - 1.00 vsri.32 q9, q8, #32 2940# CHECK-NEXT: - - - - - - - 1.00 vsri.64 q9, q8, #64 2941# CHECK-NEXT: - - - - - - 0.50 0.50 vext.8 d16, d17, d16, #3 2942# CHECK-NEXT: - - - - - - 0.50 0.50 vext.8 d16, d17, d16, #5 2943# CHECK-NEXT: - - - - - - 0.50 0.50 vext.8 q8, q9, q8, #3 2944# CHECK-NEXT: - - - - - - 0.50 0.50 vext.8 q8, q9, q8, #7 2945# CHECK-NEXT: - - - - - - 0.50 0.50 vext.16 d16, d17, d16, #3 2946# CHECK-NEXT: - - - - - - 0.50 0.50 vext.32 q8, q9, q8, #3 2947# CHECK-NEXT: - - - - - - 1.00 1.00 vtrn.8 d17, d16 2948# CHECK-NEXT: - - - - - - 1.00 1.00 vtrn.16 d17, d16 2949# CHECK-NEXT: - - - - - - 1.00 1.00 vtrn.32 d17, d16 2950# CHECK-NEXT: - - - - - - 1.00 1.00 vtrn.8 q9, q8 2951# CHECK-NEXT: - - - - - - 1.00 1.00 vtrn.16 q9, q8 2952# CHECK-NEXT: - - - - - - 1.00 1.00 vtrn.32 q9, q8 2953# CHECK-NEXT: - - - - - - 1.00 1.00 vuzp.8 d17, d16 2954# CHECK-NEXT: - - - - - - 1.00 1.00 vuzp.16 d17, d16 2955# CHECK-NEXT: - - - - - - 1.00 1.00 vuzp.8 q9, q8 2956# CHECK-NEXT: - - - - - - 1.00 1.00 vuzp.16 q9, q8 2957# CHECK-NEXT: - - - - - - 1.00 1.00 vuzp.32 q9, q8 2958# CHECK-NEXT: - - - - - - 1.00 1.00 vzip.8 d17, d16 2959# CHECK-NEXT: - - - - - - 1.00 1.00 vzip.16 d17, d16 2960# CHECK-NEXT: - - - - - - 1.00 1.00 vzip.8 q9, q8 2961# CHECK-NEXT: - - - - - - 1.00 1.00 vzip.16 q9, q8 2962# CHECK-NEXT: - - - - - - 1.00 1.00 vzip.32 q9, q8 2963# CHECK-NEXT: - - - - - - 0.50 0.50 vsub.i8 d16, d17, d16 2964# CHECK-NEXT: - - - - - - 0.50 0.50 vsub.i16 d16, d17, d16 2965# CHECK-NEXT: - - - - - - 0.50 0.50 vsub.i32 d16, d17, d16 2966# CHECK-NEXT: - - - - - - 0.50 0.50 vsub.i64 d16, d17, d16 2967# CHECK-NEXT: - - - - - - 0.50 0.50 vsub.f32 d16, d16, d17 2968# CHECK-NEXT: - - - - - - 0.50 0.50 vsub.i8 q8, q8, q9 2969# CHECK-NEXT: - - - - - - 0.50 0.50 vsub.i16 q8, q8, q9 2970# CHECK-NEXT: - - - - - - 0.50 0.50 vsub.i32 q8, q8, q9 2971# CHECK-NEXT: - - - - - - 0.50 0.50 vsub.i64 q8, q8, q9 2972# CHECK-NEXT: - - - - - - 0.50 0.50 vsub.f32 q8, q8, q9 2973# CHECK-NEXT: - - - - - - 0.50 0.50 vsubl.s8 q8, d17, d16 2974# CHECK-NEXT: - - - - - - 0.50 0.50 vsubl.s16 q8, d17, d16 2975# CHECK-NEXT: - - - - - - 0.50 0.50 vsubl.s32 q8, d17, d16 2976# CHECK-NEXT: - - - - - - 0.50 0.50 vsubl.u8 q8, d17, d16 2977# CHECK-NEXT: - - - - - - 0.50 0.50 vsubl.u16 q8, d17, d16 2978# CHECK-NEXT: - - - - - - 0.50 0.50 vsubl.u32 q8, d17, d16 2979# CHECK-NEXT: - - - - - - 0.50 0.50 vsubw.s8 q8, q8, d18 2980# CHECK-NEXT: - - - - - - 0.50 0.50 vsubw.s16 q8, q8, d18 2981# CHECK-NEXT: - - - - - - 0.50 0.50 vsubw.s32 q8, q8, d18 2982# CHECK-NEXT: - - - - - - 0.50 0.50 vsubw.u8 q8, q8, d18 2983# CHECK-NEXT: - - - - - - 0.50 0.50 vsubw.u16 q8, q8, d18 2984# CHECK-NEXT: - - - - - - 0.50 0.50 vsubw.u32 q8, q8, d18 2985# CHECK-NEXT: - - - - - - 0.50 0.50 vhsub.s8 d16, d16, d17 2986# CHECK-NEXT: - - - - - - 0.50 0.50 vhsub.s16 d16, d16, d17 2987# CHECK-NEXT: - - - - - - 0.50 0.50 vhsub.s32 d16, d16, d17 2988# CHECK-NEXT: - - - - - - 0.50 0.50 vhsub.u8 d16, d16, d17 2989# CHECK-NEXT: - - - - - - 0.50 0.50 vhsub.u16 d16, d16, d17 2990# CHECK-NEXT: - - - - - - 0.50 0.50 vhsub.u32 d16, d16, d17 2991# CHECK-NEXT: - - - - - - 0.50 0.50 vhsub.s8 q8, q8, q9 2992# CHECK-NEXT: - - - - - - 0.50 0.50 vhsub.s16 q8, q8, q9 2993# CHECK-NEXT: - - - - - - 0.50 0.50 vhsub.s32 q8, q8, q9 2994# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.s8 d16, d16, d17 2995# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.s16 d16, d16, d17 2996# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.s32 d16, d16, d17 2997# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.s64 d16, d16, d17 2998# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.u8 d16, d16, d17 2999# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.u16 d16, d16, d17 3000# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.u32 d16, d16, d17 3001# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.u64 d16, d16, d17 3002# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.s8 q8, q8, q9 3003# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.s16 q8, q8, q9 3004# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.s32 q8, q8, q9 3005# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.s64 q8, q8, q9 3006# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.u8 q8, q8, q9 3007# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.u16 q8, q8, q9 3008# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.u32 q8, q8, q9 3009# CHECK-NEXT: - - - - - - 0.50 0.50 vqsub.u64 q8, q8, q9 3010# CHECK-NEXT: - - - - - - 0.50 0.50 vsubhn.i16 d16, q8, q9 3011# CHECK-NEXT: - - - - - - 0.50 0.50 vsubhn.i32 d16, q8, q9 3012# CHECK-NEXT: - - - - - - 0.50 0.50 vsubhn.i64 d16, q8, q9 3013# CHECK-NEXT: - - - - - - 0.50 0.50 vrsubhn.i16 d16, q8, q9 3014# CHECK-NEXT: - - - - - - 0.50 0.50 vrsubhn.i32 d16, q8, q9 3015# CHECK-NEXT: - - - - - - 0.50 0.50 vrsubhn.i64 d16, q8, q9 3016# CHECK-NEXT: - - - - - - 0.50 0.50 vtbl.8 d16, {d17}, d16 3017# CHECK-NEXT: - - - - - - 0.50 0.50 vtbl.8 d16, {d16, d17}, d18 3018# CHECK-NEXT: - - - - - - 0.50 0.50 vtbl.8 d16, {d16, d17, d18}, d20 3019# CHECK-NEXT: - - - - - - 0.50 0.50 vtbl.8 d16, {d16, d17, d18, d19}, d20 3020# CHECK-NEXT: - - - - - - 0.50 0.50 vtbx.8 d18, {d16}, d17 3021# CHECK-NEXT: - - - - - - 0.50 0.50 vtbx.8 d19, {d16, d17}, d18 3022# CHECK-NEXT: - - - - - - 0.50 0.50 vtbx.8 d20, {d16, d17, d18}, d21 3023# CHECK-NEXT: - - - - - - 0.50 0.50 vtbx.8 d20, {d16, d17, d18, d19}, d21 3024# CHECK-NEXT: - - - 1.00 - - - - vld1.8 {d16}, [r0:64] 3025# CHECK-NEXT: - - - 1.00 - - - - vld1.16 {d16}, [r0] 3026# CHECK-NEXT: - - - 1.00 - - - - vld1.32 {d16}, [r0] 3027# CHECK-NEXT: - - - 1.00 - - - - vld1.64 {d16}, [r0] 3028# CHECK-NEXT: - - - 1.00 - - - - vld1.8 {d16, d17}, [r0:64] 3029# CHECK-NEXT: - - - 1.00 - - - - vld1.16 {d16, d17}, [r0:128] 3030# CHECK-NEXT: - - - 1.00 - - - - vld1.32 {d16, d17}, [r0] 3031# CHECK-NEXT: - - - 1.00 - - - - vld1.64 {d16, d17}, [r0] 3032# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vld2.8 {d16, d17}, [r0:64] 3033# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vld2.16 {d16, d17}, [r0:128] 3034# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vld2.32 {d16, d17}, [r0] 3035# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vld2.8 {d16, d17, d18, d19}, [r0:64] 3036# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vld2.16 {d16, d17, d18, d19}, [r0:128] 3037# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vld2.32 {d16, d17, d18, d19}, [r0:256] 3038# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.8 {d16, d17, d18}, [r0:64] 3039# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.16 {d16, d17, d18}, [r0] 3040# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.32 {d16, d17, d18}, [r0] 3041# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.8 {d16, d18, d20}, [r0:64]! 3042# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.8 {d17, d19, d21}, [r0:64]! 3043# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.16 {d16, d18, d20}, [r0]! 3044# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.16 {d17, d19, d21}, [r0]! 3045# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.32 {d16, d18, d20}, [r0]! 3046# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.32 {d17, d19, d21}, [r0]! 3047# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.8 {d16, d17, d18, d19}, [r0:64] 3048# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.16 {d16, d17, d18, d19}, [r0:128] 3049# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.32 {d16, d17, d18, d19}, [r0:256] 3050# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.8 {d16, d18, d20, d22}, [r0:256]! 3051# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.8 {d17, d19, d21, d23}, [r0:256]! 3052# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.16 {d16, d18, d20, d22}, [r0]! 3053# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.16 {d17, d19, d21, d23}, [r0]! 3054# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.32 {d16, d18, d20, d22}, [r0]! 3055# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.32 {d17, d19, d21, d23}, [r0]! 3056# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vld1.8 {d16[3]}, [r0] 3057# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vld1.16 {d16[2]}, [r0:16] 3058# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vld1.32 {d16[1]}, [r0:32] 3059# CHECK-NEXT: - - - 2.00 - - 1.00 1.00 vld2.8 {d16[1], d17[1]}, [r0:16] 3060# CHECK-NEXT: - - - 2.00 - - 1.00 1.00 vld2.16 {d16[1], d17[1]}, [r0:32] 3061# CHECK-NEXT: - - - 2.00 - - 1.00 1.00 vld2.32 {d16[1], d17[1]}, [r0] 3062# CHECK-NEXT: - - - 2.00 - - 1.00 1.00 vld2.16 {d17[1], d19[1]}, [r0] 3063# CHECK-NEXT: - - - 2.00 - - 1.00 1.00 vld2.32 {d17[0], d19[0]}, [r0:64] 3064# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.8 {d16[1], d17[1], d18[1]}, [r0] 3065# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.16 {d16[1], d17[1], d18[1]}, [r0] 3066# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.32 {d16[1], d17[1], d18[1]}, [r0] 3067# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.16 {d16[1], d18[1], d20[1]}, [r0] 3068# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.32 {d17[1], d19[1], d21[1]}, [r0] 3069# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.8 {d0[], d1[], d2[]}, [r4] 3070# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.8 {d0[], d1[], d2[]}, [r4]! 3071# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.8 {d0[], d2[], d4[]}, [r4], r5 3072# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.16 {d0[], d2[], d4[]}, [r4] 3073# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.16 {d0[], d1[], d2[]}, [r4]! 3074# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.16 {d0[], d2[], d4[]}, [r4], r5 3075# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.32 {d0[], d1[], d2[]}, [r4] 3076# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.32 {d0[], d1[], d2[]}, [r4]! 3077# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.32 {d0[], d2[], d4[]}, [r4], r5 3078# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0:32] 3079# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] 3080# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0:128] 3081# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0:64] 3082# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] 3083# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.8 {d0[], d1[], d2[], d3[]}, [r4] 3084# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.8 {d0[], d2[], d4[], d6[]}, [r4:32] 3085# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.8 {d0[], d1[], d2[], d3[]}, [r4:32]! 3086# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.8 {d0[], d2[], d4[], d6[]}, [r4:32], r5 3087# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.16 {d0[], d1[], d2[], d3[]}, [r4] 3088# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.16 {d0[], d2[], d4[], d6[]}, [r4:64] 3089# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.16 {d0[], d1[], d2[], d3[]}, [r4:64]! 3090# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.16 {d0[], d2[], d4[], d6[]}, [r4:64], r5 3091# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.32 {d0[], d1[], d2[], d3[]}, [r4] 3092# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.32 {d0[], d2[], d4[], d6[]}, [r4:64] 3093# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.32 {d0[], d1[], d2[], d3[]}, [r4:128]! 3094# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.32 {d0[], d2[], d4[], d6[]}, [r4:128], r5 3095# CHECK-NEXT: - - - - - 1.00 - - vst1.8 {d16}, [r0:64] 3096# CHECK-NEXT: - - - - - 1.00 - - vst1.16 {d16}, [r0] 3097# CHECK-NEXT: - - - - - 1.00 - - vst1.32 {d16}, [r0] 3098# CHECK-NEXT: - - - - - 1.00 - - vst1.64 {d16}, [r0] 3099# CHECK-NEXT: - - - - - 1.00 - - vst1.8 {d16, d17}, [r0:64] 3100# CHECK-NEXT: - - - - - 1.00 - - vst1.16 {d16, d17}, [r0:128] 3101# CHECK-NEXT: - - - - - 1.00 - - vst1.32 {d16, d17}, [r0] 3102# CHECK-NEXT: - - - - - 1.00 - - vst1.64 {d16, d17}, [r0] 3103# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.8 {d16, d17}, [r0:64] 3104# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.16 {d16, d17}, [r0:128] 3105# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.32 {d16, d17}, [r0] 3106# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.8 {d16, d17, d18, d19}, [r0:64] 3107# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.16 {d16, d17, d18, d19}, [r0:128] 3108# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.32 {d16, d17, d18, d19}, [r0:256] 3109# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst3.8 {d16, d17, d18}, [r0:64] 3110# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst3.16 {d16, d17, d18}, [r0] 3111# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst3.32 {d16, d17, d18}, [r0] 3112# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst3.8 {d16, d18, d20}, [r0:64]! 3113# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst3.8 {d17, d19, d21}, [r0:64]! 3114# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst3.16 {d16, d18, d20}, [r0]! 3115# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst3.16 {d17, d19, d21}, [r0]! 3116# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst3.32 {d16, d18, d20}, [r0]! 3117# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst3.32 {d17, d19, d21}, [r0]! 3118# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst4.8 {d16, d17, d18, d19}, [r0:64] 3119# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst4.16 {d16, d17, d18, d19}, [r0:128] 3120# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst4.8 {d16, d18, d20, d22}, [r0:256]! 3121# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst4.8 {d17, d19, d21, d23}, [r0:256]! 3122# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst4.16 {d16, d18, d20, d22}, [r0]! 3123# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst4.16 {d17, d19, d21, d23}, [r0]! 3124# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst4.32 {d16, d18, d20, d22}, [r0]! 3125# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst4.32 {d17, d19, d21, d23}, [r0]! 3126# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.8 {d16[1], d17[1]}, [r0:16] 3127# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.16 {d16[1], d17[1]}, [r0:32] 3128# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.32 {d16[1], d17[1]}, [r0] 3129# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.16 {d17[1], d19[1]}, [r0] 3130# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.32 {d17[0], d19[0]}, [r0:64] 3131# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst3.8 {d16[1], d17[1], d18[1]}, [r0] 3132# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst3.16 {d16[1], d17[1], d18[1]}, [r0] 3133# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst3.32 {d16[1], d17[1], d18[1]}, [r0] 3134# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst3.16 {d17[2], d19[2], d21[2]}, [r0] 3135# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst3.32 {d16[0], d18[0], d20[0]}, [r0] 3136# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0:32] 3137# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst4.16 {d16[1], d17[1], d18[1], d19[1]}, [r0] 3138# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0:128] 3139# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0:64] 3140# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0] 3141# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld1.8 {d0[]}, [r0], r0 3142# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0]! 3143# CHECK-NEXT: - - - 2.00 - - - - vmovvs r2, lr, s27, s28 3144# CHECK-NEXT: - - - 1.00 - - - - vmov s3, s4, r1, r2 3145# CHECK-NEXT: - - - 1.00 - - - - vmov s2, s3, r1, r2 3146# CHECK-NEXT: - - - 2.00 - - - - vmov r1, r2, s3, s4 3147# CHECK-NEXT: - - - 2.00 - - - - vmov r1, r2, s2, s3 3148# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vmov d15, r1, r2 3149# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vmov d16, r1, r2 3150# CHECK-NEXT: - - - 2.00 - - - - vmov r1, r2, d15 3151# CHECK-NEXT: - - - 2.00 - - - - vmov r1, r2, d16 3152# CHECK-NEXT: - - - - - - 0.50 0.50 vcvttmi.f32.f16 s2, s19 3153# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.8 {d23, d24, d25}, [r6:64]! 3154# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.32 {d22, d23, d24, d25}, [pc:64]! 3155# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.32 {d26, d27}, [r1:64]! 3156# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.f32 d0, #1.600000e+01 3157# CHECK-NEXT: - - - - - - 0.50 0.50 vmov.f32 q0, #1.600000e+01 3158# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.8 {d8}, [r4]! 3159# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.16 {d8}, [r4]! 3160# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.32 {d8}, [r4]! 3161# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.64 {d8}, [r4]! 3162# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.8 {d8}, [r4], r6 3163# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.16 {d8}, [r4], r6 3164# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.32 {d8}, [r4], r6 3165# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.64 {d8}, [r4], r6 3166# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.8 {d8, d9}, [r4]! 3167# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.16 {d8, d9}, [r4]! 3168# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.32 {d8, d9}, [r4]! 3169# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.64 {d8, d9}, [r4]! 3170# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.8 {d8, d9}, [r4], r6 3171# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.16 {d8, d9}, [r4], r6 3172# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.32 {d8, d9}, [r4], r6 3173# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.64 {d8, d9}, [r4], r6 3174# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.8 {d8, d9, d10}, [r4]! 3175# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.16 {d8, d9, d10}, [r4]! 3176# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.32 {d8, d9, d10}, [r4]! 3177# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.64 {d8, d9, d10}, [r4]! 3178# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.8 {d8, d9, d10}, [r4], r6 3179# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.16 {d8, d9, d10}, [r4], r6 3180# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.32 {d8, d9, d10}, [r4], r6 3181# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.64 {d8, d9, d10}, [r4], r6 3182# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.8 {d8, d9, d10, d11}, [r4]! 3183# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.16 {d8, d9, d10, d11}, [r4]! 3184# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.32 {d8, d9, d10, d11}, [r4]! 3185# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.64 {d8, d9, d10, d11}, [r4]! 3186# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.8 {d8, d9, d10, d11}, [r4], r6 3187# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.16 {d8, d9, d10, d11}, [r4], r6 3188# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.32 {d8, d9, d10, d11}, [r4], r6 3189# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - vst1.64 {d8, d9, d10, d11}, [r4], r6 3190# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.8 {d8, d9}, [r4]! 3191# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.16 {d8, d9}, [r4]! 3192# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.32 {d8, d9}, [r4]! 3193# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.8 {d8, d9}, [r4], r6 3194# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.16 {d8, d9}, [r4], r6 3195# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.32 {d8, d9}, [r4], r6 3196# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.8 {d8, d10}, [r4]! 3197# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.16 {d8, d10}, [r4]! 3198# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.32 {d8, d10}, [r4]! 3199# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.8 {d8, d10}, [r4], r6 3200# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.16 {d8, d10}, [r4], r6 3201# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.32 {d8, d10}, [r4], r6 3202# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst3.8 {d8, d9, d10}, [r4]! 3203# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst3.16 {d8, d9, d10}, [r4]! 3204# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst3.32 {d8, d9, d10}, [r4]! 3205# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst3.8 {d8, d10, d12}, [r4], r6 3206# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst3.16 {d8, d10, d12}, [r4], r6 3207# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst3.32 {d8, d10, d12}, [r4], r6 3208# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst4.8 {d8, d9, d10, d11}, [r4]! 3209# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst4.16 {d8, d9, d10, d11}, [r4]! 3210# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst4.32 {d8, d9, d10, d11}, [r4]! 3211# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst4.8 {d8, d10, d12, d14}, [r4], r6 3212# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst4.16 {d8, d10, d12, d14}, [r4], r6 3213# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst4.32 {d8, d10, d12, d14}, [r4], r6 3214# CHECK-NEXT: - - - - - 1.00 - - vst1.16 {d8, d9}, [r4] 3215# CHECK-NEXT: - - - - - 1.00 - - vst1.32 {d8, d9}, [r4] 3216# CHECK-NEXT: - - - - - 1.00 - - vst1.64 {d8, d9}, [r4] 3217# CHECK-NEXT: - - - - - 1.00 - - vst1.8 {d8, d9}, [r4] 3218# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.16 {d8, d9}, [r4] 3219# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.32 {d8, d9}, [r4] 3220# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.8 {d8, d9}, [r4] 3221# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.16 {d8, d9}, [r4]! 3222# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.16 {d8, d9}, [r4], r6 3223# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.32 {d8, d9}, [r4]! 3224# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.32 {d8, d9}, [r4], r6 3225# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.8 {d8, d9}, [r4]! 3226# CHECK-NEXT: - 0.50 0.50 - - 1.00 0.50 0.50 vst2.8 {d8, d9}, [r4], r6 3227# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.16 {d8, d10}, [r4] 3228# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.32 {d8, d10}, [r4] 3229# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst2.8 {d8, d10}, [r4] 3230# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst3.8 {d8, d9, d10}, [r4] 3231# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst3.16 {d8, d9, d10}, [r4] 3232# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst3.32 {d8, d9, d10}, [r4] 3233# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst4.8 {d8, d9, d10, d11}, [r4] 3234# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst4.16 {d8, d9, d10, d11}, [r4] 3235# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst4.32 {d8, d9, d10, d11}, [r4] 3236# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst3.8 {d8, d10, d12}, [r4] 3237# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst3.16 {d8, d10, d12}, [r4] 3238# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst3.32 {d8, d10, d12}, [r4] 3239# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst4.8 {d8, d10, d12, d14}, [r4] 3240# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst4.16 {d8, d10, d12, d14}, [r4] 3241# CHECK-NEXT: - - - - - 1.00 0.50 0.50 vst4.32 {d8, d10, d12, d14}, [r4] 3242# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.8 {d8}, [r4]! 3243# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.16 {d8}, [r4]! 3244# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.32 {d8}, [r4]! 3245# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.64 {d8}, [r4]! 3246# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.8 {d8}, [r4], r6 3247# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.16 {d8}, [r4], r6 3248# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.32 {d8}, [r4], r6 3249# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.64 {d8}, [r4], r6 3250# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.8 {d8, d9}, [r4]! 3251# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.16 {d8, d9}, [r4]! 3252# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.32 {d8, d9}, [r4]! 3253# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.64 {d8, d9}, [r4]! 3254# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.8 {d8, d9}, [r4], r6 3255# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.16 {d8, d9}, [r4], r6 3256# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.32 {d8, d9}, [r4], r6 3257# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.64 {d8, d9}, [r4], r6 3258# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.8 {d8, d9, d10}, [r4]! 3259# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.16 {d8, d9, d10}, [r4]! 3260# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.32 {d8, d9, d10}, [r4]! 3261# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.64 {d8, d9, d10}, [r4]! 3262# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.8 {d8, d9, d10}, [r4], r6 3263# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.16 {d8, d9, d10}, [r4], r6 3264# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.32 {d8, d9, d10}, [r4], r6 3265# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.64 {d8, d9, d10}, [r4], r6 3266# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.8 {d8, d9, d10, d11}, [r4]! 3267# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.16 {d8, d9, d10, d11}, [r4]! 3268# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.32 {d8, d9, d10, d11}, [r4]! 3269# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.64 {d8, d9, d10, d11}, [r4]! 3270# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.8 {d8, d9, d10, d11}, [r4], r6 3271# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.16 {d8, d9, d10, d11}, [r4], r6 3272# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.32 {d8, d9, d10, d11}, [r4], r6 3273# CHECK-NEXT: - 0.50 0.50 1.00 - - - - vld1.64 {d8, d9, d10, d11}, [r4], r6 3274# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.8 {d8, d9}, [r4]! 3275# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.16 {d8, d9}, [r4]! 3276# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.32 {d8, d9}, [r4]! 3277# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.8 {d8, d9}, [r4], r6 3278# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.16 {d8, d9}, [r4], r6 3279# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.32 {d8, d9}, [r4], r6 3280# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.8 {d8, d10}, [r4]! 3281# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.16 {d8, d10}, [r4]! 3282# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.32 {d8, d10}, [r4]! 3283# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.8 {d8, d10}, [r4], r6 3284# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.16 {d8, d10}, [r4], r6 3285# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.32 {d8, d10}, [r4], r6 3286# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.8 {d8, d9, d10}, [r4]! 3287# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.16 {d8, d9, d10}, [r4]! 3288# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.32 {d8, d9, d10}, [r4]! 3289# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.8 {d8, d10, d12}, [r4], r6 3290# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.16 {d8, d10, d12}, [r4], r6 3291# CHECK-NEXT: - 1.50 1.50 3.00 - - 1.50 1.50 vld3.32 {d8, d10, d12}, [r4], r6 3292# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.8 {d8, d9, d10, d11}, [r4]! 3293# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.16 {d8, d9, d10, d11}, [r4]! 3294# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.32 {d8, d9, d10, d11}, [r4]! 3295# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.8 {d8, d10, d12, d14}, [r4], r6 3296# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.16 {d8, d10, d12, d14}, [r4], r6 3297# CHECK-NEXT: - 2.00 2.00 4.00 - - 2.00 2.00 vld4.32 {d8, d10, d12, d14}, [r4], r6 3298# CHECK-NEXT: - - - 1.00 - - - - vld1.16 {d8, d9}, [r4] 3299# CHECK-NEXT: - - - 1.00 - - - - vld1.32 {d8, d9}, [r4] 3300# CHECK-NEXT: - - - 1.00 - - - - vld1.64 {d8, d9}, [r4] 3301# CHECK-NEXT: - - - 1.00 - - - - vld1.8 {d8, d9}, [r4] 3302# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vld2.16 {d8, d9}, [r4] 3303# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vld2.32 {d8, d9}, [r4] 3304# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vld2.8 {d8, d9}, [r4] 3305# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.16 {d8, d9}, [r4]! 3306# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.16 {d8, d9}, [r4], r6 3307# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.32 {d8, d9}, [r4]! 3308# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.32 {d8, d9}, [r4], r6 3309# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.8 {d8, d9}, [r4]! 3310# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.8 {d8, d9}, [r4], r6 3311# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vld2.16 {d8, d10}, [r4] 3312# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vld2.32 {d8, d10}, [r4] 3313# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 vld2.8 {d8, d10}, [r4] 3314# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.16 {d8, d9, d10, d11}, [r4]! 3315# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.16 {d8, d9, d10, d11}, [r4], r6 3316# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.32 {d8, d9, d10, d11}, [r4]! 3317# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.32 {d8, d9, d10, d11}, [r4], r6 3318# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.8 {d8, d9, d10, d11}, [r4]! 3319# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.8 {d8, d9, d10, d11}, [r4], r6 3320# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.8 {d8, d9, d10}, [r4] 3321# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.16 {d8, d9, d10}, [r4] 3322# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.32 {d8, d9, d10}, [r4] 3323# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.8 {d8, d9, d10, d11}, [r4] 3324# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.16 {d8, d9, d10, d11}, [r4] 3325# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.32 {d8, d9, d10, d11}, [r4] 3326# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.8 {d8, d10, d12}, [r4] 3327# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.16 {d8, d10, d12}, [r4] 3328# CHECK-NEXT: - - - 3.00 - - 1.50 1.50 vld3.32 {d8, d10, d12}, [r4] 3329# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.8 {d8, d10, d12, d14}, [r4] 3330# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.16 {d8, d10, d12, d14}, [r4] 3331# CHECK-NEXT: - - - 4.00 - - 2.00 2.00 vld4.32 {d8, d10, d12, d14}, [r4] 3332# CHECK-NEXT: - - - 2.00 - - 1.00 1.00 vld2.8 {d0[], d1[]}, [r2] 3333# CHECK-NEXT: - - - 2.00 - - 1.00 1.00 vld2.16 {d0[], d1[]}, [r2] 3334# CHECK-NEXT: - - - 2.00 - - 1.00 1.00 vld2.32 {d0[], d1[]}, [r2] 3335# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.8 {d0[], d1[]}, [r2]! 3336# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.16 {d0[], d1[]}, [r2]! 3337# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.32 {d0[], d1[]}, [r2]! 3338# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.8 {d0[], d1[]}, [r2], r3 3339# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.16 {d0[], d1[]}, [r2], r3 3340# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.32 {d0[], d1[]}, [r2], r3 3341# CHECK-NEXT: - - - 2.00 - - 1.00 1.00 vld2.8 {d0[], d2[]}, [r3] 3342# CHECK-NEXT: - - - 2.00 - - 1.00 1.00 vld2.16 {d0[], d2[]}, [r3] 3343# CHECK-NEXT: - - - 2.00 - - 1.00 1.00 vld2.32 {d0[], d2[]}, [r3] 3344# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.8 {d0[], d2[]}, [r3]! 3345# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.16 {d0[], d2[]}, [r3]! 3346# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.32 {d0[], d2[]}, [r3]! 3347# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.8 {d0[], d2[]}, [r3], r4 3348# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.16 {d0[], d2[]}, [r3], r4 3349# CHECK-NEXT: - 0.50 0.50 1.00 - - 0.50 0.50 vld2.32 {d0[], d2[]}, [r3], r4 3350