| /freebsd-src/sys/contrib/device-tree/Bindings/fpga/ |
| H A D | fpga-bridge.txt | 1 FPGA Bridge Device Tree Binding
4 - bridge-enable : 0 if driver should disable bridge at startup
5 1 if driver should enable bridge at startup
6 Default is to leave bridge in current state.
9 fpga_bridge3: fpga-bridge@ffc25080 {
10 compatible = "altr,socfpga-fpga2sdram-bridge";
12 bridge-enable = <0>;
|
| H A D | fpga-bridge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/fpga-bridge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: FPGA Bridge
10 - Michal Simek <michal.simek@amd.com>
14 pattern: "^fpga-bridge(@.*|-([0-9]|[1-9][0-9]+))?$"
16 bridge-enable:
18 0 if driver should disable bridge at startup
19 1 if driver should enable bridge at startup
[all …]
|
| H A D | altera-hps2fpga-bridge.txt | 1 Altera FPGA/HPS Bridge Driver
4 - regs : base address and size for AXI bridge module
5 - compatible : Should contain one of:
6 "altr,socfpga-lwhps2fpga-bridge",
7 "altr,socfpga-hps2fpga-bridge", or
8 "altr,socfpga-fpga2hps-bridge"
9 - resets : Phandle and reset specifier for this bridge's reset
10 - clocks : Clocks used by this module.
12 See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
15 fpga_bridge0: fpga-bridge@ff400000 {
[all …]
|
| H A D | xilinx-pr-decoupler.txt | 6 changes from passing through the bridge. The controller can also
7 couple / enable the bridges which allows traffic to pass through the
8 bridge normally.
11 Softcore is compatible with the Xilinx LogiCORE pr-decoupler.
14 from passing through the bridge. The controller safely handles AXI4MM
15 and AXI4-Lite interfaces on a Reconfigurable Partition when it is
24 - compatible : Should contain "xlnx,pr-decoupler-1.00" followed by
25 "xlnx,pr-decoupler" or
26 "xlnx,dfx-axi-shutdown-manager-1.00" followed by
27 "xlnx,dfx-axi-shutdown-manager"
[all …]
|
| H A D | altera-freeze-bridge.txt | 1 Altera Freeze Bridge Controller Driver
3 The Altera Freeze Bridge Controller manages one or more freeze bridges.
5 changes from passing through the bridge. The controller can also
6 unfreeze/enable the bridges which allows traffic to pass through the
7 bridge normally.
10 - compatible : Should contain "altr,freeze-bridge-controller"
11 - regs : base address and size for freeze bridge module
13 See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
16 freeze-controller@100000450 {
17 compatible = "altr,freeze-bridge-controller";
[all …]
|
| H A D | altr,freeze-bridge-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/altr,freeze-bridge-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Altera Freeze Bridge Controller
10 The Altera Freeze Bridge Controller manages one or more freeze bridges.
12 changes from passing through the bridge. The controller can also
13 unfreeze/enable the bridges which allows traffic to pass through the bridge
17 - Xu Yilun <yilun.xu@intel.com>
20 - $ref: fpga-bridge.yaml#
[all …]
|
| H A D | altera-fpga2sdram-bridge.txt | 1 Altera FPGA To SDRAM Bridge Driver
4 - compatible : Should contain "altr,socfpga-fpga2sdram-bridge"
6 See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
9 fpga_bridge3: fpga-bridge@ffc25080 {
10 compatible = "altr,socfpga-fpga2sdram-bridge";
12 bridge-enable = <0>;
|
| H A D | altr,socfpga-hps2fpga-bridge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/altr,socfpga-hps2fpga-bridge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Altera FPGA/HPS Bridge
10 - Xu Yilun <yilun.xu@intel.com>
13 - $ref: fpga-bridge.yaml#
18 - altr,socfpga-lwhps2fpga-bridge
19 - altr,socfpga-hps2fpga-bridge
20 - altr,socfpga-fpga2hps-bridge
[all …]
|
| H A D | altr,socfpga-fpga2sdram-bridge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/altr,socfpga-fpga2sdram-bridge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Altera FPGA To SDRAM Bridge
10 - Xu Yilun <yilun.xu@intel.com>
13 - $ref: fpga-bridge.yaml#
17 const: altr,socfpga-fpga2sdram-bridge
23 - compatible
28 - |
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/ata/ |
| H A D | cortina,gemini-sata-bridge.txt | 1 * Cortina Systems Gemini SATA Bridge
3 The Gemini SATA bridge in a SoC-internal PATA to SATA bridge that
8 - compatible: should be
9 "cortina,gemini-sata-bridge"
10 - reg: registers and size for the block
11 - resets: phandles to the reset lines for both SATA bridges
12 - reset-names: must be "sata0", "sata1"
13 - clocks: phandles to the compulsory peripheral clocks
14 - clock-names: must be "SATA0_PCLK", "SATA1_PCLK"
15 - syscon: a phandle to the global Gemini system controller
[all …]
|
| H A D | cortina,gemini-sata-bridge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/cortina,gemini-sata-bridge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cortina Systems Gemini SATA Bridge
10 - Linus Walleij <linus.walleij@linaro.org>
13 The Gemini SATA bridge in a SoC-internal PATA to SATA bridge that
19 const: cortina,gemini-sata-bridge
28 reset-names:
30 - const: sata0
[all …]
|
| /freebsd-src/share/man/man4/ |
| H A D | bridge.4 | 1 .\" $NetBSD: bridge.4,v 1.5 2004/01/31 20:14:11 jdc Exp $
41 .Nd network bridge device
46 .Bd -ragged -offset indent
53 .Bd -literal -offset indent
64 For example, it is possible to bridge Ethernet and 802.11 networks together,
65 but it is not possible to bridge Ethernet and Token Ring together.
96 .Va net.link.bridge.inherit_mac
97 has a non-zero value, the newly created bridge will inherit the MAC
98 address from its first member instead of choosing a random link-level
100 This will provide more predictable bridge MAC addresses without any
[all …]
|
| H A D | pcm.4 | 2 .\" Copyright (c) 2009-2011 Joel Dahl <joel@FreeBSD.org>
39 .Bd -ragged -offset indent
48 It works in conjunction with a bridge device driver on supported devices
50 Each bridge device driver supports a specific set of audio chipsets and
60 driver are: multichannel audio, per-application
67 driver is enabled by default, along with several bridge device drivers.
72 The following bridge device drivers are available:
74 .Bl -bullet -compact
118 .Xr snd_uaudio 4 (auto-loaded on device plug)
127 Refer to the manual page for each bridge device driver for driver specific
[all …]
|
| /freebsd-src/contrib/wpa/src/ap/ |
| H A D | x_snoop.c | 20 struct hostapd_bss_config *conf = hapd->conf; in x_snoop_init()
22 if (!conf->isolate) { in x_snoop_init()
25 return -1; in x_snoop_init()
28 if (conf->bridge[0] == '\0') { in x_snoop_init()
30 "x_snoop: Bridge must be configured for x_snoop"); in x_snoop_init()
31 return -1; in x_snoop_init()
34 hapd->x_snoop_initialized = true; in x_snoop_init()
39 "x_snoop: Failed to enable hairpin_mode on the bridge por in x_snoop_init()
[all...] |
| /freebsd-src/usr.sbin/bsnmpd/modules/snmp_bridge/ |
| H A D | bridge_sys.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
28 * Bridge MIB implementation for SNMPd.
29 * Bridge OS specific ioctls.
63 int sock = -1;
70 return (-1); in bridge_ioctl_init()
101 /* Not present - load it. */ in bridge_kmod_load()
104 return (-1); in bridge_kmod_load()
111 * Bridge interfaces.
115 * Convert the kernel uint64_t value for a bridge id
[all …]
|
| H A D | bridge_snmp.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
28 * Bridge MIB implementation for SNMPd.
82 * Bridge Addresses Table.
85 uint32_t sysindex; /* The bridge if sysindex. */
94 * Bridge ports.
95 * The bridge port system interface index is used for a
101 uint32_t sysindex; /* The bridge interface sysindex. */
102 int32_t port_no; /* The bridge member system index. */
104 int8_t span_enable; /* Span flag set - private MIB. */
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/display/bridge/ |
| H A D | simple-bridge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/simple-bridge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Transparent non-programmable DRM bridges
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11 - Maxime Ripard <mripard@kernel.org>
14 This binding supports transparent non-programmable bridges that don't require
20 - items:
21 - enum:
[all …]
|
| H A D | chipone,icn6211.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/chipone,icn6211.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Chipone ICN6211 MIPI-DSI to RGB Converter bridge
10 - Jagan Teki <jagan@amarulasolutions.com>
13 ICN6211 is MIPI-DSI to RGB Converter bridge from chipone.
21 - chipone,icn6211
27 clock-names:
36 enable-gpios:
[all …]
|
| H A D | ti,sn65dsi86.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/t
[all...] |
| H A D | ti,dlpc3433.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/ti,dlpc3433.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI DLPC3433 MIPI DSI to DMD bridge
10 - Jagan Teki <jagan@amarulasolutions.com>
11 - Christopher Vollo <chris@renewoutreach.org>
14 TI DLPC3433 is a MIPI DSI based display controller bridge
30 - 0x1b
31 - 0x1d
[all …]
|
| H A D | ti,sn65dsi83.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/ti,sn65dsi83.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SN65DSI83 and SN65DSI84 DSI to LVDS bridge chip
10 - Marek Vasut <marex@denx.de>
13 Texas Instruments SN65DSI83 1x Single-link MIPI DSI
14 to 1x Single-link LVDS
16 Texas Instruments SN65DSI84 1x Single-link MIPI DSI
17 to 1x Dual-link or 2x Single-link LVDS
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/perf/ |
| H A D | apm-xgene-pmu.txt | 1 * APM X-Gene SoC PMU bindings
3 This is APM X-Gene SoC PMU (Performance Monitoring Unit) module.
6 L3C - L3 cache controller
7 IOB - IO bridge
8 MCB - Memory controller bridge
9 MC - Memory controller
14 - compatible : Shall be "apm,xgene-pmu" for revision 1 or
15 "apm,xgene-pmu-v2" for revision 2.
16 - regmap-csw : Regmap of the CPU switch fabric (CSW) resource.
17 - regmap-mcba : Regmap of the MCB-A (memory bridge) resource.
[all …]
|
| /freebsd-src/sys/arm/altera/socfpga/ |
| H A D | socfpga_rstmgr.c | |
| /freebsd-src/sys/dev/agp/ |
| H A D | agp_sis.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
66 return ("SiS 5591 host to AGP bridge"); in agp_sis_match()
68 return ("SiS 530 host to AGP bridge"); in agp_sis_match()
70 return ("SiS 540 host to AGP bridge"); in agp_sis_match()
72 return ("SiS 550 host to AGP bridge"); in agp_sis_match()
74 return ("SiS 620 host to AGP bridge"); in agp_sis_match()
76 return ("SiS 630 host to AGP bridge"); in agp_sis_match()
78 return ("SiS 645 host to AGP bridge"); in agp_sis_match()
80 return ("SiS 645DX host to AGP bridge"); in agp_sis_match()
[all …]
|
| /freebsd-src/sys/dev/bhnd/bhndb/ |
| H A D | bhndb_if.m | 1 #-
2 # Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
40 # bhndb bridge device interface.
122 * @param child The bhndb-attached device.
130 * Populate @p info with board info known only to the bridge,
134 * @param child The bhndb-attached device.
149 * may otherwise be non-functional; this method allows the parent device
163 * Get the host bridge core info for the attached bhnd bus.
165 * @param dev The bridge device.
167 * @param[out] core Will be populated with the host bridge core info, if
[all …]
|