1*c66ec88fSEmmanuel VadotAltera FPGA/HPS Bridge Driver 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot- regs : base address and size for AXI bridge module 5*c66ec88fSEmmanuel Vadot- compatible : Should contain one of: 6*c66ec88fSEmmanuel Vadot "altr,socfpga-lwhps2fpga-bridge", 7*c66ec88fSEmmanuel Vadot "altr,socfpga-hps2fpga-bridge", or 8*c66ec88fSEmmanuel Vadot "altr,socfpga-fpga2hps-bridge" 9*c66ec88fSEmmanuel Vadot- resets : Phandle and reset specifier for this bridge's reset 10*c66ec88fSEmmanuel Vadot- clocks : Clocks used by this module. 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel VadotSee Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings. 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel VadotExample: 15*c66ec88fSEmmanuel Vadot fpga_bridge0: fpga-bridge@ff400000 { 16*c66ec88fSEmmanuel Vadot compatible = "altr,socfpga-lwhps2fpga-bridge"; 17*c66ec88fSEmmanuel Vadot reg = <0xff400000 0x100000>; 18*c66ec88fSEmmanuel Vadot resets = <&rst LWHPS2FPGA_RESET>; 19*c66ec88fSEmmanuel Vadot clocks = <&l4_main_clk>; 20*c66ec88fSEmmanuel Vadot bridge-enable = <0>; 21*c66ec88fSEmmanuel Vadot }; 22*c66ec88fSEmmanuel Vadot 23*c66ec88fSEmmanuel Vadot fpga_bridge1: fpga-bridge@ff500000 { 24*c66ec88fSEmmanuel Vadot compatible = "altr,socfpga-hps2fpga-bridge"; 25*c66ec88fSEmmanuel Vadot reg = <0xff500000 0x10000>; 26*c66ec88fSEmmanuel Vadot resets = <&rst HPS2FPGA_RESET>; 27*c66ec88fSEmmanuel Vadot clocks = <&l4_main_clk>; 28*c66ec88fSEmmanuel Vadot bridge-enable = <1>; 29*c66ec88fSEmmanuel Vadot }; 30*c66ec88fSEmmanuel Vadot 31*c66ec88fSEmmanuel Vadot fpga_bridge2: fpga-bridge@ff600000 { 32*c66ec88fSEmmanuel Vadot compatible = "altr,socfpga-fpga2hps-bridge"; 33*c66ec88fSEmmanuel Vadot reg = <0xff600000 0x100000>; 34*c66ec88fSEmmanuel Vadot resets = <&rst FPGA2HPS_RESET>; 35*c66ec88fSEmmanuel Vadot clocks = <&l4_main_clk>; 36*c66ec88fSEmmanuel Vadot }; 37