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/llvm-project/llvm/test/Transforms/InstSimplify/
H A Dabs_intrinsic.ll4 declare i1 @llvm.abs.i1(i1, i1)
5 declare i8 @llvm.abs.i8(i8, i1)
6 declare i32 @llvm.abs.i32(i32, i1)
7 declare <3 x i82> @llvm.abs.v3i82(<3 x i82>, i1)
8 declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1)
12 ; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
15 %a = call i32 @llvm.abs.i32(i32 %x, i1 false)
16 %b = call i32 @llvm.abs.i32(i32 %a, i1 false)
22 ; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
25 %a = call i32 @llvm.abs
[all...]
H A Dselect-abs.ll4 declare <4 x i16> @llvm.abs.v4i16(<4 x i16>, i1 immarg)
5 declare i32 @llvm.abs.i32(i32, i1 immarg)
6 declare i64 @llvm.abs.i64(i64, i1 immarg)
8 ; check (a == 0) ? 0 : abs(a)
13 ; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[A:%.*]], i1 false)
14 ; CHECK-NEXT: ret i32 [[ABS]]
18 %abs = tail call i32 @llvm.abs.i32(i32 %a, i1 false)
19 %res = select i1 %cond, i32 0, i32 %abs
[all...]
/llvm-project/llvm/test/Transforms/ConstraintElimination/
H A Dabs.ll7 ; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 false)
10 %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 false)
11 %cmp = icmp sge i32 %abs, %arg
18 ; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
21 %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
22 %cmp = icmp sge i32 %abs, %arg
29 ; CHECK-NEXT: [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
30 ; CHECK-NEXT: [[ABS_PLUS_ONE:%.*]] = add nsw i32 [[ABS]], 1
33 %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
34 %abs_plus_one = add nsw i32 %abs, 1
[all …]
/llvm-project/llvm/test/Analysis/CostModel/RISCV/
H A Dabs.ll6 declare <2 x i64> @llvm.abs.v2i64(<2 x i64>, i1)
7 declare <4 x i64> @llvm.abs.v4i64(<4 x i64>, i1)
8 declare <8 x i64> @llvm.abs.v8i64(<8 x i64>, i1)
9 declare <vscale x 2 x i64> @llvm.abs.nxv2i64(<vscale x 2 x i64>, i1)
10 declare <vscale x 4 x i64> @llvm.abs.nxv4i64(<vscale x 4 x i64>, i1)
11 declare <vscale x 8 x i64> @llvm.abs.nxv8i64(<vscale x 8 x i64>, i1)
13 declare <2 x i32> @llvm.abs.v2i32(<2 x i32>, i1)
14 declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1)
15 declare <8 x i32> @llvm.abs.v8i32(<8 x i32>, i1)
16 declare <16 x i32> @llvm.abs
[all...]
/llvm-project/llvm/test/Transforms/InstCombine/
H A Dicmp-abs.ll4 declare i4 @llvm.abs.i4(i4, i1)
10 %abs = call i4 @llvm.abs.i4(i4 %arg, i1 true)
11 %cmp = icmp sge i4 %abs, %arg
19 %abs = call i4 @llvm.abs.i4(i4 %arg, i1 false)
20 %cmp = icmp sge i4 %abs, %arg
29 %abs = call i4 @llvm.abs.i4(i4 %arg, i1 true)
30 %cmp = icmp eq i4 %abs, %arg
39 %abs = call i4 @llvm.abs.i4(i4 %arg, i1 false)
40 %cmp = icmp eq i4 %abs, %arg
49 %abs = call i4 @llvm.abs.i4(i4 %arg, i1 true)
[all …]
H A Dabs-intrinsic.ll4 declare i8 @llvm.abs.i8(i8, i1)
5 declare i32 @llvm.abs.i32(i32, i1)
6 declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1)
7 declare <3 x i82> @llvm.abs.v3i82(<3 x i82>, i1)
8 declare <2 x i8> @llvm.abs.v2i8(<2 x i8>, i1)
15 ; CHECK-NEXT: [[ABS2:%.*]] = call i8 @llvm.abs.i8(i8 [[TMP1]], i1 true)
18 %abs1 = call i8 @llvm.abs.i8(i8 %a, i1 true)
20 %abs2 = call i8 @llvm.abs.i8(i8 %mul, i1 true)
28 ; CHECK-NEXT: [[ABS2:%.*]] = call i8 @llvm.abs.i8(i8 [[TMP1]], i1 true)
32 %abs1 = call i8 @llvm.abs
[all...]
H A Dabs-1.ll6 declare i32 @abs(i32)
10 ; Test that the abs library call simplifier works correctly.
11 ; abs(x) -> x <s 0 ? -x : x.
15 ; CHECK-NEXT: [[RET:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
18 %ret = call i32 @abs(i32 %x)
24 ; CHECK-NEXT: [[RET:%.*]] = call i64 @llvm.abs.i64(i64 [[X:%.*]], i1 true)
33 ; CHECK-NEXT: [[RET:%.*]] = call i64 @llvm.abs.i64(i64 [[X:%.*]], i1 true)
40 ; We have a canonical form of abs to make CSE easier.
44 ; CHECK-NEXT: [[ABS:%.*]] = call i8 @llvm.abs
[all...]
/llvm-project/llvm/test/CodeGen/NVPTX/
H A Dmath-intrins-sm86-ptx72-autoupgrade.ll7 ; CHECK: min.xorsign.abs.f16
8 %res = call half @llvm.nvvm.fmin.xorsign.abs.f16(half %0, half %1)
15 ; CHECK: min.ftz.xorsign.abs.f16
16 %res = call half @llvm.nvvm.fmin.ftz.xorsign.abs.f16(half %0, half %1)
23 ; CHECK: min.NaN.xorsign.abs.f16
24 %res = call half @llvm.nvvm.fmin.nan.xorsign.abs.f16(half %0, half %1)
31 ; CHECK: min.ftz.NaN.xorsign.abs.f16
32 %res = call half @llvm.nvvm.fmin.ftz.nan.xorsign.abs.f16(half %0, half %1)
39 ; CHECK: min.xorsign.abs.f16x2
40 %res = call <2 x half> @llvm.nvvm.fmin.xorsign.abs
[all...]
H A Dmath-intrins-sm86-ptx72.ll4 declare half @llvm.nvvm.fmin.xorsign.abs.f16(half, half)
5 declare half @llvm.nvvm.fmin.ftz.xorsign.abs.f16(half, half)
6 declare half @llvm.nvvm.fmin.nan.xorsign.abs.f16(half, half)
7 declare half @llvm.nvvm.fmin.ftz.nan.xorsign.abs.f16(half, half)
8 declare <2 x half> @llvm.nvvm.fmin.xorsign.abs.f16x2(<2 x half> , <2 x half>)
9 declare <2 x half> @llvm.nvvm.fmin.ftz.xorsign.abs.f16x2(<2 x half> , <2 x half>)
10 declare <2 x half> @llvm.nvvm.fmin.nan.xorsign.abs.f16x2(<2 x half> , <2 x half>)
11 declare <2 x half> @llvm.nvvm.fmin.ftz.nan.xorsign.abs.f16x2(<2 x half> , <2 x half>)
12 declare bfloat @llvm.nvvm.fmin.xorsign.abs.bf16(bfloat, bfloat)
13 declare bfloat @llvm.nvvm.fmin.nan.xorsign.abs
[all...]
/llvm-project/llvm/test/Analysis/CostModel/ARM/
H A Dmve-abs.ll7 declare i64 @llvm.abs.i64(i64, i1)
8 declare <2 x i64> @llvm.abs.v2i64(<2 x i64>, i1)
9 declare <4 x i64> @llvm.abs.v4i64(<4 x i64>, i1)
10 declare <8 x i64> @llvm.abs.v8i64(<8 x i64>, i1)
12 declare i32 @llvm.abs.i32(i32, i1)
13 declare <2 x i32> @llvm.abs.v2i32(<2 x i32>, i1)
14 declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1)
15 declare <8 x i32> @llvm.abs.v8i32(<8 x i32>, i1)
16 declare <16 x i32> @llvm.abs.v16i32(<16 x i32>, i1)
18 declare i16 @llvm.abs.i16(i16, i1)
[all …]
/llvm-project/llvm/test/Analysis/CostModel/X86/
H A Dabs-latency.ll12 ; abs(X, not_posion)
17 ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %I64 = call i64 @llvm.abs.i…
18 …ound an estimated cost of 6 for instruction: %V2I64 = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %a1…
19 …und an estimated cost of 12 for instruction: %V4I64 = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %a2…
20 …und an estimated cost of 24 for instruction: %V8I64 = call <8 x i64> @llvm.abs.v8i64(<8 x i64> %a5…
24 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %I64 = call i64 @llvm.abs.…
25 …ound an estimated cost of 6 for instruction: %V2I64 = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %a1…
26 …und an estimated cost of 12 for instruction: %V4I64 = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %a2…
27 …und an estimated cost of 24 for instruction: %V8I64 = call <8 x i64> @llvm.abs.v8i64(<8 x i64> %a5…
31 ; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %I64 = call i64 @llvm.abs.…
[all …]
H A Dabs-codesize.ll12 ; abs(X, not_posion)
17 ; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %I64 = call i64 @llvm.abs.i…
18 …ound an estimated cost of 5 for instruction: %V2I64 = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %a1…
19 …und an estimated cost of 10 for instruction: %V4I64 = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %a2…
20 …und an estimated cost of 20 for instruction: %V8I64 = call <8 x i64> @llvm.abs.v8i64(<8 x i64> %a5…
24 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %I64 = call i64 @llvm.abs.…
25 …ound an estimated cost of 5 for instruction: %V2I64 = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %a1…
26 …und an estimated cost of 10 for instruction: %V4I64 = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %a2…
27 …und an estimated cost of 20 for instruction: %V8I64 = call <8 x i64> @llvm.abs.v8i64(<8 x i64> %a5…
31 ; SSE42-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %I64 = call i64 @llvm.abs.…
[all …]
H A Dabs.ll12 ; abs(X, not_posion)
17 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = call i64 @llvm.abs.i6…
18 …ound an estimated cost of 3 for instruction: %V2I64 = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %a1…
19 …ound an estimated cost of 6 for instruction: %V4I64 = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %a2…
20 …und an estimated cost of 12 for instruction: %V8I64 = call <8 x i64> @llvm.abs.v8i64(<8 x i64> %a5…
24 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = call i64 @llvm.abs.i…
25 …ound an estimated cost of 3 for instruction: %V2I64 = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %a1…
26 …ound an estimated cost of 6 for instruction: %V4I64 = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %a2…
27 …und an estimated cost of 12 for instruction: %V8I64 = call <8 x i64> @llvm.abs.v8i64(<8 x i64> %a5…
31 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = call i64 @llvm.abs.i…
[all …]
H A Dabs-sizelatency.ll12 ; abs(X, not_posion)
17 ; SSE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %I64 = call i64 @llvm.abs.i6…
18 …ound an estimated cost of 5 for instruction: %V2I64 = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %a1…
19 …und an estimated cost of 10 for instruction: %V4I64 = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %a2…
20 …und an estimated cost of 20 for instruction: %V8I64 = call <8 x i64> @llvm.abs.v8i64(<8 x i64> %a5…
24 ; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %I64 = call i64 @llvm.abs.i…
25 …ound an estimated cost of 5 for instruction: %V2I64 = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %a1…
26 …und an estimated cost of 12 for instruction: %V4I64 = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %a2…
27 …und an estimated cost of 24 for instruction: %V8I64 = call <8 x i64> @llvm.abs.v8i64(<8 x i64> %a5…
31 ; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %I64 = call i64 @llvm.abs.i…
[all …]
/llvm-project/flang/test/Semantics/
H A Dgeneric01.f906 public abs
7 interface abs interface
22 public abs
23 interface abs interface
34 use m1, only: abs
38 use m2, only: abs
40 print *, abs(1)
42 print *, abs(1.)
44 print *, abs((1,1))
46 print *, abs()
[all …]
/llvm-project/llvm/test/Analysis/CostModel/AArch64/
H A Dabs.ll7 declare <2 x i64> @llvm.abs.v2i64(<2 x i64>, i1)
8 declare <4 x i64> @llvm.abs.v4i64(<4 x i64>, i1)
9 declare <8 x i64> @llvm.abs.v8i64(<8 x i64>, i1)
11 declare <2 x i32> @llvm.abs.v2i32(<2 x i32>, i1)
12 declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1)
13 declare <8 x i32> @llvm.abs.v8i32(<8 x i32>, i1)
14 declare <16 x i32> @llvm.abs.v16i32(<16 x i32>, i1)
16 declare <2 x i16> @llvm.abs.v2i16(<2 x i16>, i1)
17 declare <4 x i16> @llvm.abs.v4i16(<4 x i16>, i1)
18 declare <8 x i16> @llvm.abs.v8i16(<8 x i16>, i1)
[all …]
/llvm-project/clang/test/CodeGenHLSL/builtins/
H A Dabs.hlsl8 using hlsl::abs;
12 // NATIVE_HALF: call i16 @llvm.abs.i16(
13 int16_t test_abs_int16_t(int16_t p0) { return abs(p0); }
15 // NATIVE_HALF: call <2 x i16> @llvm.abs.v2i16(
16 int16_t2 test_abs_int16_t2(int16_t2 p0) { return abs(p0); }
18 // NATIVE_HALF: call <3 x i16> @llvm.abs.v3i16(
19 int16_t3 test_abs_int16_t3(int16_t3 p0) { return abs(p0); }
21 // NATIVE_HALF: call <4 x i16> @llvm.abs.v4i16(
22 int16_t4 test_abs_int16_t4(int16_t4 p0) { return abs(p0); }
29 half test_abs_half(half p0) { return abs(p
[all...]
/llvm-project/llvm/test/MC/AMDGPU/
H A Dmcexpr_amd.s6 // OBJDUMP-NEXT: 0000000000000000 l *ABS* 0000000000000000 zero
7 // OBJDUMP-NEXT: 0000000000000001 l *ABS* 0000000000000000 one
8 // OBJDUMP-NEXT: 0000000000000002 l *ABS* 0000000000000000 two
9 // OBJDUMP-NEXT: 0000000000000003 l *ABS* 0000000000000000 three
10 // OBJDUMP-NEXT: 7fffffffffffffff l *ABS* 0000000000000000 i64_max
11 // OBJDUMP-NEXT: 8000000000000000 l *ABS* 0000000000000000 i64_min
12 // OBJDUMP-NEXT: 0000000000000005 l *ABS* 0000000000000000 max_expression_all
13 // OBJDUMP-NEXT: 0000000000000005 l *ABS* 0000000000000000 five
14 // OBJDUMP-NEXT: 0000000000000004 l *ABS* 0000000000000000 four
15 // OBJDUMP-NEXT: 0000000000000002 l *ABS* 0000000000000000 max_expression_two
[all …]
/llvm-project/llvm/test/CodeGen/PowerPC/
H A Dneg-abs.ll6 declare i64 @llvm.abs.i64(i64, i1 immarg)
7 declare <2 x i64> @llvm.abs.v2i64(<2 x i64>, i1)
8 declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1)
9 declare <8 x i16> @llvm.abs.v8i16(<8 x i16>, i1)
10 declare <16 x i8> @llvm.abs.v16i8(<16 x i8>, i1)
19 %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)
20 %neg = sub nsw i64 0, %abs
31 %abs = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %0, i1 true)
32 %neg.abs = sub <2 x i64> zeroinitializer, %abs
33 ret <2 x i64> %neg.abs
[all …]
/llvm-project/clang/test/SemaCXX/
H A Dwarn-absolute-value.cpp5 int abs(int);
21 int abs(int);
22 long int abs(long int);
23 long long int abs(long long int);
26 float abs(float);
27 double abs(double);
28 long double abs(long double);
31 double abs(T);
36 (void)std::abs(x); in test_int()
38 (void)abs(x); in test_int()
[all …]
H A Dwarn-absolute-value-header.cpp5 int abs(int);
10 int abs(int);
11 float abs(float);
16 (void)abs(d); in test()
17 …// expected-warning@-1{{using integer absolute value function 'abs' when argument is of floating p… in test()
18 // expected-note@-2{{use function 'std::abs' instead}} in test()
19 …// expected-note@-3{{include the header <cmath> or explicitly provide a declaration for 'std::abs'… in test()
20 // CHECK: fix-it:"{{.*}}":{[[@LINE-4]]:9-[[@LINE-4]]:12}:"std::abs" in test()
24 // expected-note@-2{{use function 'std::abs' instead}} in test()
25 …// expected-note@-3{{include the header <cmath> or explicitly provide a declaration for 'std::abs'… in test()
[all …]
/llvm-project/llvm/test/CodeGen/AArch64/
H A Dabs.ll22 %res = call i8 @llvm.abs.i8(i8 %a, i1 0)
25 declare i8 @llvm.abs.i8(i8, i1)
42 %res = call i16 @llvm.abs.i16(i16 %a, i1 0)
45 declare i16 @llvm.abs.i16(i16, i1)
60 %res = call i32 @llvm.abs.i32(i32 %a, i1 0)
63 declare i32 @llvm.abs.i32(i32, i1)
78 %res = call i64 @llvm.abs.i64(i64 %a, i1 0)
81 declare i64 @llvm.abs.i64(i64, i1)
102 %res = call i128 @llvm.abs.i128(i128 %a, i1 0)
105 declare i128 @llvm.abs
[all...]
H A Dneg-abs.ll5 declare i64 @llvm.abs.i64(i64, i1 immarg)
13 %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)
14 %neg = sub nsw i64 0, %abs
18 declare i32 @llvm.abs.i32(i32, i1 immarg)
26 %abs = tail call i32 @llvm.abs.i32(i32 %x, i1 true)
27 %neg = sub nsw i32 0, %abs
31 declare i16 @llvm.abs.i16(i16, i1 immarg)
40 %abs = tail call i16 @llvm.abs.i16(i16 %x, i1 true)
41 %neg = sub nsw i16 0, %abs
46 declare i128 @llvm.abs.i128(i128, i1 immarg)
[all …]
H A Dneon-abd.ll18 %abs = call <8 x i16> @llvm.abs.v8i16(<8 x i16> %sub, i1 true)
19 %trunc = trunc <8 x i16> %abs to <8 x i8>
31 %abs = call <16 x i16> @llvm.abs.v16i16(<16 x i16> %sub, i1 true)
32 %trunc = trunc <16 x i16> %abs to <16 x i8>
44 %abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %sub, i1 true)
45 %trunc = trunc <4 x i32> %abs to <4 x i16>
61 %abs
[all...]
/llvm-project/llvm/test/Analysis/ValueTracking/
H A Dknownbits-abs.ll3 declare i8 @llvm.abs.i8(i8, i1)
11 %abs = call i8 @llvm.abs.i8(i8 %v, i1 true)
12 %and = and i8 %abs, 4
20 ; CHECK-NEXT: [[ABS:%.*]] = call i8 @llvm.abs.i8(i8 [[V]], i1 true)
21 ; CHECK-NEXT: [[AND:%.*]] = and i8 [[ABS]], 2
26 %abs = call i8 @llvm.abs.i8(i8 %v, i1 true)
27 %and = and i8 %abs, 2
38 %abs = call i8 @llvm.abs.i8(i8 %v, i1 true)
39 %and = and i8 %abs, 8
49 %abs = call i8 @llvm.abs.i8(i8 %v, i1 true)
[all …]

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