xref: /llvm-project/llvm/test/Analysis/CostModel/RISCV/abs.ll (revision db140104054d5af588e26c36ad5faadbb599de1e) 
1; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -S -mtriple=riscv64 -mattr=+v | FileCheck %s
3; Check that we don't crash querying costs when vectors are not enabled.
4; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=riscv64
5
6declare <2 x i64>  @llvm.abs.v2i64(<2 x i64>, i1)
7declare <4 x i64>  @llvm.abs.v4i64(<4 x i64>, i1)
8declare <8 x i64>  @llvm.abs.v8i64(<8 x i64>, i1)
9declare <vscale x 2 x i64> @llvm.abs.nxv2i64(<vscale x 2 x i64>, i1)
10declare <vscale x 4 x i64> @llvm.abs.nxv4i64(<vscale x 4 x i64>, i1)
11declare <vscale x 8 x i64> @llvm.abs.nxv8i64(<vscale x 8 x i64>, i1)
12
13declare <2 x i32>  @llvm.abs.v2i32(<2 x i32>, i1)
14declare <4 x i32>  @llvm.abs.v4i32(<4 x i32>, i1)
15declare <8 x i32>  @llvm.abs.v8i32(<8 x i32>, i1)
16declare <16 x i32> @llvm.abs.v16i32(<16 x i32>, i1)
17declare <vscale x 2 x i32>  @llvm.abs.nxv2i32(<vscale x 2 x i32>, i1)
18declare <vscale x 4 x i32>  @llvm.abs.nxv4i32(<vscale x 4 x i32>, i1)
19declare <vscale x 8 x i32>  @llvm.abs.nxv8i32(<vscale x 8 x i32>, i1)
20declare <vscale x 16 x i32> @llvm.abs.nxv16i32(<vscale x 16 x i32>, i1)
21
22declare <2 x i16>  @llvm.abs.v2i16(<2 x i16>, i1)
23declare <4 x i16>  @llvm.abs.v4i16(<4 x i16>, i1)
24declare <8 x i16>  @llvm.abs.v8i16(<8 x i16>, i1)
25declare <16 x i16> @llvm.abs.v16i16(<16 x i16>, i1)
26declare <32 x i16> @llvm.abs.v32i16(<32 x i16>, i1)
27declare <vscale x 2 x i16>  @llvm.abs.nxv2i16(<vscale x 2 x i16>, i1)
28declare <vscale x 4 x i16>  @llvm.abs.nxv4i16(<vscale x 4 x i16>, i1)
29declare <vscale x 8 x i16>  @llvm.abs.nxv8i16(<vscale x 8 x i16>, i1)
30declare <vscale x 16 x i16> @llvm.abs.nxv16i16(<vscale x 16 x i16>, i1)
31declare <vscale x 32 x i16> @llvm.abs.nxv32i16(<vscale x 32 x i16>, i1)
32
33declare <2 x i8>   @llvm.abs.v2i8(<2 x i8>, i1)
34declare <4 x i8>   @llvm.abs.v4i8(<4 x i8>, i1)
35declare <8 x i8>   @llvm.abs.v8i8(<8 x i8>, i1)
36declare <16 x i8>  @llvm.abs.v16i8(<16 x i8>, i1)
37declare <32 x i8>  @llvm.abs.v32i8(<32 x i8>, i1)
38declare <64 x i8>  @llvm.abs.v64i8(<64 x i8>, i1)
39declare <vscale x 8 x i8>  @llvm.abs.nxv8i8(<vscale x 8 x i8>, i1)
40declare <vscale x 16 x i8> @llvm.abs.nxv16i8(<vscale x 16 x i8>, i1)
41declare <vscale x 32 x i8> @llvm.abs.nxv32i8(<vscale x 32 x i8>, i1)
42declare <vscale x 64 x i8> @llvm.abs.nxv64i8(<vscale x 64 x i8>, i1)
43
44define i32 @abs(i32 %arg) {
45; CHECK-LABEL: 'abs'
46; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %1 = call <2 x i64> @llvm.abs.v2i64(<2 x i64> undef, i1 false)
47; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %2 = call <4 x i64> @llvm.abs.v4i64(<4 x i64> undef, i1 false)
48; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %3 = call <8 x i64> @llvm.abs.v8i64(<8 x i64> undef, i1 false)
49; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %4 = call <vscale x 2 x i64> @llvm.abs.nxv2i64(<vscale x 2 x i64> undef, i1 false)
50; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %5 = call <vscale x 4 x i64> @llvm.abs.nxv4i64(<vscale x 4 x i64> undef, i1 false)
51; CHECK-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %6 = call <vscale x 8 x i64> @llvm.abs.nxv8i64(<vscale x 8 x i64> undef, i1 false)
52; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %7 = call <2 x i32> @llvm.abs.v2i32(<2 x i32> undef, i1 false)
53; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %8 = call <4 x i32> @llvm.abs.v4i32(<4 x i32> undef, i1 false)
54; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %9 = call <8 x i32> @llvm.abs.v8i32(<8 x i32> undef, i1 false)
55; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %10 = call <16 x i32> @llvm.abs.v16i32(<16 x i32> undef, i1 false)
56; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %11 = call <vscale x 2 x i32> @llvm.abs.nxv2i32(<vscale x 2 x i32> undef, i1 false)
57; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %12 = call <vscale x 4 x i32> @llvm.abs.nxv4i32(<vscale x 4 x i32> undef, i1 false)
58; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %13 = call <vscale x 8 x i32> @llvm.abs.nxv8i32(<vscale x 8 x i32> undef, i1 false)
59; CHECK-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %14 = call <vscale x 16 x i32> @llvm.abs.nxv16i32(<vscale x 16 x i32> undef, i1 false)
60; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %15 = call <2 x i16> @llvm.abs.v2i16(<2 x i16> undef, i1 false)
61; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %16 = call <4 x i16> @llvm.abs.v4i16(<4 x i16> undef, i1 false)
62; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %17 = call <8 x i16> @llvm.abs.v8i16(<8 x i16> undef, i1 false)
63; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %18 = call <16 x i16> @llvm.abs.v16i16(<16 x i16> undef, i1 false)
64; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %19 = call <32 x i16> @llvm.abs.v32i16(<32 x i16> undef, i1 false)
65; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %20 = call <vscale x 2 x i16> @llvm.abs.nxv2i16(<vscale x 2 x i16> undef, i1 false)
66; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %21 = call <vscale x 4 x i16> @llvm.abs.nxv4i16(<vscale x 4 x i16> undef, i1 false)
67; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %22 = call <vscale x 8 x i16> @llvm.abs.nxv8i16(<vscale x 8 x i16> undef, i1 false)
68; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %23 = call <vscale x 16 x i16> @llvm.abs.nxv16i16(<vscale x 16 x i16> undef, i1 false)
69; CHECK-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %24 = call <vscale x 32 x i16> @llvm.abs.nxv32i16(<vscale x 32 x i16> undef, i1 false)
70; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %25 = call <8 x i8> @llvm.abs.v8i8(<8 x i8> undef, i1 false)
71; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %26 = call <16 x i8> @llvm.abs.v16i8(<16 x i8> undef, i1 false)
72; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %27 = call <32 x i8> @llvm.abs.v32i8(<32 x i8> undef, i1 false)
73; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %28 = call <64 x i8> @llvm.abs.v64i8(<64 x i8> undef, i1 false)
74; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %29 = call <vscale x 8 x i8> @llvm.abs.nxv8i8(<vscale x 8 x i8> undef, i1 false)
75; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %30 = call <vscale x 16 x i8> @llvm.abs.nxv16i8(<vscale x 16 x i8> undef, i1 false)
76; CHECK-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %31 = call <vscale x 32 x i8> @llvm.abs.nxv32i8(<vscale x 32 x i8> undef, i1 false)
77; CHECK-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %32 = call <vscale x 64 x i8> @llvm.abs.nxv64i8(<vscale x 64 x i8> undef, i1 false)
78; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
79;
80  call <2 x i64> @llvm.abs.v2i64(<2 x i64> undef, i1 false)
81  call <4 x i64> @llvm.abs.v4i64(<4 x i64> undef, i1 false)
82  call <8 x i64> @llvm.abs.v8i64(<8 x i64> undef, i1 false)
83  call <vscale x 2 x i64> @llvm.abs.nxv2i64(<vscale x 2 x i64> undef, i1 false)
84  call <vscale x 4 x i64> @llvm.abs.nxv4i64(<vscale x 4 x i64> undef, i1 false)
85  call <vscale x 8 x i64> @llvm.abs.nxv8i64(<vscale x 8 x i64> undef, i1 false)
86
87  call <2 x i32>  @llvm.abs.v2i32(<2 x i32> undef, i1 false)
88  call <4 x i32>  @llvm.abs.v4i32(<4 x i32> undef, i1 false)
89  call <8 x i32>  @llvm.abs.v8i32(<8 x i32> undef, i1 false)
90  call <16 x i32> @llvm.abs.v16i32(<16 x i32> undef, i1 false)
91  call <vscale x 2 x i32>  @llvm.abs.nxv2i32(<vscale x 2 x i32> undef, i1 false)
92  call <vscale x 4 x i32>  @llvm.abs.nxv4i32(<vscale x 4 x i32> undef, i1 false)
93  call <vscale x 8 x i32>  @llvm.abs.nxv8i32(<vscale x 8 x i32> undef, i1 false)
94  call <vscale x 16 x i32> @llvm.abs.nxv16i32(<vscale x 16 x i32> undef, i1 false)
95
96  call <2 x i16>  @llvm.abs.v2i16(<2 x i16> undef, i1 false)
97  call <4 x i16>  @llvm.abs.v4i16(<4 x i16> undef, i1 false)
98  call <8 x i16>  @llvm.abs.v8i16(<8 x i16> undef, i1 false)
99  call <16 x i16> @llvm.abs.v16i16(<16 x i16> undef, i1 false)
100  call <32 x i16> @llvm.abs.v32i16(<32 x i16> undef, i1 false)
101  call <vscale x 2 x i16>  @llvm.abs.nxv2i16(<vscale x 2 x i16> undef, i1 false)
102  call <vscale x 4 x i16>  @llvm.abs.nxv4i16(<vscale x 4 x i16> undef, i1 false)
103  call <vscale x 8 x i16>  @llvm.abs.nxv8i16(<vscale x 8 x i16> undef, i1 false)
104  call <vscale x 16 x i16> @llvm.abs.nxv16i16(<vscale x 16 x i16> undef, i1 false)
105  call <vscale x 32 x i16> @llvm.abs.nxv32i16(<vscale x 32 x i16> undef, i1 false)
106
107  call <8 x i8>  @llvm.abs.v8i8(<8 x i8> undef, i1 false)
108  call <16 x i8> @llvm.abs.v16i8(<16 x i8> undef, i1 false)
109  call <32 x i8> @llvm.abs.v32i8(<32 x i8> undef, i1 false)
110  call <64 x i8> @llvm.abs.v64i8(<64 x i8> undef, i1 false)
111  call <vscale x 8 x i8>  @llvm.abs.nxv8i8(<vscale x 8 x i8> undef, i1 false)
112  call <vscale x 16 x i8> @llvm.abs.nxv16i8(<vscale x 16 x i8> undef, i1 false)
113  call <vscale x 32 x i8> @llvm.abs.nxv32i8(<vscale x 32 x i8> undef, i1 false)
114  call <vscale x 64 x i8> @llvm.abs.nxv64i8(<vscale x 64 x i8> undef, i1 false)
115
116  ret i32 undef
117}
118