| /llvm-project/llvm/test/CodeGen/RISCV/ |
| H A D | pr80052.mir | 2 # RUN: llc %s -mtriple=riscv64 -run-pass=greedy,virtregrewriter,stack-slot-coloring -o - | FileChec…
11 stack:
18 ; To trick stack-slot-colouring to run its dead-store-elimination phase,
23 $x1 = LW %stack.0, 0 :: (volatile load (s32))
24 $x5 = LW %stack.0, 0 :: (volatile load (s32))
25 $x6 = LW %stack.0, 0 :: (volatile load (s32))
26 $x7 = LW %stack.0, 0 :: (volatile load (s32))
27 $x8 = LW %stack.0, 0 :: (volatile load (s32))
28 $x9 = LW %stack.0, 0 :: (volatile load (s32))
29 $x10 = LW %stack.0, 0 :: (volatile load (s32))
[all …]
|
| H A D | zcmp-prolog-epilog-crash.mir | 43 stack:
66 ; CHECK-NEXT: SB $x0, $x2, 31 :: (store (s8) into %stack.0 + 31)
67 ; CHECK-NEXT: SB $x0, $x2, 30 :: (store (s8) into %stack.0 + 30)
68 ; CHECK-NEXT: SB $x0, $x2, 29 :: (store (s8) into %stack.0 + 29)
69 ; CHECK-NEXT: SB $x0, $x2, 28 :: (store (s8) into %stack.0 + 28)
70 ; CHECK-NEXT: SB $x0, $x2, 27 :: (store (s8) into %stack.0 + 27)
71 ; CHECK-NEXT: SB $x0, $x2, 26 :: (store (s8) into %stack.0 + 26)
72 ; CHECK-NEXT: SB $x0, $x2, 25 :: (store (s8) into %stack.0 + 25)
73 ; CHECK-NEXT: SB $x0, $x2, 24 :: (store (s8) into %stack.0 + 24)
74 ; CHECK-NEXT: SB $x0, $x2, 23 :: (store (s8) into %stack
[all...] |
| H A D | stack-slot-coloring.mir | 2 # RUN: llc -mtriple=riscv32 -run-pass=greedy,virtregrewriter,stack-slot-coloring %s -o - 2>&1 | Fil…
55 stack:
57 stack-id: default, callee-saved-register: '', callee-saved-restored: true,
68 ; CHECK: $x10 = LW %stack.0.a, 0 :: (volatile dereferenceable load (s32) from %ir.a)
69 ; CHECK-NEXT: $x11 = LW %stack.0.a, 0 :: (volatile dereferenceable load (s32) from %ir.a)
70 ; CHECK-NEXT: $x12 = LW %stack.0.a, 0 :: (volatile dereferenceable load (s32) from %ir.a)
71 ; CHECK-NEXT: $x13 = LW %stack.0.a, 0 :: (volatile dereferenceable load (s32) from %ir.a)
72 ; CHECK-NEXT: $x14 = LW %stack.0.a, 0 :: (volatile dereferenceable load (s32) from %ir.a)
73 ; CHECK-NEXT: $x15 = LW %stack.0.a, 0 :: (volatile dereferenceable load (s32) from %ir.a)
74 ; CHECK-NEXT: $x16 = LW %stack.0.a, 0 :: (volatile dereferenceable load (s32) from %ir.a)
[all …]
|
| /llvm-project/libcxx/include/ |
| H A D | stack | 14 stack synopsis
20 class stack
33 stack() = default;
34 ~stack() = default;
36 stack(const stack& q) = default;
37 stack(stack&& q) = default;
39 stack& operator=(const stack
[all...] |
| /llvm-project/llvm/test/CodeGen/AMDGPU/ |
| H A D | accvgpr-spill-scc-clobber.mir | 10 stack:
26 ; GFX908-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
28 ; GFX908-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFEN $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.1, addrspace 5)
30 ; GFX908-NEXT: $vgpr1 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.2, addrspace 5)
96 ; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr80, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 700, 0, 0, implicit $exec :: (store (s32) into %stack.50, addrspace 5)
97 ; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr81, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 696, 0, 0, implicit $exec :: (store (s32) into %stack.51, addrspace 5)
98 ; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr82, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 692, 0, 0, implicit $exec :: (store (s32) into %stack.52, addrspace 5)
99 ; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr83, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 688, 0, 0, implicit $exec :: (store (s32) into %stack.53, addrspace 5)
100 ; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr84, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 684, 0, 0, implicit $exec :: (store (s32) into %stack.54, addrspace 5)
101 ; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr85, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 680, 0, 0, implicit $exec :: (store (s32) into %stack
[all...] |
| H A D | vgpr-mark-last-scratch-load.mir | 27 …; CHECK-NEXT: SI_SPILL_V32_SAVE $vgpr0, %stack.0, $sgpr32, 0, implicit $exec :: (store (s32) into …
28 …; CHECK-NEXT: SI_SPILL_V32_SAVE $vgpr1, %stack.1, $sgpr32, 0, implicit $exec :: (store (s32) into …
29 …; CHECK-NEXT: SI_SPILL_V32_SAVE $vgpr2, %stack.2, $sgpr32, 0, implicit $exec :: (store (s32) into …
30 …; CHECK-NEXT: SI_SPILL_V32_SAVE $vgpr3, %stack.3, $sgpr32, 0, implicit $exec :: (store (s32) into …
31 …; CHECK-NEXT: SI_SPILL_V32_SAVE $vgpr4, %stack.4, $sgpr32, 0, implicit $exec :: (store (s32) into …
32 …; CHECK-NEXT: SI_SPILL_V32_SAVE $vgpr5, %stack.5, $sgpr32, 0, implicit $exec :: (store (s32) into …
33 …; CHECK-NEXT: SI_SPILL_V32_SAVE $vgpr6, %stack.6, $sgpr32, 0, implicit $exec :: (store (s32) into …
34 …; CHECK-NEXT: SI_SPILL_V32_SAVE $vgpr7, %stack.7, $sgpr32, 0, implicit $exec :: (store (s32) into …
35 …; CHECK-NEXT: SI_SPILL_V32_SAVE $vgpr8, %stack.8, $sgpr32, 0, implicit $exec :: (store (s32) into …
36 …; CHECK-NEXT: SI_SPILL_V32_SAVE $vgpr9, %stack.9, $sgpr32, 0, implicit $exec :: (store (s32) into …
[all …]
|
| H A D | sgpr-spill-wrong-stack-id.mir | 1 …-verify-machineinstrs -stress-regalloc=3 -run-pass=greedy,virtregrewriter,stack-slot-coloring -o -…
2 …ineinstrs -stress-regalloc=3 -run-pass=greedy,virtregrewriter,stack-slot-coloring -no-stack-slot-s…
7 # Make sure that stack slot coloring doesn't try to merge frame
9 # Even when stack slot sharing was disabled, it was still moving the
28 # SHARE: stack:
30 # SHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
33 # SHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
36 # SHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
39 # SHARE: SI_SPILL_S32_SAVE $sgpr32, %stack.2, implicit $exec, implicit $sgpr32 :: (store (s32) into…
40 # SHARE: SI_SPILL_V32_SAVE killed $vgpr0, %stack.0, $sgpr32, 0, implicit $exec :: (store (s32) into…
[all …]
|
| H A D | promote-alloca-to-lds-constantexpr-use.ll | 23 %stack = alloca [4 x i32], align 4, addrspace(5)
24 %gep1 = getelementptr inbounds [4 x i32], ptr addrspace(5) %stack, i32 0, i32 1
25 %gep2 = getelementptr inbounds [4 x i32], ptr addrspace(5) %stack, i32 0, i32 2
26 %gep3 = getelementptr inbounds [4 x i32], ptr addrspace(5) %stack, i32 0, i32 3
27 store i32 9, ptr addrspace(5) %stack
31 %arrayidx = getelementptr inbounds [4 x i32], ptr addrspace(5) %stack, i32 0, i32 %idx
49 %stack = alloca [4 x i32], align 4, addrspace(5)
50 %gep1 = getelementptr inbounds [4 x i32], ptr addrspace(5) %stack, i32 0, i32 1
51 %gep2 = getelementptr inbounds [4 x i32], ptr addrspace(5) %stack, i32 0, i32 2
52 %gep3 = getelementptr inbounds [4 x i32], ptr addrspace(5) %stack, i32 0, i32 3
[all …]
|
| H A D | nsa-reassign.mir | 17 stack:
30 …%0 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align…
31 …%1 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align…
32 …%2 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align…
33 …%3 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align…
34 …%4 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align…
35 …%5 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align…
36 …%6 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align…
48 stack:
61 …%0 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align…
[all …]
|
| /llvm-project/llvm/test/Transforms/Attributor/ |
| H A D | value-simplify-assume.ll | 31 ; CHECK-NEXT: [[STACK:%.*]] = alloca i1, align 1
32 ; CHECK-NEXT: store i1 true, ptr [[STACK]], align 1
33 ; CHECK-NEXT: call void @useI1p(ptr noundef nonnull dereferenceable(1) [[STACK]])
34 ; CHECK-NEXT: [[L:%.*]] = load i1, ptr [[STACK]], align 1
38 %stack = alloca i1
39 store i1 true, ptr %stack
40 call void @useI1p(ptr %stack)
41 %l = load i1, ptr %stack
59 %stack = alloca i1
60 store i1 true, ptr %stack
[all...] |
| /llvm-project/llvm/test/CodeGen/X86/ |
| H A D | pr30821.mir | 1 # RUN: llc -x mir < %s -run-pass=greedy,virtregrewriter,stack-slot-coloring | FileCheck %s
47 stack:
49 stack-id: default, callee-saved-register: '', callee-saved-restored: true,
52 stack-id: default, callee-saved-register: '', callee-saved-restored: true,
55 stack-id: default, callee-saved-register: '', callee-saved-restored: true,
61 ; To trick stack-slot-colouring to run its dead-store-elimination phase,
68 ; virtreg gets spilt; the corresponding stack slots merged; and faulty code
72 …$xmm0 = MOVUPDrm %stack.2.india, 1, $noreg, 0, $noreg :: (volatile dereferenceable load (s128) fro…
73 …$xmm1 = MOVUPDrm %stack.2.india, 1, $noreg, 0, $noreg :: (volatile dereferenceable load (s128) fro…
74 …$xmm2 = MOVUPDrm %stack.2.india, 1, $noreg, 0, $noreg :: (volatile dereferenceable load (s128) fro…
[all …]
|
| H A D | statepoint-invoke-ra.mir | 21 # CHECK: MOV32mr %stack.1, 1, $noreg, 0, $noreg, %7 :: (store (s32) into %stack.1)
22 # CHECK: MOV32mr %stack.9, 1, $noreg, 0, $noreg, %45 :: (store (s32) into %stack.9)
23 # CHECK: MOV32mr %stack.0, 1, $noreg, 0, $noreg, %45 :: (store (s32) into %stack.0)
24 # CHECK: MOV32mr %stack.2, 1, $noreg, 0, $noreg, %33.sub_32bit :: (store (s32) into %stack.2)
25 # CHECK: MOV32mr %stack.6, 1, $noreg, 0, $noreg, %35 :: (store (s32) into %stack.6)
26 # CHECK: MOV32mr %stack.3, 1, $noreg, 0, $noreg, %35 :: (store (s32) into %stack.3)
27 # CHECK: MOV32mr %stack.8, 1, $noreg, 0, $noreg, %43 :: (store (s32) into %stack.8)
28 # CHECK: MOV32mr %stack.4, 1, $noreg, 0, $noreg, %43 :: (store (s32) into %stack.4)
29 # CHECK: MOV32mr %stack.7, 1, $noreg, 0, $noreg, %40 :: (store (s32) into %stack.7)
30 # CHECK: MOV32mr %stack.5, 1, $noreg, 0, $noreg, %40 :: (store (s32) into %stack.5)
[all …]
|
| H A D | statepoint-ra.ll | 77 ;CHECK: %82:fr64 = MOVSDrm_alt %fixed-stack.0, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-…
78 ;CHECK: %14:fr64 = MOVSDrm_alt %fixed-stack.1, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-…
79 ;CHECK: %72:fr64 = MOVSDrm_alt %fixed-stack.2, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-…
80 ;CHECK: %77:fr64 = MOVSDrm_alt %fixed-stack.3, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-…
81 ;CHECK: MOV64mr %stack.0, 1, $noreg, 0, $noreg, %3 :: (store (s64) into %stack.0)
83 …stack.0, 0, 2, 4, %68, 2, 7, 2, 0, 2, 4, %64, 2, 7, 2, 0, 2, 4, %6, 2, 7, 2, 0, 2, 4, %59, 2, 7, 2…
87 ;CHECK: MOVSDmr %stack.1, 1, $noreg, 0, $noreg, %45 :: (store (s64) into %stack.1)
88 ;CHECK: MOVSDmr %stack.2, 1, $noreg, 0, $noreg, %52 :: (store (s64) into %stack.2)
89 ;CHECK: MOVSDmr %stack.5, 1, $noreg, 0, $noreg, %64 :: (store (s64) into %stack.5)
90 ;CHECK: MOVSDmr %stack.6, 1, $noreg, 0, $noreg, %68 :: (store (s64) into %stack.6)
[all …]
|
| H A D | deopt-bundles.ll | 10 ; STACKMAPS: Stack Maps: callsite 2882400015
11 ; STACKMAPS-NEXT: Stack Maps: has 4 locations
12 ; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, …
13 ; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, …
14 ; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 0, .short 8, .short 0, …
15 ; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, …
16 ; STACKMAPS-NEXT: Stack Maps: has 0 live-out registers
17 ; STACKMAPS-NEXT: Stack Maps: callsite 4242
18 ; STACKMAPS-NEXT: Stack Maps: has 4 locations
19 ; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, …
[all …]
|
| /llvm-project/llvm/test/CodeGen/AArch64/ |
| H A D | unwind-preserved-from-mir.mir | 56 …Qi killed $q23, killed $q22, $sp, 2 :: (store (s128) into %stack.19), (store (s128) into %stack.18)
57 …Qi killed $q21, killed $q20, $sp, 4 :: (store (s128) into %stack.17), (store (s128) into %stack.16)
58 …Qi killed $q19, killed $q18, $sp, 6 :: (store (s128) into %stack.15), (store (s128) into %stack.14)
59 …Qi killed $q17, killed $q16, $sp, 8 :: (store (s128) into %stack.13), (store (s128) into %stack.12)
60 …i killed $q15, killed $q14, $sp, 10 :: (store (s128) into %stack.11), (store (s128) into %stack.10)
61 …PQi killed $q13, killed $q12, $sp, 12 :: (store (s128) into %stack.9), (store (s128) into %stack.8)
62 …PQi killed $q11, killed $q10, $sp, 14 :: (store (s128) into %stack.7), (store (s128) into %stack.6)
63 …STPQi killed $q9, killed $q8, $sp, 16 :: (store (s128) into %stack.5), (store (s128) into %stack.4)
64 …p STPXi killed $fp, killed $lr, $sp, 36 :: (store (s64) into %stack.3), (store (s64) into %stack.2)
84 ; CHECK: STRQui $q0, $sp, 0 :: (store (s128) into %stack.1)
[all …]
|
| /llvm-project/libcxx/test/std/containers/container.adaptors/stack/stack.cons/ |
| H A D | deduct.pass.cpp | 9 // <stack>
13 // stack(Container) -> stack<typename Container::value_type, Container>;
16 // stack(Container, Allocator) -> stack<typename Container::value_type, Container>;
19 // stack(from_range_t, R&&) -> stack<ranges::range_value_t<R>>; // since C++23
22 // stack(from_range_t, R&&, Allocator)
23 // -> stack<ranges::range_value_t<R>, deque<ranges::range_value_t<R>, Allocator>>; // since C++…
26 #include <stack>
48 std::stack stk(v); in main()
50 static_assert(std::is_same_v<decltype(stk), std::stack<int, std::vector<int>>>, ""); in main()
57 std::stack stk(l, test_allocator<long>(0,2)); // different allocator in main()
[all …]
|
| /llvm-project/llvm/docs/ |
| H A D | StackMaps.rst | 2 Stack maps and patch points in LLVM
16 A stack map records the location of ``live values`` at a particular
18 LLVM values live across the stack map. Instead, they are only the
22 containing the stack map.
24 LLVM emits stack map data into the object code within a designated
25 :ref:`stackmap-section`. This stack map data contains a record for
26 each stack map. The record stores the stack map's instruction address
28 value's location as a register, stack offset, or constant.
33 convention and may return a value. They also imply stack ma
[all...] |
| /llvm-project/llvm/test/CodeGen/Mips/msa/ |
| H A D | emergency-spill.mir | 3 # Test that estimated size of the stack leads to the creation of an emergency
103 stack:
136 SD killed $a0_64, %stack.1.a, 0 :: (store (s64) into %ir.1, align 16)
137 SD killed $a1_64, %stack.1.a, 8 :: (store (s64) into %ir.2)
138 $w0 = LD_B %stack.1.a, 0 :: (dereferenceable load (s128) from %ir.a)
139 SD killed $a2_64, %stack.2.b, 0 :: (store (s64) into %ir.4, align 16)
140 SD killed $a3_64, %stack.2.b, 8 :: (store (s64) into %ir.5)
141 $w1 = LD_B %stack.2.b, 0 :: (dereferenceable load (s128) from %ir.b)
142 ST_B killed $w0, %stack.3.a.addr, 0 :: (store (s128) into %ir.a.addr)
143 ST_B killed $w1, %stack
[all...] |
| /llvm-project/lldb/source/Expression/ |
| H A D | DWARFExpression.cpp | 271 case DW_OP_pick: // 0x15 1 1-byte stack index in GetOpcodeDataSize()
543 // by a file address on the stack. We assume that DW_OP_const4u or in Evaluate_DW_OP_entry_value()
584 static llvm::Error Evaluate_DW_OP_entry_value(std::vector<Value> &stack, in Evaluate_DW_OP_entry_value()
594 // constant literal, or a spilled stack value) in the parent frame. in Evaluate_DW_OP_entry_value()
634 // 1. Find the function which pushed the current frame onto the stack. in Evaluate_DW_OP_entry_value()
651 // If this is null, we're at the end of the stack. in Evaluate_DW_OP_entry_value()
770 stack.push_back(*maybe_result);
884 std::vector<Value> stack; in Evaluate()
899 stack.push_back(*initial_value_ptr); in Evaluate()
912 // TODO: Implement a real typed stack, an in Evaluate()
531 Evaluate_DW_OP_entry_value(std::vector<Value> & stack,ExecutionContext * exe_ctx,RegisterContext * reg_ctx,const DataExtractor & opcodes,lldb::offset_t & opcode_offset,Log * log) Evaluate_DW_OP_entry_value() argument
831 std::vector<Value> stack; Evaluate() local
[all...] |
| /llvm-project/llvm/test/CodeGen/PowerPC/ |
| H A D | aix-csr.ll | 23 ; MIR64-NEXT: - { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: default,
26 ; MIR64-NEXT: - { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
29 ; MIR64-NEXT: - { id: 2, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: default,
32 ; MIR64-NEXT: - { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 16, stack-id: default,
35 ; MIR64-NEXT: - { id: 4, type: spill-slot, offset: -40, size: 8, alignment: 8, stack-id: default,
38 ; MIR64-NEXT: - { id: 5, type: spill-slot, offset: -48, size: 8, alignment: 16, stack-id: default,
41 ; MIR64-NEXT: - { id: 6, type: spill-slot, offset: -56, size: 8, alignment: 8, stack-id: default,
44 ; MIR64-NEXT: - { id: 7, type: spill-slot, offset: -64, size: 8, alignment: 16, stack-id: default,
47 ; MIR64-NEXT: - { id: 8, type: spill-slot, offset: -72, size: 8, alignment: 8, stack-id: default,
50 ; MIR64-NEXT: - { id: 9, type: spill-slot, offset: -80, size: 8, alignment: 16, stack-id: default,
[all …]
|
| H A D | aix-cc-byval-split.ll | 33 ; CHECK32: - { id: 0, type: default, offset: 24, size: 96, alignment: 8, stack-id: default,
34 ; CHECK32: stack: []
39 ; CHECK32: renamable $r[[REG1:[0-9]+]] = LWZ 84, %fixed-stack.0
40 ; CHECK32-DAG: STW killed renamable $r3, 0, %fixed-stack.0 :: (store (s32) into %fixed-stack.0
41 ; CHECK32-DAG: STW killed renamable $r4, 4, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 4
42 ; CHECK32: renamable $r[[REG2:[0-9]+]] = LWZ 80, %fixed-stack.0
43 ; CHECK32-DAG: STW killed renamable $r5, 8, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 8
44 ; CHECK32-DAG: STW killed renamable $r6, 12, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 12
45 ; CHECK32-DAG: STW renamable $r7, 16, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 16
46 ; CHECK32-DAG: STW renamable $r8, 20, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 20
[all …]
|
| H A D | aix-csr-vector-extabi.ll | 27 ; MIR32-NEXT: - { id: 0, type: spill-slot, offset: -16, size: 16, alignment: 16, stack-id: defa…
30 ; MIR32-NEXT: - { id: 1, type: spill-slot, offset: -32, size: 16, alignment: 16, stack-id: defa…
33 ; MIR32-NEXT: - { id: 2, type: spill-slot, offset: -48, size: 16, alignment: 16, stack-id: defa…
36 ; MIR32-NEXT: - { id: 3, type: spill-slot, offset: -64, size: 16, alignment: 16, stack-id: defa…
39 ; MIR32-NEXT: - { id: 4, type: spill-slot, offset: -80, size: 16, alignment: 16, stack-id: defa…
42 ; MIR32-NEXT: - { id: 5, type: spill-slot, offset: -96, size: 16, alignment: 16, stack-id: defa…
45 ; MIR32-NEXT: - { id: 6, type: spill-slot, offset: -112, size: 16, alignment: 16, stack-id: def…
48 ; MIR32-NEXT: - { id: 7, type: spill-slot, offset: -128, size: 16, alignment: 16, stack-id: def…
51 ; MIR32-NEXT: - { id: 8, type: spill-slot, offset: -144, size: 16, alignment: 16, stack-id: def…
54 ; MIR32-NEXT: - { id: 9, type: spill-slot, offset: -160, size: 16, alignment: 16, stack-id: def…
[all …]
|
| /llvm-project/clang/docs/ |
| H A D | SafeStack.rst | 12 based on stack buffer overflows, without introducing any measurable performance
13 overhead. It works by separating the program stack into two distinct regions:
14 the safe stack and the unsafe stack. The safe stack stores return addresses,
16 while the unsafe stack stores everything else. This separation ensures that
17 buffer overflows on the unsafe stack cannot be used to overwrite anything
18 on the safe stack.
30 stack and, hence, do not need unsafe stack frames to be created. The cost of
31 creating unsafe stack frames for large functions is amortized by the cost of
35 being moved to the unsafe stack are usually large arrays or variables that are
36 used through multiple stack frames. Moving such objects away from the safe
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUFrameLowering.cpp | 9 // Interface to describe a layout of a stack frame on a AMDGPU target machine.
29 // The StackWidth determines how stack objects are laid out in memory. in getStackWidth()
30 // For a vector stack variable, like: int4 stack[2], the data will be stored in getStackWidth()
35 // T0.X = stack[0].x in getStackWidth()
36 // T1.X = stack[0].y in getStackWidth()
37 // T2.X = stack[0].z in getStackWidth()
38 // T3.X = stack[0].w in getStackWidth()
39 // T4.X = stack[1].x in getStackWidth()
40 // T5.X = stack[1].y in getStackWidth()
41 // T6.X = stack[1].z in getStackWidth()
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| /llvm-project/llvm/test/CodeGen/SystemZ/ |
| H A D | vec-args-01.ll | 5 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s -check-prefix=CHECK-STACK
8 ; the stack slot at offset 160, and 10 vector arguments, which
9 ; fill up v24-v31 and the two double-wide stack slots at 168
47 ; CHECK-STACK-LABEL: foo:
48 ; CHECK-STACK: # %bb.0:
49 ; CHECK-STACK-NEXT: stmg %r6, %r15, 48(%r15)
50 ; CHECK-STACK-NEXT: .cfi_offset %r6, -112
51 ; CHECK-STACK-NEXT: .cfi_offset %r14, -48
52 ; CHECK-STACK-NEXT: .cfi_offset %r15, -40
53 ; CHECK-STACK-NEXT: aghi %r15, -200
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