| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | MIMGInstructions.td | 426 DMask:$dmask, UNorm:$unorm, CPol:$cpol,
429 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$cpol$r128$tfe$lwe$da"
439 DMask:$dmask, UNorm:$unorm, CPol:$cpol,
442 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$cpol$r128$lwe$da"
451 Dim:$dim, UNorm:$unorm, CPol:$cpol,
454 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$cpol$r128$a16$tfe$lwe"
464 Dim:$dim, UNorm:$unorm, CPol
[all...] |
| H A D | SIMemoryLegalizer.cpp | 285 AMDGPU::CPol::CPol Bit) const;
377 return enableNamedBit(MI, AMDGPU::CPol::GLC); in SIGfx6CacheControl()
383 return enableNamedBit(MI, AMDGPU::CPol::SLC);
485 return enableNamedBit(MI, AMDGPU::CPol::SC0); in enableNTBit()
491 return enableNamedBit(MI, AMDGPU::CPol::SC1); in SIGfx940CacheControl()
497 return enableNamedBit(MI, AMDGPU::CPol::NT);
549 return enableNamedBit(MI, AMDGPU::CPol::DLC);
594 // Sets TH policy to \p Value if CPol operand is present in instruction \p MI.
597 AMDGPU::CPol
866 MachineOperand *CPol = TII->getNamedOperand(*MI, AMDGPU::OpName::cpol); enableNamedBit() local
2166 MachineOperand *CPol = TII->getNamedOperand(*MI, OpName::cpol); setTH() local
2181 MachineOperand *CPol = TII->getNamedOperand(*MI, OpName::cpol); setScope() local
[all...] |
| H A D | SIInstrFormats.td | 342 bits<5> cpol;
352 let Inst{13} = cpol{CPolBit.GLC};
355 let Inst{25} = cpol{CPolBit.SLC};
368 let Inst{7} = cpol{CPolBit.SCC};
380 let Inst{7} = cpol{CPolBit.SCC};
396 let Inst{7} = cpol{CPolBit.DLC};
407 bits<5> cpol;
423 let Inst{12} = cpol{CPolBit.SLC};
424 let Inst{13} = cpol{CPolBit.DLC};
425 let Inst{14} = cpol{CPolBi
[all...] |
| H A D | FLATInstructions.td | 114 bits<5> cpol;
136 let Inst{16} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glcValue);
137 let Inst{17} = cpol{CPolBit.SLC};
175 bits<6> cpol;
185 let Inst{54-53} = cpol{2-1}; // th{2-1}
186 let Inst{52} = !if(ps.IsAtomicRet, 1, cpol{0}); // th{0}
187 let Inst{51-50} = cpol{4-3}; // scope
214 !if(HasTiedOutput, (ins CPol:$cpol, vdata_op:$vdst_in),
215 (ins CPol_0:$cpol))),
[all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/iio/adc/ |
| H A D | microchip,mcp3201.yaml | 36 spi-cpol: true
45 spi-cpol: [ spi-cpha ]
46 spi-cpha: [ spi-cpol ]
69 spi-cpol;
|
| H A D | ti,adc084s021.yaml | 25 spi-cpol: true
35 - spi-cpol
53 spi-cpol;
|
| H A D | adi,ad7768-1.yaml | 53 spi-cpol: true
66 - spi-cpol
106 spi-cpol;
|
| H A D | microchip,mcp3564.yaml | 48 spi-cpol: true
120 spi-cpol: [ spi-cpha ]
121 spi-cpha: [ spi-cpol ]
160 spi-cpol;
|
| /freebsd-src/sys/contrib/device-tree/Bindings/iio/resolver/ |
| H A D | adi,ad2s90.yaml | 32 spi-cpol: true
41 spi-cpol: [ spi-cpha ]
42 spi-cpha: [ spi-cpol ]
59 spi-cpol;
|
| H A D | ad2s90.txt | 9 - spi-cpol and spi-cpha:
11 spi-cpha, spi-cpol.
29 spi-cpol;
|
| /freebsd-src/sys/contrib/device-tree/Bindings/iio/dac/ |
| H A D | ti,dac082s085.yaml | 29 spi-cpol:
31 Must be either spi-cpha, or spi-cpol but not both.
45 - spi-cpol
69 spi-cpol;
|
| H A D | ti-dac082s085.txt | 12 - spi-cpha, spi-cpol: SPI mode (0,1) or (1,0) must be used, so specify
13 either spi-cpha or spi-cpol (but not both).
32 spi-cpol;
|
| H A D | adi,ad5766.yaml | 35 spi-cpol: true
47 - spi-cpol
61 spi-cpol;
|
| H A D | adi,ad5592r.yaml | 24 spi-cpol: true
64 - spi-cpol
67 spi-cpol: false
130 spi-cpol;
|
| /freebsd-src/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | fsl-ls1028a-qds.dts | 153 spi-cpol;
163 spi-cpol;
173 spi-cpol;
188 spi-cpol;
198 spi-cpol;
208 spi-cpol;
223 spi-cpol;
|
| /freebsd-src/sys/contrib/device-tree/Bindings/net/nfc/ |
| H A D | marvell,nci.yaml | 60 spi-cpol: true
76 spi-cpol: false
107 spi-cpol: false
149 spi-cpol;
|
| /freebsd-src/sys/contrib/device-tree/Bindings/iio/gyroscope/ |
| H A D | adi,adxrs290.yaml | 27 spi-cpol: true
38 - spi-cpol
56 spi-cpol;
|
| /freebsd-src/sys/contrib/device-tree/Bindings/net/ |
| H A D | vertexcom-mse102x.yaml | 39 spi-cpol: true
50 - spi-cpol
68 spi-cpol;
|
| H A D | qca,qca7000.txt | 19 - spi-cpol : Must be set
52 spi-cpol; /* SPI mode: CPOL=1 */
|
| /freebsd-src/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | nxp-spifi.txt | 25 - spi-cpol : Controller only supports mode 0 and 3 so either
26 both spi-cpol and spi-cpha should be present or
46 spi-cpol;
|
| /freebsd-src/sys/contrib/device-tree/Bindings/display/panel/ |
| H A D | samsung,lms397kf04.yaml | 40 spi-cpol: true
53 - spi-cpol
75 spi-cpol;
|
| H A D | samsung,s6d27a1.yaml | 47 spi-cpol: true
60 - spi-cpol
83 spi-cpol;
|
| H A D | samsung,lms380kf01.yaml | 48 spi-cpol: true
59 - spi-cpol
83 spi-cpol;
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.cpp | 186 const int64_t TH = Imm & CPol::TH; in printCPol()
187 const int64_t Scope = Imm & CPol::SCOPE; in printCPol()
195 if (Imm & CPol::GLC) in printCPol()
199 if (Imm & CPol::SLC) in printCPol()
201 if ((Imm & CPol::DLC) && AMDGPU::isGFX10Plus(STI)) in printCPol()
203 if ((Imm & CPol::SCC) && AMDGPU::isGFX90A(STI))
205 if (Imm & ~CPol::ALL) in printTH()
225 if (TH & AMDGPU::CPol::TH_ATOMIC_CASCADE) { in printTH()
226 if (Scope >= AMDGPU::CPol::SCOPE_DEV) in printTH()
227 O << "CASCADE" << (TH & AMDGPU::CPol in printTH()
[all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/iio/imu/ |
| H A D | adi,adis16475.yaml | 52 spi-cpol: true
90 - spi-cpol
159 spi-cpol;
|