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/llvm-project/llvm/test/tools/llvm-dwarfdump/RISCV/
H A Driscv-relocs.yaml16 # .byte 0x11 # DW_TAG_compile_unit
17 # .byte 0 # DW_CHILDREN_no
21 # .byte 0x12 # DW_AT_high_pc
22 # .byte 0x01 # DW_FORM_addr
25 # .byte 0 # EOM(1)
26 # .byte 0 # EOM(2)
27 # .byte 0 # EOM(3)
35 # .8byte 0x00000000000042 # Test 1
36 # .8byte 0x00000000000042 # Test 2
37 # .8byte 0x00000000000042 # Test 3
[all …]
/llvm-project/llvm/test/tools/llvm-dwarfdump/AMDGPU/
H A Damdgpu-relocs.yaml27 ABIVersion: 0x02
60 - Value: 0x4242424242424242
61 - Value: 0x4242424242424242
62 - Value: 0x4242424242424242
63 - Value: 0x4242424242424242
64 - Value: 0x4242424242424242
65 - Value: 0x4242424242424242
66 - Value: 0x4242424242424242
67 - Value: 0x4242424242424242
72 AddressAlign: 0x0000000000000008
[all …]
/llvm-project/clang/test/InterfaceStubs/
H A Dinline.c3 // RUN: -emit-interface-stubs -std=gnu89 -xc %s | \
6 // RUN: -std=gnu89 -xc %s | llvm-nm - | FileCheck -check-prefix=CHECK-GNU %s
9 // RUN: -triple x86_64-unknown-linux-gnu -o - -emit-interface-stubs -xc %s | \
12 // RUN: -target x86_64-linux-gnu -O0 -o - -c -xc %s | \
16 // RUN: -emit-interface-stubs -std=c99 -xc %s | \
19 // RUN: -xc %s | llvm-nm - 2>&1 | count 0
22 // RUN: -triple x86_64-unknown-linux-gnu -o - -emit-interface-stubs -std=c99 -xc %s | \
25 // RUN: -O0 -o - -c -std=c99 -xc %s | llvm-nm - 2>&1 | \
29 // RUN: -emit-interface-stubs -std=c99 -xc %s | \
32 // RUN: -std=c99 -xc %s | llvm-nm - 2>&1 | count 0
[all …]
/llvm-project/llvm/test/CodeGen/SystemZ/
H A Dmemset-03.ll13 call void @llvm.memset.p0.i32(ptr %dest, i8 0, i32 0, i1 false)
22 call void @llvm.memset.p0.i64(ptr %dest, i8 0, i64 0, i1 false)
29 ; CHECK: mvi 0(%r2), 0
31 call void @llvm.memset.p0.i32(ptr %dest, i8 0, i32 1, i1 false)
38 ; CHECK: mvi 0(%r2), 0
40 call void @llvm.memset.p0.i64(ptr %dest, i8 0, i64 1, i1 false)
47 ; CHECK: mvhhi 0(%r2), 0
49 call void @llvm.memset.p0.i32(ptr %dest, i8 0, i32 2, i1 false)
56 ; CHECK: mvhhi 0(%r2), 0
58 call void @llvm.memset.p0.i64(ptr %dest, i8 0, i64 2, i1 false)
[all …]
H A Dmemset-05.ll2 ; Test memset 0 with variable length
8 ; CHECK: # %bb.0:
10 ; CHECK-NEXT: cgibe %r3, -1, 0(%r14)
13 ; CHECK-NEXT: cgije %r0, 0, .LBB0_3
15 ; CHECK-NEXT: xc 0(256,%r2), 0(%r2)
21 tail call void @llvm.memset.p0.i64(ptr %Addr, i8 0, i64 %Len, i1 false)
27 ; CHECK: # %bb.0:
30 ; CHECK-NEXT: cgibe %r1, -1, 0(%r14)
33 ; CHECK-NEXT: cgije %r0, 0, .LBB1_3
35 ; CHECK-NEXT: xc 0(256,%r2), 0(%r2)
[all …]
H A Dxor-08.ll8 ; CHECK: xc 1(1,%r2), 0(%r2)
21 ; CHECK: xc 2(2,%r2), 0(%r2)
34 ; CHECK: xc 4(4,%r2), 0(%r2)
47 ; CHECK: xc 8(8,%r2), 0(%r2)
/llvm-project/clang/test/Sema/
H A Danonymous-struct-union.c24 void test_unqual_references(struct X x, const struct X xc) { in test_unqual_references() argument
25 // expected-note@-1 3{{variable 'xc' declared const here}} in test_unqual_references()
26 x.i = 0; in test_unqual_references()
30 x.f3 = 0; // expected-error{{no member named 'f3'}} in test_unqual_references()
31 x.a = 0; in test_unqual_references()
33 …xc.d = 0.0; // expected-error{{cannot assign to variable 'xc' with const-qualified type 'const str… in test_unqual_references()
34 …xc.f = 0; // expected-error{{cannot assign to variable 'xc' with const-qualified type 'const struc… in test_unqual_references()
35 …xc.a = 0; // expected-error{{cannot assign to variable 'xc' with const-qualified type 'const struc… in test_unqual_references()
65 int_val2 = 0; // expected-error{{use of undeclared identifier}} in f()
74 i = 0; // expected-error{{use of undeclared identifier}} in g()
[all …]
/llvm-project/llvm/test/tools/llvm-objdump/MachO/
H A Darm64-disassembly-color.s16 // NOCOLOR: sub sp, sp, #0x10
17 // NOCOLOR: str w0, [sp, #0xc]
18 // NOCOLOR: ldr w8, [sp, #0xc]
19 // NOCOLOR: ldr w9, [sp, #0xc]
21 // NOCOLOR: add sp, sp, #0x10
23 // COLOR: sub sp, sp, #0x10
24 // COLOR: str w0, [sp, #0xc]
25 // COLOR: ldr w8, [sp, #0xc]
26 // COLOR: ldr w9, [sp, #0xc]
27 // COLOR: mul w0, w8, w9
[all …]
/llvm-project/llvm/test/MC/Mips/
H A Dsort-relocation-table.s27 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_1 {
28 # CHECK-NEXT: 0x0 R_MIPS_HI16 sym1
29 # CHECK-NEXT: 0x4 R_MIPS_LO16 sym1
37 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_2 {
38 # CHECK-NEXT: 0x4 R_MIPS_HI16 sym1
39 # CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
50 # CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_3 {
51 # CHECK-NEXT: 0xC R_MIPS_HI16 sym1
52 # CHECK-NEXT: 0x
[all...]
/llvm-project/llvm/test/MC/LoongArch/Relocations/
H A Drelax-align.s11 break 0
12 # INSTR: break 0
18 .p2align 0
71 # RELAX-RELOC-NEXT: 0x24 R_LARCH_ALIGN - 0xC
72 # RELAX-RELOC-NEXT: 0x34 R_LARCH_ALIGN - 0x1C
73 # RELAX-RELOC-NEXT: 0x50 R_LARCH_ALIGN - 0xC
74 # RELAX-RELOC-NEXT: 0x60 R_LARCH_ALIGN .Lla-relax-align0 0xB04
75 # RELAX-RELOC-NEXT: 0x70 R_LARCH_ALIGN - 0xC
78 # RELAX-RELOC-NEXT: 0x0 R_LARCH_ALIGN - 0xC
79 # RELAX-RELOC-NEXT: 0xC R_LARCH_ALIGN .Lla-relax-align1 0x404
/llvm-project/llvm/test/MC/ARM/
H A Dbranch-disassemble.s11 @ CHECK-ARM: b 0xc <foo+0xc> @ imm = #4
12 @ CHECK-THUMB: b.w 0xc <foo+0xc> @ imm = #8
/llvm-project/clang/test/SemaCXX/
H A Danonymous-union.cpp34 i = 0; in test_unqual_references()
38 f3 = 0; // expected-error{{use of undeclared identifier 'f3'}} in test_unqual_references()
39 a = 0; in test_unqual_references()
44 …f2 = 0; // expected-error{{cannot assign to non-static data member within const member function 't… in test_unqual_references_const()
45 …a = 0; // expected-error{{cannot assign to non-static data member within const member function 'te… in test_unqual_references_const()
48 void test_unqual_references(X x, const X xc) { in test_unqual_references() argument
49 // expected-note@-1 2{{variable 'xc' declared const here}} in test_unqual_references()
50 x.i = 0; in test_unqual_references()
54 x.f3 = 0; // expected-error{{no member named 'f3'}} in test_unqual_references()
55 x.a = 0; in test_unqual_references()
[all …]
/llvm-project/lldb/test/API/commands/trace/
H A DTestTraceDumpInstructions.py49 """[{"id":3,"loadAddress":"0x400511"}""",
50 """{"id":7,"loadAddress":"0x400518"}""",
51 """{"id":8,"loadAddress":"0x40051f"}""",
52 """{"id":9,"loadAddress":"0x400529"}""",
53 """{"id":10,"loadAddress":"0x40052d"}""",
63 "loadAddress": "0x400511"
67 "loadAddress": "0x400518"
71 "loadAddress": "0x40051f"
75 "loadAddress": "0x400529"
79 "loadAddress": "0x40052d"
[all …]
/llvm-project/compiler-rt/test/msan/
H A Dgetc_unlocked.c1 // RUN: %clangxx_msan -DGETC -O0 -g -xc++ %s -o %t && %run %t
2 // RUN: %clangxx_msan -DGETC -O3 -g -xc++ %s -o %t && %run %t
6 // RUN: %clangxx_msan -DGETCHAR -O0 -g -xc++ %s -o %t && %run %t
7 // RUN: %clangxx_msan -DGETCHAR -O3 -g -xc++ %s -o %t && %run %t
20 int res = dup2(fileno(stream), 0); in main()
21 assert(res == 0); in main()
31 return 0; in main()
H A Dgetline.cpp5 // RUN: %clang_msan -O0 -xc %s -o %t && %run %t %t-testdata
6 // RUN: %clang_msan -O2 -xc %s -o %t && %run %t %t-testdata
7 // RUN: %clang_msan -O0 -xc -D_GNU_SOURCE=1 %s -o %t && %run %t %t-testdata
8 // RUN: %clang_msan -O2 -xc -D_GNU_SOURCE=1 %s -o %t && %run %t %t-testdata
26 char *line = 0; in main()
27 size_t len = 0; in main()
30 assert(strcmp(line, "abcde\n") == 0); in main()
34 assert(strcmp(line, "12345\n") == 0); in main()
39 return 0; in main()
/llvm-project/llvm/test/tools/llvm-dwarfdump/X86/
H A Dsimplified-template-names.s13 …file 0 "/usr/local/google/home/blaikie/dev/llvm/src" "cross-project-tests/debuginfo-tests/clang_ll…
14 .file 1 "/usr" "include/x86_64-linux-gnu/bits/types.h" md5 0x58b79843d97f4309eefa4aa722dac91e
15 .file 2 "/usr" "include/x86_64-linux-gnu/bits/stdint-intn.h" md5 0xb26974ec56196748bbc399ee826d2a0e
17 .file 4 "/usr" "include/stdint.h" md5 0x8e56ab3ccd56760d8ae9848ebf326071
18 ….file 5 "/usr" "include/x86_64-linux-gnu/bits/stdint-uintn.h" md5 0x3d2fbc5d847dd222c2fbd704575684…
20 .p2align 4, 0x90
24 ….loc 0 142 0 # cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/si…
26 # %bb.0:
34 ….loc 0 142 44 prologue_end # cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/si…
44 .p2align 4, 0x90
[all …]
/llvm-project/llvm/test/CodeGen/AArch64/
H A Dcsel-andor-onebit.ll6 ; CHECK: // %bb.0:
7 ; CHECK-NEXT: and w8, w0, #0x1
8 ; CHECK-NEXT: cmp w1, #0
12 %c = icmp eq i32 %y, 0
20 ; CHECK: // %bb.0:
21 ; CHECK-NEXT: and w8, w0, #0x1
22 ; CHECK-NEXT: cmp w1, #0
26 %c = icmp eq i32 %y, 0
34 ; CHECK: // %bb.0:
35 ; CHECK-NEXT: and w8, w0, #0x1
[all …]
/llvm-project/llvm/test/Analysis/CostModel/ARM/
H A Dfreeshift.ll4 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
8 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %as = shl i32 %a, 3
10 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %ss = shl i32 %a, 3
12 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %xs = shl i32 %a, 3
13 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %xc = xor i32 %b, %xs
14 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %ns = shl i32 %a, 3
16 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %os = shl i32 %a, 3
18 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %is = shl i32 %a, 3
27 %xc = xor i32 %b, %xs
39 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %as = ashr i32 %a, 3
[all …]
/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Dmemory-legalizer-global-workgroup.ll18 ; GFX6: ; %bb.0: ; %entry
20 ; GFX6-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x0
21 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x2
22 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
25 ; GFX6-NEXT: s_mov_b32 s12, 0x100f000
37 ; GFX6-NEXT: buffer_load_dword v0, off, s[8:11], 0
38 ; GFX6-NEXT: s_waitcnt vmcnt(0)
39 ; GFX6-NEXT: buffer_store_dword v0, off, s[4:7], 0
43 ; GFX7: ; %bb.0: ; %entry
44 ; GFX7-NEXT: s_load_dwordx2 s[6:7], s[8:9], 0x
[all...]
H A Dmemory-legalizer-flat-singlethread.ll17 ; GFX7: ; %bb.0: ; %entry
18 ; GFX7-NEXT: s_load_dwordx2 s[6:7], s[8:9], 0x0
19 ; GFX7-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x2
20 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
23 ; GFX7-NEXT: flat_load_dword v2, v[0:1]
26 ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
27 ; GFX7-NEXT: flat_store_dword v[0:1], v2
31 ; GFX10-WGP: ; %bb.0: ; %entry
32 ; GFX10-WGP-NEXT: s_load_dwordx2 s[6:7], s[8:9], 0x
[all...]
H A Dmemory-legalizer-global-wavefront.ll18 ; GFX6: ; %bb.0: ; %entry
20 ; GFX6-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x0
21 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x2
22 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
25 ; GFX6-NEXT: s_mov_b32 s12, 0x100f000
37 ; GFX6-NEXT: buffer_load_dword v0, off, s[8:11], 0
38 ; GFX6-NEXT: s_waitcnt vmcnt(0)
39 ; GFX6-NEXT: buffer_store_dword v0, off, s[4:7], 0
43 ; GFX7: ; %bb.0: ; %entry
44 ; GFX7-NEXT: s_load_dwordx2 s[6:7], s[8:9], 0x
[all...]
H A Dmemory-legalizer-global-singlethread.ll18 ; GFX6: ; %bb.0: ; %entry
20 ; GFX6-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x0
21 ; GFX6-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x2
22 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
25 ; GFX6-NEXT: s_mov_b32 s12, 0x100f000
37 ; GFX6-NEXT: buffer_load_dword v0, off, s[8:11], 0
38 ; GFX6-NEXT: s_waitcnt vmcnt(0)
39 ; GFX6-NEXT: buffer_store_dword v0, off, s[4:7], 0
43 ; GFX7: ; %bb.0: ; %entry
44 ; GFX7-NEXT: s_load_dwordx2 s[6:7], s[8:9], 0x
[all...]
H A Dmemory-legalizer-flat-wavefront.ll17 ; GFX7: ; %bb.0: ; %entry
18 ; GFX7-NEXT: s_load_dwordx2 s[6:7], s[8:9], 0x0
19 ; GFX7-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x2
20 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
23 ; GFX7-NEXT: flat_load_dword v2, v[0:1]
26 ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
27 ; GFX7-NEXT: flat_store_dword v[0:1], v2
31 ; GFX10-WGP: ; %bb.0: ; %entry
32 ; GFX10-WGP-NEXT: s_load_dwordx2 s[6:7], s[8:9], 0x
[all...]
/llvm-project/bolt/test/X86/Inputs/
H A Ddwarf5-dwarf4-types-backward-forward-cross-reference-helper.s15 # return 0;
32 # return 0;
40 .p2align 4, 0x90
45 .loc 1 11 0 # helper1.cpp:11:0
47 # %bb.0: # %entry
56 .loc 1 14 3 epilogue_begin is_stmt 0 # helper1.cpp:14:3
66 .p2align 4, 0x90
71 .loc 2 11 0 is_stmt 1 # helper2.cpp:11:0
73 # %bb.0: # %entry
82 .loc 2 14 3 epilogue_begin is_stmt 0 # helper2.cpp:14:3
[all …]
/llvm-project/bolt/test/X86/
H A Ddwarf4-types-forward-backward-cross-reference.s11 # POSTCHECK: version = 0x0004
13 # POSTCHECK: DW_AT_type [DW_FORM_ref_addr] (0x0000000000000112 "Foo2a")
15 # POSTCHECK: version = 0x0004
17 # POSTCHECK: DW_AT_type [DW_FORM_ref_addr] (0x0000000000000094 "Foo")
19 # POSTCHECK: DW_AT_type [DW_FORM_ref_addr] (0x0000000000000190 "Foo3a")
39 # return 0;
56 # return 0;
73 # return 0;
80 .p2align 4, 0x90
85 .loc 1 10 0 # main.cpp:10:0
[all …]

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