1## Tests llvm-dwarfdump handling of AMDGPU relocations. We provide a .debug_info 2## section with multiple DW_AT_high_pc entries (that's one of the attributes for 3## which relocations are resolved by llvm-dwarfdump) and we add a relocation for 4## each of them. The first YAML document represents an amdgcn code object, and 5## the second an r600 code object. 6 7# RUN: yaml2obj --docnum=1 -DMACH= %s \ 8# RUN: | llvm-dwarfdump - 2>&1 | FileCheck --check-prefixes=AMDGCN,UNKNOWN %s 9# RUN: yaml2obj --docnum=1 -DMACH=EF_AMDGPU_MACH_AMDGCN_GFX803 %s \ 10# RUN: | llvm-dwarfdump - 2>&1 | FileCheck --check-prefixes=AMDGCN,KNOWN %s 11 12# RUN: yaml2obj --docnum=2 -DMACH= %s \ 13# RUN: | llvm-dwarfdump - 2>&1 | FileCheck --check-prefixes=R600,UNKNOWN %s 14# RUN: yaml2obj --docnum=2 -DMACH=EF_AMDGPU_MACH_R600_R600 %s \ 15# RUN: | llvm-dwarfdump - 2>&1 | FileCheck --check-prefixes=R600,KNOWN %s 16 17# UNKNOWN: -: Error in creating MCRegInfo 18# KNOWN-NOT: -: Error in creating MCRegInfo 19 20# AMDGCN: -: file format elf64-amdgpu 21 22--- !ELF 23FileHeader: 24 Class: ELFCLASS64 25 Data: ELFDATA2LSB 26 OSABI: ELFOSABI_AMDGPU_HSA 27 ABIVersion: 0x02 28 Type: ET_REL 29 Machine: EM_AMDGPU 30 Flags: [[[MACH]]] 31DWARF: 32 debug_abbrev: 33 - Table: 34 - Code: 1 35 Tag: DW_TAG_compile_unit 36 Children: DW_CHILDREN_no 37 Attributes: 38 - Attribute: DW_AT_high_pc 39 Form: DW_FORM_addr 40 - Attribute: DW_AT_high_pc 41 Form: DW_FORM_addr 42 - Attribute: DW_AT_high_pc 43 Form: DW_FORM_addr 44 - Attribute: DW_AT_high_pc 45 Form: DW_FORM_addr 46 - Attribute: DW_AT_high_pc 47 Form: DW_FORM_addr 48 - Attribute: DW_AT_high_pc 49 Form: DW_FORM_addr 50 - Attribute: DW_AT_high_pc 51 Form: DW_FORM_addr 52 - Attribute: DW_AT_high_pc 53 Form: DW_FORM_addr 54 debug_info: 55 - Version: 4 56 AddrSize: 8 57 Entries: 58 - AbbrCode: 1 59 Values: 60 - Value: 0x4242424242424242 61 - Value: 0x4242424242424242 62 - Value: 0x4242424242424242 63 - Value: 0x4242424242424242 64 - Value: 0x4242424242424242 65 - Value: 0x4242424242424242 66 - Value: 0x4242424242424242 67 - Value: 0x4242424242424242 68Sections: 69 - Name: .rela.debug_info 70 Type: SHT_RELA 71 Flags: [ SHF_INFO_LINK ] 72 AddressAlign: 0x0000000000000008 73 Info: .debug_info 74 Relocations: 75 76 # AMDGCN: DW_AT_high_pc (0x0000000000000001) 77 - Offset: 0x000000000000000C # 0xC + 8*0 78 Type: R_AMDGPU_ABS64 79 Symbol: v1 80 Addend: 0x0 81 82 # AMDGCN-NEXT: DW_AT_high_pc (0x0000000000000043) 83 - Offset: 0x0000000000000014 # 0xC + 8*1 84 Type: R_AMDGPU_ABS64 85 Symbol: v1 86 Addend: 0x42 87 88 # AMDGCN-NEXT: DW_AT_high_pc (0xffffffffffffffff) 89 - Offset: 0x000000000000001C # 0xC + 8*2 90 Type: R_AMDGPU_ABS64 91 Symbol: v0 92 Addend: 0xffffffffffffffff 93 94 # AMDGCN-NEXT: DW_AT_high_pc (0xffffffffffffffff) 95 - Offset: 0x0000000000000024 # 0xC + 8*3 96 Type: R_AMDGPU_ABS64 97 Symbol: vffffffffffffffff 98 Addend: 0x0 99 100 # AMDGCN: DW_AT_high_pc (0x0000000000000001) 101 - Offset: 0x000000000000002C # 0xC + 8*4 102 Type: R_AMDGPU_ABS32 103 Symbol: v1 104 Addend: 0x0 105 106 # AMDGCN-NEXT: DW_AT_high_pc (0x0000000000000043) 107 - Offset: 0x0000000000000034 # 0xC + 8*5 108 Type: R_AMDGPU_ABS32 109 Symbol: v1 110 Addend: 0x42 111 112 # AMDGCN-NEXT: DW_AT_high_pc (0xffffffffffffffff) 113 - Offset: 0x000000000000003C # 0xC + 8*6 114 Type: R_AMDGPU_ABS32 115 Symbol: v0 116 Addend: 0xffffffffffffffff 117 118 # AMDGCN-NEXT: DW_AT_high_pc (0xffffffffffffffff) 119 - Offset: 0x0000000000000044 # 0xC + 8*7 120 Type: R_AMDGPU_ABS32 121 Symbol: vffffffffffffffff 122 Addend: 0x0 123 124Symbols: 125 - Name: v0 126 Type: STT_SECTION 127 Section: .debug_info 128 Value: 0x0 129 - Name: v1 130 Type: STT_SECTION 131 Section: .debug_info 132 Value: 0x1 133 - Name: vffffffffffffffff 134 Type: STT_SECTION 135 Section: .debug_info 136 Value: 0xffffffffffffffff 137... 138 139# R600: -: file format elf32-amdgpu 140 141--- !ELF 142FileHeader: 143 Class: ELFCLASS32 144 Data: ELFDATA2LSB 145 Type: ET_REL 146 Machine: EM_AMDGPU 147 Flags: [[[MACH]]] 148DWARF: 149 debug_abbrev: 150 - Table: 151 - Code: 0x00000001 152 Tag: DW_TAG_compile_unit 153 Children: DW_CHILDREN_no 154 Attributes: 155 - Attribute: DW_AT_high_pc 156 Form: DW_FORM_addr 157 - Attribute: DW_AT_high_pc 158 Form: DW_FORM_addr 159 - Attribute: DW_AT_high_pc 160 Form: DW_FORM_addr 161 - Attribute: DW_AT_high_pc 162 Form: DW_FORM_addr 163 debug_info: 164 - Version: 4 165 AddrSize: 4 166 Entries: 167 - AbbrCode: 1 168 Values: 169 - Value: 0x42424242 170 - Value: 0x42424242 171 - Value: 0x42424242 172 - Value: 0x42424242 173Sections: 174 - Name: .rela.debug_info 175 Type: SHT_RELA 176 Flags: [ SHF_INFO_LINK ] 177 AddressAlign: 0x0000000000000001 178 Info: .debug_info 179 Relocations: 180 181 ## FIXME: Is R_AMDGPU_ABS64 meaningful here? 182 183 # R600: DW_AT_high_pc (0x00000001) 184 - Offset: 0x0000000C # 0xC + 4*0 185 Type: R_AMDGPU_ABS32 186 Symbol: v1 187 Addend: 0x0 188 189 # R600-NEXT: DW_AT_high_pc (0x00000043) 190 - Offset: 0x00000010 # 0xC + 4*1 191 Type: R_AMDGPU_ABS32 192 Symbol: v1 193 Addend: 0x42 194 195 ## FIXME: Why is this field printed as sign-extended 64-bit in a 32-bit executable? 196 # R600-NEXT: DW_AT_high_pc (0xffffffffffffffff) 197 - Offset: 0x00000014 # 0xC + 4*2 198 Type: R_AMDGPU_ABS32 199 Symbol: v0 200 Addend: 0xffffffff 201 202 # R600-NEXT: DW_AT_high_pc (0xffffffff) 203 - Offset: 0x00000018 # 0xC + 4*3 204 Type: R_AMDGPU_ABS32 205 Symbol: vffffffff 206 Addend: 0x0 207 208Symbols: 209 - Name: v0 210 Type: STT_SECTION 211 Section: .debug_info 212 Value: 0x0 213 - Name: v1 214 Type: STT_SECTION 215 Section: .debug_info 216 Value: 0x1 217 - Name: vffffffff 218 Type: STT_SECTION 219 Section: .debug_info 220 Value: 0xffffffff 221... 222