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/freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx51-digi-connectcore-som.dtsi15 reg = <0x90000000 0x08000000>;
21 pinctrl-0 = <&pinctrl_ecspi1>;
25 pmic: mc13892@0 {
27 pinctrl-0 = <&pinctrl_mc13892>;
31 reg = <0>;
130 pinctrl-0 = <&pinctrl_esdhc1>;
137 pinctrl-0 = <&pinctrl_esdhc2>;
150 pinctrl-0 = <&pinctrl_fec>;
158 pinctrl-0 = <&pinctrl_i2c2>;
167 pinctrl-0 = <&pinctrl_mma7455l>;
[all …]
H A Dimx53-ard.dts17 reg = <0x70000000 0x40000000>;
24 reg = <0xf4000000 0x3ff0000>;
29 reg = <0xf4000000 0x2000000>;
32 interrupts = <31 0x8>;
59 gpios = <&gpio5 10 0>;
66 gpios = <&gpio5 11 0>;
73 gpios = <&gpio5 12 0>;
80 gpios = <&gpio5 13 0>;
86 gpios = <&gpio4 0 0>;
94 pinctrl-0 = <&pinctrl_esdhc1>;
[all …]
H A Dimx53-mba53.dts20 pwms = <&pwm2 0 50000 0>;
21 brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>;
23 enable-gpios = <&gpio7 7 0>;
30 pinctrl-0 = <&pinctrl_disp1_1>;
44 gpio = <&gpio2 5 0>;
73 pinctrl-0 = <&pinctrl_lvds1_1>;
81 MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000
82 MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x8000000
[all...]
H A Dimx53-tqma53.dtsi15 reg = <0x70000000 0x40000000>; /* Up to 1GiB */
29 pinctrl-0 = <&pinctrl_esdhc2>,
39 pinctrl-0 = <&pinctrl_uart3>;
45 pinctrl-0 = <&pinctrl_ecspi1>;
53 pinctrl-0 = <&pinctrl_esdhc3>;
62 pinctrl-0 = <&pinctrl_hog>;
67 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 /* SSI_MCLK */
68 MX53_PAD_PATA_DA_1__GPIO7_7 0x8000000
[all...]
H A Dimx35-eukrea-cpuimx35.dtsi14 reg = <0x80000000 0x8000000>; /* 128M */
20 pinctrl-0 = <&pinctrl_fec>;
26 pinctrl-0 = <&pinctrl_i2c1>;
31 reg = <0x51>;
36 gpios = <&gpio3 2 0>;
38 interrupts = <0x2 0x8>;
40 pinctrl-0 = <&pinctrl_tsc2007_1>;
41 reg = <0x48>;
50 MX35_PAD_FEC_TX_CLK__FEC_TX_CLK 0x80000000
51 MX35_PAD_FEC_RX_CLK__FEC_RX_CLK 0x80000000
[all …]
H A Dimx51-eukrea-cpuimx51.dtsi14 reg = <0x90000000 0x10000000>; /* 256M */
20 pinctrl-0 = <&pinctrl_fec>;
26 pinctrl-0 = <&pinctrl_i2c1>;
31 reg = <0x51>;
36 gpios = <&gpio4 0 1>;
38 interrupts = <0x0 0x8>;
40 pinctrl-0 = <&pinctrl_tsc2007_1>;
41 reg = <0x49>;
50 MX51_PAD_GPIO_NAND__GPIO_NAND 0x1f5
51 MX51_PAD_NANDF_D8__GPIO4_0 0x1f5
[all …]
H A Dimx25-pdk.dts16 reg = <0x80000000 0x4000000>;
19 reg_fec_3v3: regulator-0 {
24 gpio = <&gpio2 3 0>;
47 gpio = <&gpio4 6 0>;
67 fsl,pcr = <0xfa208b80>;
88 pinctrl-0 = <&pinctrl_audmux>;
94 pinctrl-0 = <&pinctrl_can1>;
101 pinctrl-0 = <&pinctrl_esdhc1>;
103 wp-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
110 pinctrl-0 = <&pinctrl_fec>;
[all …]
H A Dimx51-apf51.dts20 reg = <0x90000000 0x20000000>;
32 pinctrl-0 = <&pinctrl_fec>;
34 phy-reset-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
43 MX51_PAD_DI_GP3__FEC_TX_ER 0x80000000
44 MX51_PAD_DI2_PIN4__FEC_CRS 0x80000000
45 MX51_PAD_DI2_PIN2__FEC_MDC 0x80000000
46 MX51_PAD_DI2_PIN3__FEC_MDIO 0x80000000
47 MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 0x80000000
48 MX51_PAD_DI_GP4__FEC_RDATA2 0x80000000
49 MX51_PAD_DISP2_DAT0__FEC_RDATA3 0x80000000
[all …]
H A Dimx53-m53evk.dts17 pinctrl-0 = <&pinctrl_ipu_disp1>;
44 pwms = <&pwm1 0 3000 0>;
45 brightness-levels = <0 4 8 16 32 64 128 255>;
53 pinctrl-0 = <&led_pin_gpio>;
57 gpios = <&gpio2 8 0>;
63 gpios = <&gpio2 9 0>;
73 gpio = <&gpio1 2 0>;
81 gpio = <&gpio1 4 0>;
103 pinctrl-0
[all...]
H A Dimx35-eukrea-mbimxsd35-baseboard.dts19 pinctrl-0 = <&pinctrl_bp1>;
33 pinctrl-0 = <&pinctrl_led1>;
53 pinctrl-0 = <&pinctrl_audmux>;
59 pinctrl-0 = <&pinctrl_esdhc1>;
67 reg = <0x1a>;
75 MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS 0x80000000
76 MX35_PAD_STXD4__AUDMUX_AUD4_TXD 0x80000000
77 MX35_PAD_SRXD4__AUDMUX_AUD4_RXD 0x80000000
78 MX35_PAD_SCK4__AUDMUX_AUD4_TXC 0x80000000
83 fsl,pins = <MX35_PAD_LD19__GPIO3_25 0x80000000>;
[all …]
H A Dimx53-smd.dts16 reg = <0x70000000 0x40000000>;
24 gpios = <&gpio2 14 0>;
30 gpios = <&gpio2 15 0>;
38 pinctrl-0 = <&pinctrl_esdhc1>;
46 pinctrl-0 = <&pinctrl_esdhc2>;
53 pinctrl-0 = <&pinctrl_uart3>;
60 pinctrl-0 = <&pinctrl_ecspi1>;
64 zigbee: mc1323@0 {
67 reg = <0>;
77 partition@0 {
[all …]
H A Dimx53-tx53.dtsi55 reg = <0x70000000 0>;
69 clock-frequency = <0>;
75 #clock-cells = <0>;
82 pinctrl-0 = <&pinctrl_gpio_key>;
95 pinctrl-0 = <&pinctrl_stk5led>;
124 pinctrl-0 = <&pinctrl_can_xcvr>;
134 pinctrl-0 = <&pinctrl_usbh1_vbus>;
145 pinctrl-0 = <&pinctrl_usbotg_vbus>;
167 pinctrl-0 = <&pinctrl_ssi1>;
173 pinctrl-0 = <&pinctrl_can1>;
[all …]
H A Dimx25-eukrea-cpuimx25.dtsi14 reg = <0x80000000 0x4000000>; /* 64M */
21 pinctrl-0 = <&pinctrl_fec>;
27 pinctrl-0 = <&pinctrl_i2c1>;
32 reg = <0x51>;
40 MX25_PAD_FEC_MDC__FEC_MDC 0x80000000
41 MX25_PAD_FEC_MDIO__FEC_MDIO 0x400001e0
42 MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000
43 MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000
44 MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
45 MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000
[all …]
H A Dimx53-voipac-dmm-668.dtsi14 reg = <0x70000000 0x20000000>,
15 <0xb0000000 0x20000000>;
31 gpio = <&gpio3 31 0>; /* PEN */
38 pinctrl-0 = <&pinctrl_hog>;
44 MX53_PAD_GPIO_16__GPIO7_11 0x80000000
46 MX53_PAD_GPIO_11__GPIO4_1 0x80000000
48 MX53_PAD_GPIO_12__GPIO4_2 0x80000000
54 MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000
55 MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000
56 MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000
[all …]
H A Dimx25-eukrea-mbimxsd25-baseboard.dts19 pinctrl-0 = <&pinctrl_gpiokeys>;
32 pinctrl-0 = <&pinctrl_gpioled>;
52 pinctrl-0 = <&pinctrl_audmux>;
58 pinctrl-0 = <&pinctrl_esdhc1>;
66 reg = <0x1a>;
74 MX25_PAD_KPP_COL3__AUD5_TXFS 0xe0
75 MX25_PAD_KPP_COL2__AUD5_TXC 0xe0
76 MX25_PAD_KPP_COL1__AUD5_RXD 0xe0
77 MX25_PAD_KPP_COL0__AUD5_TXD 0xe0
83 MX25_PAD_SD1_CMD__ESDHC1_CMD 0x400000c0
[all …]
H A Dimx6qdl-wandboard-revb1.dtsi10 pinctrl-0 = <&pinctrl_hog>;
15 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* uSDHC1 CD */
16 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 /* uSDHC3 CD */
17 MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x0f0b0 /* WL_REF_ON */
18 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x0f0b0 /* WL_RST_N */
19 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x000b0 /* WL_REG_ON */
20 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* WL_HOST_WAKE */
21 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* WL_WAKE */
22 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 /* RGMII_nRST */
23 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x80000000 /* BT_ON */
[all …]
H A Dimx6qdl-wandboard-revc1.dtsi10 pinctrl-0 = <&pinctrl_hog>;
15 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* uSDHC1 CD */
16 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 /* uSDHC3 CD */
17 MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x0f0b0 /* WIFI_ON (reset, active low) */
18 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x000b0 /* WL_REG_ON (unused) */
19 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* WL_HOST_WAKE, input */
20 MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x0f0b0 /* GPIO5_IO31 (Wifi Power Enable) */
21 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* WL_WAKE (unused) */
22 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x80000000 /* BT_ON */
23 MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x80000000 /* BT_WAKE */
[all …]
H A Dimx35-pdk.dts15 reg = <0x80000000 0x8000000>,
16 <0x90000000 0x8000000>;
22 pinctrl-0 = <&pinctrl_esdhc1>;
30 MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000
31 MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000
32 MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000
33 MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000
34 MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000
35 MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000
41 MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5
[all …]
H A Dimx53-qsb-common.dtsi15 reg = <0x70000000 0x20000000>,
16 <0xb0000000 0x20000000>;
21 pwms = <&pwm2 0 5000000 0>;
22 brightness-levels = <0 4 8 16 32 64 128 255>;
29 pinctrl-0 = <&pinctrl_ipu_disp0>;
32 #size-cells = <0>;
35 port@0 {
[all...]
H A Dimx53-voipac-bsb.dts25 pinctrl-0 = <&led_pin_gpio>;
29 gpios = <&gpio3 29 0>;
35 gpios = <&gpio2 31 0>;
43 pinctrl-0 = <&pinctrl_hog>;
49 MX53_PAD_EIM_D25__GPIO3_25 0x80000000
51 MX53_PAD_EIM_A19__GPIO2_19 0x80000000
57 MX53_PAD_EIM_D29__GPIO3_29 0x80000000
58 MX53_PAD_EIM_EB3__GPIO2_31 0x80000000
65 MX53_PAD_GPIO_9__KPP_COL_6 0xe8
66 MX53_PAD_GPIO_4__KPP_COL_7 0xe8
[all …]
H A Dimx25-karo-tx25.dts17 reg_fec_phy: regulator-0 {
22 gpio = <&gpio4 9 0>;
28 reg = <0x80000000 0x02000000 0x90000000 0x02000000>;
35 MX25_PAD_UART1_TXD__UART1_TXD 0x00000020
36 MX25_PAD_UART1_RXD__UART1_RXD 0x000000a0
37 MX25_PAD_UART1_CTS__UART1_CTS 0x00000060
38 MX25_PAD_UART1_RTS__UART1_RTS 0x000000e0
44 MX25_PAD_D11__GPIO_4_9 0x00000021 /* FEC PHY power on pin */
45 MX25_PAD_D13__GPIO_4_7 0x000000a1 /* FEC reset */
46 MX25_PAD_FEC_MDC__FEC_MDC 0x00000060
[all …]
/freebsd-src/sys/contrib/device-tree/src/powerpc/
H A Dicon.dts18 dcr-parent = <&{/cpus/cpu@0}>;
29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0x00000000>;
35 clock-frequency = <0>; /* Filled in by U-Boot */
36 timebase-frequency = <0>; /* Filled in by U-Boot */
49 reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */
55 cell-index = <0>;
56 dcr-reg = <0x0c0 0x009>;
57 #address-cells = <0>;
[all …]
H A Dkatmai.dts22 dcr-parent = <&{/cpus/cpu@0}>;
33 #size-cells = <0>;
35 cpu@0 {
38 reg = <0x00000000>;
39 clock-frequency = <0>; /* Filled in by zImage */
40 timebase-frequency = <0>; /* Filled in by zImage */
53 reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */
59 cell-index = <0>;
60 dcr-reg = <0x0c0 0x009>;
61 #address-cells = <0>;
[all …]
H A Dcurrituck.dts13 /memreserve/ 0x01f00000 0x00100000; // spin table
20 dcr-parent = <&{/cpus/cpu@0}>;
28 #size-cells = <0>;
30 cpu@0 {
33 reg = <0>;
58 cpu-release-addr = <0x0 0x01f00000>;
64 reg = <0x0 0x0 0x0 0x0>; // filled in by zImage
70 dcr-reg = <0xffc00000 0x00040000>;
71 #address-cells = <0>;
72 #size-cells = <0>;
[all …]
/freebsd-src/sys/contrib/ncsw/Peripherals/FM/Pcd/
H A Dfm_plcr.h49 #define FM_PCD_PLCR_PAR_GO 0x80000000
50 #define FM_PCD_PLCR_PAR_PWSEL_MASK 0x0000FFFF
51 #define FM_PCD_PLCR_PAR_R 0x40000000
57 #define FM_PCD_PLCR_PEMODE_PI 0x80000000
58 #define FM_PCD_PLCR_PEMODE_CBLND 0x40000000
59 #define FM_PCD_PLCR_PEMODE_ALG_MASK 0x30000000
60 #define FM_PCD_PLCR_PEMODE_ALG_RFC2698 0x10000000
61 #define FM_PCD_PLCR_PEMODE_ALG_RFC4115 0x20000000
62 #define FM_PCD_PLCR_PEMODE_DEFC_MASK 0x0C000000
63 #define FM_PCD_PLCR_PEMODE_DEFC_Y 0x04000000
[all …]

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