| /openbsd-src/sys/dev/pci/drm/radeon/ |
| H A D | kv_dpm.c | 377 u32 index, u32 sclk) in kv_set_divider_value()
1878 u32 sclk, u32 min_sclk_in_sr) in kv_get_sleep_divider_id_from_clock()
1942 u32 sclk, mclk = 0; in kv_apply_state_adjust_rules() local
2414 u32 sclk; in kv_parse_pplib_clock_info() local
2506 u32 sclk; in kv_parse_power_table() local
2605 u32 sclk, tmp; in kv_dpm_debugfs_print_current_performance_level() local
2628 u32 sclk; in kv_dpm_get_current_sclk() local
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| H A D | rs690.c | 269 fixed20_12 sclk; member
281 fixed20_12 sclk, core_bandwidth, max_bandwidth; in rs690_crtc_bandwidth_compute() local
[all...] |
| H A D | rs780_dpm.c | 752 u32 sclk; in rs780_parse_pplib_clock_info() local
991 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_debugfs_print_current_performance_level() local
1013 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_get_current_sclk() local
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| H A D | rv515.c | 920 fixed20_12 sclk; member
932 fixed20_12 sclk; in rv515_crtc_bandwidth_compute() local
[all...] |
| H A D | radeon_clocks.c | 47 uint32_t fb_div, ref_div, post_div, sclk; in radeon_legacy_get_engine_clock() local
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| H A D | ci_dpm.c | 777 u32 sclk, mclk; in ci_apply_state_adjust_rules() local
2342 u32 sclk, in ci_populate_phase_value_based_on_sclk()
2414 u32 sclk, u32 min_sclk_in_sr) in ci_get_sleep_divider_id_from_clock()
2484 u32 sclk, in ci_populate_memory_timing_parameters()
3122 SMU7_Discrete_GraphicsLevel *sclk) in ci_calculate_sclk_params()
3822 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_find_dpm_states_clocks_in_dpm_table() local
3863 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_populate_and_upload_sclk_mclk_dpm_levels() local
5585 u32 sclk, mclk; in ci_parse_power_table() local
5919 u32 sclk = ci_get_average_sclk_freq(rdev); in ci_dpm_debugfs_print_current_performance_level() local
5948 u32 sclk = ci_get_average_sclk_freq(rdev); in ci_dpm_get_current_sclk() local
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| H A D | trinity_dpm.c | 540 u32 index, u32 sclk) in trinity_set_divider_value()
1290 static u8 trinity_calculate_vce_wm(struct radeon_device *rdev, u32 sclk) in trinity_calculate_vce_wm()
1314 u32 sclk, u32 min_sclk_in_sr) in trinity_get_sleep_divider_id_from_clock()
1670 u32 sclk; in trinity_parse_pplib_clock_info() local
1764 u32 sclk; in trinity_parse_power_table() local
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| H A D | rv740_dpm.c | 120 RV770_SMC_SCLK_VALUE *sclk) in rv740_populate_sclk_value()
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| H A D | rv730_dpm.c | 39 RV770_SMC_SCLK_VALUE *sclk) in rv730_populate_sclk_value()
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| H A D | rv6xx_dpm.h | 80 u32 sclk; member
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| H A D | radeon_pm.c | 174 u32 sclk, mclk; in radeon_set_power_state() local
731 u32 sclk = 0; radeon_hwmon_show_sclk() local
[all...] |
| H A D | si_dpm.c | 2833 u32 sclk = 0; in si_init_smc_spll_table() local
2953 u32 mclk, sclk; in si_apply_state_adjust_rules() local
4190 u16 voltage, u32 sclk, u32 mclk, in si_populate_phase_shedding_value()
4765 SISLANDS_SMC_SCLK_VALUE *sclk) in si_calculate_sclk_params()
4835 SISLANDS_SMC_SCLK_VALUE *sclk) in si_populate_sclk_value()
6865 u32 sclk, mclk; in si_parse_power_table() local
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| H A D | trinity_dpm.h | 31 u32 sclk; member
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| H A D | btc_dpm.c | 1242 u32 *sclk, u32 *mclk) in btc_skip_blacklist_clocks()
2099 u32 mclk, sclk; in btc_apply_state_adjust_rules() local
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| H A D | rv770_smc.h | 108 RV770_SMC_SCLK_VALUE sclk; member
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| H A D | radeon_i2c.c | 332 u32 sclk = rdev->pm.current_sclk; in radeon_get_i2c_prescale() local
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| /openbsd-src/sys/dev/pci/drm/amd/pm/legacy-dpm/ |
| H A D | amdgpu_kv_dpm.c | 652 u32 index, u32 sclk) in kv_set_divider_value()
2140 u32 sclk, u32 min_sclk_in_sr) in kv_get_sleep_divider_id_from_clock()
2203 u32 sclk, mclk = 0; in kv_apply_state_adjust_rules() local
2678 u32 sclk; in kv_parse_pplib_clock_info() local
2768 u32 sclk; in kv_parse_power_table() local
2863 u32 sclk, tmp; in kv_dpm_debugfs_print_current_performance_level() local
3261 uint32_t sclk; in kv_dpm_read_sensor() local
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| H A D | amdgpu_si_dpm.c | 2949 u32 sclk = 0; in si_init_smc_spll_table() local
3429 u32 mclk, sclk; in si_apply_state_adjust_rules() local
4667 u16 voltage, u32 sclk, u32 mclk, in si_populate_phase_shedding_value()
5267 SISLANDS_SMC_SCLK_VALUE *sclk) in si_calculate_sclk_params()
5337 SISLANDS_SMC_SCLK_VALUE *sclk) in si_populate_sclk_value()
7335 u32 sclk, mclk; in si_parse_power_table() local
8013 uint32_t sclk, mclk; in si_dpm_read_sensor() local
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| /openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu_helper.c | 462 uint16_t virtual_voltage_id, int32_t *sclk) in phm_get_sclk_for_voltage_evv()
583 uint32_t sclk, uint16_t id, uint16_t *voltage) in phm_get_voltage_evv_on_sclk()
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| H A D | ppatomctrl.c | 682 atomctrl_calculate_voltage_evv_on_sclk(struct pp_hwmgr * hwmgr,uint8_t voltage_type,uint32_t sclk,uint16_t virtual_voltage_Id,uint16_t * voltage,uint16_t dpm_level,bool debug) atomctrl_calculate_voltage_evv_on_sclk() argument
1119 atomctrl_get_voltage_evv_on_sclk(struct pp_hwmgr * hwmgr,uint8_t voltage_type,uint32_t sclk,uint16_t virtual_voltage_Id,uint16_t * voltage) atomctrl_get_voltage_evv_on_sclk() argument
1389 atomctrl_get_voltage_evv_on_sclk_ai(struct pp_hwmgr * hwmgr,uint8_t voltage_type,uint32_t sclk,uint16_t virtual_voltage_Id,uint32_t * voltage) atomctrl_get_voltage_evv_on_sclk_ai() argument
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| H A D | smu7_hwmgr.c | 2052 uint32_t sclk = 0; in smu7_get_evv_voltages() local
3321 uint32_t sclk; smu7_apply_state_adjust_rules() local
3999 uint32_t sclk, mclk, activity_percent; smu7_read_sensor() local
4085 uint32_t sclk = smu7_ps->performance_levels smu7_find_dpm_states_clocks_in_dpm_table() local
4135 uint32_t sclk, max_sclk = 0; smu7_get_maximum_link_speed() local
[all...] |
| /openbsd-src/sys/dev/pci/drm/amd/pm/swsmu/smu11/ |
| H A D | cyan_skillfish_ppt.c | 57 uint32_t sclk; member
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| /openbsd-src/sys/dev/pci/drm/amd/display/dc/dml/calcs/ |
| H A D | dce_calcs.c | 102 struct bw_fixed *sclk; in calculate_bandwidth() local
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| /openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/smumgr/ |
| H A D | iceland_smumgr.c | 796 uint32_t engine_clock, SMU71_Discrete_GraphicsLevel *sclk) in iceland_calculate_sclk_params()
875 uint32_t sclk, uint32_t *p_shed) in iceland_populate_phase_value_based_on_sclk()
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| /openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/inc/ |
| H A D | power_state.h | 177 unsigned long sclk; member
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