Home
last modified time | relevance | path

Searched defs:reg_name (Results 1 – 25 of 271) sorted by relevance

1234567891011

/openbsd-src/sys/dev/pci/drm/amd/display/dmub/src/
H A Ddmub_reg.h37 #define REG_OFFSET(reg_name) (BASE(mm##reg_name##_BASE_IDX) + mm##reg_name) argument
39 #define FD_SHIFT(reg_name, field) reg_name##__##field##__SHIFT argument
41 #define FD_MASK(reg_name, field) reg_name##__##field##_MASK argument
47 #define FN(reg_name, field) FD(reg_name##__##field) argument
58 #define REG_SET_N(reg_name, n, initial_val, ...) \ argument
61 #define REG_SET(reg_name, initial_val, field, val) \ argument
85 #define REG_UPDATE_N(reg_name, n, ...)\ argument
88 #define REG_UPDATE(reg_name, field, val) \ argument
112 #define REG_GET(reg_name, field, val) \ argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/gpio/dcn20/
H A Dhw_factory_dcn20.c59 #define REG(reg_name)\ argument
62 #define SF_HPD(reg_name, field_name, post_fix)\ argument
65 #define REGI(reg_name, block, id)\ argument
69 #define SF(reg_name, field_name, post_fix)\ argument
102 #define SF_DDC(reg_name, field_name, post_fix)\ argument
158 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/gpio/dcn32/
H A Dhw_factory_dcn32.c59 #define REG(reg_name)\ argument
62 #define SF_HPD(reg_name, field_name, post_fix)\ argument
65 #define REGI(reg_name, block, id)\ argument
69 #define SF(reg_name, field_name, post_fix)\ argument
101 #define SF_DDC(reg_name, field_name, post_fix)\ argument
169 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/gpio/dcn21/
H A Dhw_factory_dcn21.c57 #define REG(reg_name)\ argument
60 #define SF_HPD(reg_name, field_name, post_fix)\ argument
63 #define REGI(reg_name, block, id)\ argument
67 #define SF(reg_name, field_name, post_fix)\ argument
99 #define SF_DDC(reg_name, field_name, post_fix)\ argument
139 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/gpio/dcn30/
H A Dhw_factory_dcn30.c68 #define REG(reg_name)\ argument
71 #define SF_HPD(reg_name, field_name, post_fix)\ argument
74 #define REGI(reg_name, block, id)\ argument
78 #define SF(reg_name, field_name, post_fix)\ argument
111 #define SF_DDC(reg_name, field_name, post_fix)\ argument
167 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/gpio/dcn315/
H A Dhw_factory_dcn315.c63 #define REG(reg_name)\ argument
66 #define SF_HPD(reg_name, field_name, post_fix)\ argument
69 #define REGI(reg_name, block, id)\ argument
73 #define SF(reg_name, field_name, post_fix)\ argument
105 #define SF_DDC(reg_name, field_name, post_fix)\ argument
157 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/gpio/dce120/
H A Dhw_factory_dce120.c46 #define SF_HPD(reg_name, field_name, post_fix)\ argument
50 #define SF_HPD(reg_name, field_name, post_fix)\ argument
60 #define REG(reg_name)\ argument
63 #define REGI(reg_name, block, id)\ argument
96 #define SF_DDC(reg_name, field_name, post_fix)\ argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/gpio/dcn10/
H A Dhw_factory_dcn10.c47 #define SF_HPD(reg_name, field_name, post_fix)\ argument
57 #define REG(reg_name)\ argument
60 #define REGI(reg_name, block, id)\ argument
92 #define SF_DDC(reg_name, field_name, post_fix)\ argument
128 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn321/
H A Ddcn321_resource.c115 #define SR(reg_name)\ argument
118 #define SR_ARR(reg_name, id)\ argument
121 #define SR_ARR_INIT(reg_name, id, value)\ argument
124 SRI(reg_name,block,id) global() argument
128 SRI_ARR(reg_name,block,id) global() argument
132 SR_ARR_I2C(reg_name,id) global() argument
135 SRI_ARR_I2C(reg_name,block,id) global() argument
139 SRI_ARR_ALPHABET(reg_name,block,index,id) global() argument
143 SRI2(reg_name,block,id) global() argument
146 SRI2_ARR(reg_name,block,id) global() argument
150 SRIR(var_name,reg_name,block,id) global() argument
154 SRII(reg_name,block,id) global() argument
158 SRII_ARR_2(reg_name,block,id,inst) global() argument
162 SRII_MPC_RMU(reg_name,block,id) global() argument
166 SRII_DWB(reg_name,temp_name,block,id) global() argument
170 DCCG_SRII(reg_name,block,id) global() argument
174 SF_DWB2(reg_name,block,id,field_name,post_fix) global() argument
177 VUPDATE_SRII(reg_name,block,id) global() argument
187 NBIO_SR(reg_name) global() argument
190 NBIO_SR_ARR(reg_name,id) global() argument
195 REG(reg_name) global() argument
[all...]
H A Ddcn321_dio_link_encoder.c51 #define FN(reg_name, field_name) \ argument
57 #define AUX_REG_READ(reg_name) \ argument
60 #define AUX_REG_WRITE(reg_name, val) \ argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/gpio/dce110/
H A Dhw_factory_dce110.c42 #define SF_HPD(reg_name, field_name, post_fix)\ argument
45 #define REG(reg_name)\ argument
48 #define REGI(reg_name, block, id)\ argument
79 #define SF_DDC(reg_name, field_name, post_fix)\ argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/
H A Ddm_services.h96 #define get_reg_field_value(reg_value, reg_name, reg_field)\ argument
112 #define set_reg_field_value(reg_value, value, reg_name, reg_field)\ argument
157 #define generic_reg_update_soc15(ctx, inst_offset, reg_name, n, ...)\ argument
161 #define generic_reg_set_soc15(ctx, inst_offset, reg_name, n, ...)\ argument
165 #define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\ argument
171 #define set_reg_field_value_soc15(reg_value, value, block, reg_num, reg_name, reg_field)\ argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn301/
H A Ddcn301_resource.c114 #define SR(reg_name)\ argument
118 #define SRI(reg_name, block, id)\ argument
122 #define SRI2(reg_name, block, id)\ argument
126 #define SRIR(var_name, reg_name, block, id)\ argument
130 #define SRII(reg_name, block, id)\ argument
139 #define SRII_MPC_RMU(reg_name, block, id)\ argument
143 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
147 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
150 #define DCCG_SRII(reg_name, block, id)\ argument
154 #define VUPDATE_SRII(reg_name, block, id)\ argument
[all …]
/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn32/
H A Ddcn32_resource.c112 #define SR(reg_name)\ argument
115 #define SR_ARR(reg_name, id) \ argument
118 #define SR_ARR_INIT(reg_name, id, value) \ argument
121 SRI(reg_name,block,id) global() argument
125 SRI_ARR(reg_name,block,id) global() argument
129 SR_ARR_I2C(reg_name,id) global() argument
132 SRI_ARR_I2C(reg_name,block,id) global() argument
136 SRI_ARR_ALPHABET(reg_name,block,index,id) global() argument
140 SRI2(reg_name,block,id) global() argument
143 SRI2_ARR(reg_name,block,id) global() argument
147 SRIR(var_name,reg_name,block,id) global() argument
151 SRII(reg_name,block,id) global() argument
155 SRII_ARR_2(reg_name,block,id,inst) global() argument
159 SRII_MPC_RMU(reg_name,block,id) global() argument
163 SRII_DWB(reg_name,temp_name,block,id) global() argument
167 SF_DWB2(reg_name,block,id,field_name,post_fix) global() argument
170 DCCG_SRII(reg_name,block,id) global() argument
174 VUPDATE_SRII(reg_name,block,id) global() argument
184 NBIO_SR(reg_name) global() argument
187 NBIO_SR_ARR(reg_name,id) global() argument
193 REG(reg_name) global() argument
[all...]
H A Ddcn32_dio_link_encoder.c52 #define FN(reg_name, field_name) \ argument
58 #define AUX_REG_READ(reg_name) \ argument
61 #define AUX_REG_WRITE(reg_name, val) \ argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn30/
H A Ddcn30_dio_link_encoder.c46 #define FN(reg_name, field_name) \ argument
213 #define AUX_REG_READ(reg_name) \ argument
216 #define AUX_REG_WRITE(reg_name, val) \ argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn302/
H A Ddcn302_resource.c164 #define NBIO_SR(reg_name)\ argument
173 #define SR(reg_name)\ argument
176 #define SF(reg_name, field_name, post_fix)\ argument
179 #define SRI(reg_name, block, id)\ argument
182 #define SRI2(reg_name, block, id)\ argument
185 #define SRII(reg_name, block, id)\ argument
189 #define DCCG_SRII(reg_name, block, id)\ argument
193 #define VUPDATE_SRII(reg_name, block, id)\ argument
197 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
201 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
[all …]
/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn303/
H A Ddcn303_resource.c142 #define NBIO_SR(reg_name)\ argument
151 #define SR(reg_name)\ argument
154 #define SF(reg_name, field_name, post_fix)\ argument
157 #define SRI(reg_name, block, id)\ argument
160 #define SRI2(reg_name, block, id)\ argument
163 #define SRII(reg_name, block, id)\ argument
167 #define DCCG_SRII(reg_name, block, id)\ argument
171 #define VUPDATE_SRII(reg_name, block, id)\ argument
175 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
179 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
[all …]
/openbsd-src/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr_clk.c43 #define CLK_REG(reg_name, block, inst)\ argument
47 #define REG(reg_name) \ argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/dce/
H A Ddce_panel_cntl.h32 #define DCE_PANEL_CNTL_SR(reg_name, block)\ argument
45 #define DCN_PANEL_CNTL_SR(reg_name, block)\ argument
59 #define DCE_PANEL_CNTL_SF(reg_name, field_name, post_fix)\ argument
/openbsd-src/gnu/llvm/lldb/examples/python/
H A Darmv7_cortex_m_target_defintion.py77 def get_reg_num (reg_num_dict, reg_name): argument
82 def get_reg_num (reg_num_dict, reg_name): argument
H A Dx86_64_target_definition.py191 def get_reg_num(reg_num_dict, reg_name): argument
197 def get_reg_num(reg_num_dict, reg_name): argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn201/
H A Ddcn201_resource.c251 #define SR(reg_name)\ argument
255 #define SRI(reg_name, block, id)\ argument
259 #define SRIR(var_name, reg_name, block, id)\ argument
263 #define SRII(reg_name, block, id)\ argument
267 #define SRI_IX(reg_name, block, id)\ argument
270 #define DCCG_SRII(reg_name, block, id)\ argument
274 #define VUPDATE_SRII(reg_name, block, id)\ argument
285 #define NBIO_SR(reg_name)\ argument
296 #define MMHUB_SR(reg_name)\ argument
/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn314/
H A Ddcn314_resource.c143 #define SR(reg_name)\ argument
147 #define SRI(reg_name, block, id)\ argument
151 #define SRI2(reg_name, block, id)\ argument
155 SRIR(var_name,reg_name,block,id) global() argument
159 SRII(reg_name,block,id) global() argument
163 SRII_MPC_RMU(reg_name,block,id) global() argument
167 SRII_DWB(reg_name,temp_name,block,id) global() argument
171 SF_DWB2(reg_name,block,id,field_name,post_fix) global() argument
174 DCCG_SRII(reg_name,block,id) global() argument
178 VUPDATE_SRII(reg_name,block,id) global() argument
189 NBIO_SR(reg_name) global() argument
200 MMHUB_SR(reg_name) global() argument
211 CLK_SRI(reg_name,block,inst) global() argument
[all...]
/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn31/
H A Ddcn31_resource.c127 #define SR(reg_name)\ argument
131 #define SRI(reg_name, block, id)\ argument
135 #define SRI2(reg_name, block, id)\ argument
139 SRIR(var_name,reg_name,block,id) global() argument
143 SRII(reg_name,block,id) global() argument
147 SRII_MPC_RMU(reg_name,block,id) global() argument
151 SRII_DWB(reg_name,temp_name,block,id) global() argument
155 SF_DWB2(reg_name,block,id,field_name,post_fix) global() argument
158 DCCG_SRII(reg_name,block,id) global() argument
162 VUPDATE_SRII(reg_name,block,id) global() argument
173 NBIO_SR(reg_name) global() argument
184 MMHUB_SR(reg_name) global() argument
195 CLK_SRI(reg_name,block,inst) global() argument
[all...]

1234567891011