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Searched defs:reg_name (Results 1 – 25 of 78) sorted by relevance

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/dflybsd-src/sys/dev/drm/amd/display/dc/gpio/dce120/
H A Dhw_factory_dce120.c46 #define SF_HPD(reg_name, field_name, post_fix)\ argument
50 #define SF_HPD(reg_name, field_name, post_fix)\ argument
60 #define REG(reg_name)\ argument
63 #define REGI(reg_name, block, id)\ argument
96 #define SF_DDC(reg_name, field_name, post_fix)\ argument
H A Dhw_translate_dce120.c51 #define REG(reg_name)\ argument
54 #define REGI(reg_name, block, id)\ argument
/dflybsd-src/sys/dev/drm/amd/display/dc/gpio/dce110/
H A Dhw_factory_dce110.c36 #define SF_HPD(reg_name, field_name, post_fix)\ argument
39 #define REG(reg_name)\ argument
42 #define REGI(reg_name, block, id)\ argument
77 #define SF_DDC(reg_name, field_name, post_fix)\ argument
/dflybsd-src/sys/dev/drm/amd/display/dc/gpio/dcn10/
H A Dhw_factory_dcn10.c46 #define SF_HPD(reg_name, field_name, post_fix)\ argument
56 #define REG(reg_name)\ argument
59 #define REGI(reg_name, block, id)\ argument
91 #define SF_DDC(reg_name, field_name, post_fix)\ argument
H A Dhw_translate_dcn10.c51 #define REG(reg_name)\ argument
54 #define REGI(reg_name, block, id)\ argument
/dflybsd-src/sys/dev/drm/amd/display/dc/
H A Ddm_services.h120 #define get_reg_field_value(reg_value, reg_name, reg_field)\ argument
136 #define set_reg_field_value(reg_value, value, reg_name, reg_field)\ argument
169 #define generic_reg_update_soc15(ctx, inst_offset, reg_name, n, ...)\ argument
174 #define generic_reg_set_soc15(ctx, inst_offset, reg_name, n, ...)\ argument
178 #define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\ argument
184 #define set_reg_field_value_soc15(reg_value, value, block, reg_num, reg_name, reg_field)\ argument
/dflybsd-src/sys/dev/drm/amd/display/dc/i2caux/dce100/
H A Di2caux_dce100.c45 #define SR(reg_name)\ argument
49 #define SRI(reg_name, block, id)\ argument
/dflybsd-src/sys/dev/drm/amd/display/dc/i2caux/dce112/
H A Di2caux_dce112.c46 #define SR(reg_name)\ argument
50 #define SRI(reg_name, block, id)\ argument
/dflybsd-src/sys/dev/drm/amd/display/dc/i2caux/dcn10/
H A Di2caux_dcn10.c56 #define SR(reg_name)\ argument
60 #define SRI(reg_name, block, id)\ argument
/dflybsd-src/sys/dev/drm/amd/display/dc/i2caux/dce120/
H A Di2caux_dce120.c56 #define SR(reg_name)\ argument
60 #define SRI(reg_name, block, id)\ argument
/dflybsd-src/sys/dev/drm/amd/display/dc/inc/
H A Dreg_helper.h39 #define REG_READ(reg_name) \ argument
42 #define REG_WRITE(reg_name, value) \ argument
54 #define REG_SET_N(reg_name, n, initial_val, ...) \ argument
60 #define FN(reg_name, field) \ argument
63 #define REG_SET(reg_name, initial_val, field, val) \ argument
156 #define REG_GET(reg_name, field, val) \ argument
160 #define REG_GET_2(reg_name, f1, v1, f2, v2) \ argument
165 #define REG_GET_3(reg_name, f1, v1, f2, v2, f3, v3) \ argument
171 #define REG_GET_4(reg_name, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
178 #define REG_GET_5(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5) \ argument
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/dflybsd-src/sys/dev/drm/amd/display/dc/dcn10/
H A Ddcn10_link_encoder.c46 #define FN(reg_name, field_name) \ argument
1301 #define HPD_REG_READ(reg_name) \ argument
1304 #define HPD_REG_UPDATE_N(reg_name, n, ...) \ argument
1310 #define HPD_REG_UPDATE(reg_name, field, val) \ argument
1334 #define AUX_REG_READ(reg_name) \ argument
1337 #define AUX_REG_UPDATE_N(reg_name, n, ...) \ argument
1343 #define AUX_REG_UPDATE(reg_name, field, val) \ argument
H A Ddcn10_dpp.h37 #define TF_SF(reg_name, field_name, post_fix)\ argument
41 #define TF2_SF(reg_name, field_name, post_fix)\ argument
H A Ddcn10_resource.c167 #define SR(reg_name)\ argument
171 #define SRI(reg_name, block, id)\ argument
176 #define SRII(reg_name, block, id)\ argument
187 #define NBIO_SR(reg_name)\ argument
198 #define MMHUB_SR(reg_name)\ argument
H A Ddcn10_ipp.c34 #define FN(reg_name, field_name) \ argument
H A Ddcn10_opp.h33 #define OPP_SF(reg_name, field_name, post_fix)\ argument
/dflybsd-src/sys/dev/drm/amd/display/dc/gpio/dce80/
H A Dhw_factory_dce80.c39 #define REG(reg_name)\ argument
81 #define SF_DDC(reg_name, field_name, post_fix)\ argument
/dflybsd-src/sys/dev/drm/amd/display/dc/i2caux/dce80/
H A Di2caux_dce80.c62 #define SR(reg_name)\ argument
66 #define SRI(reg_name, block, id)\ argument
/dflybsd-src/sys/dev/drm/amd/display/dc/i2caux/dce110/
H A Di2caux_dce110.c158 #define SR(reg_name)\ argument
162 #define SRI(reg_name, block, id)\ argument
H A Di2c_hw_engine_dce110.c93 #define REG(reg_name)\ argument
97 #define FN(reg_name, field_name) \ argument
/dflybsd-src/sys/dev/drm/amd/display/dc/dce/
H A Ddce_audio.c43 #define FN(reg_name, field_name) \ argument
49 #define AZ_REG_READ(reg_name) \ argument
52 #define AZ_REG_WRITE(reg_name, value) \ argument
/dflybsd-src/sys/dev/drm/amd/display/dc/bios/
H A Dbios_parser_helper.c54 #define FN(reg_name, field_name) \ argument
/dflybsd-src/sys/dev/drm/amd/display/dc/dce120/
H A Ddce120_hw_sequencer.c46 #define FN(reg_name, field_name) \ argument
H A Ddce120_resource.c132 #define SR(reg_name)\ argument
136 #define SRI(reg_name, block, id)\ argument
628 #define SRII(reg_name, block, id)\ argument
/dflybsd-src/sys/dev/drm/amd/display/dc/gpio/
H A Dhw_ddc.c37 #define FN(reg_name, field_name) \ argument

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