| /llvm-project/llvm/tools/llvm-rc/ |
| H A D | ResourceScriptStmt.cpp | 26 raw_ostream &OptionalStmtList::log(raw_ostream &OS) const { in log()
34 raw_ostream &LanguageResource::log(raw_ostream &OS) const { in log()
46 raw_ostream &AcceleratorsResource::log(raw_ostream &OS) const { in log()
59 raw_ostream &BitmapResource::log(raw_ostream &OS) const { in log()
63 raw_ostream &CursorResource::log(raw_ostream &OS) const { in log()
67 raw_ostream &IconResource::log(raw_ostream &OS) const { in log()
71 raw_ostream &HTMLResource::log(raw_ostream &OS) const { in log()
88 raw_ostream &MenuDefinitionList::log(raw_ostream &OS) const { in log()
95 raw_ostream &MenuItem::log(raw_ostream &OS) const { in log()
101 raw_ostream &MenuSeparator::log(raw_ostream &OS) const { in log()
[all …]
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| /llvm-project/llvm/utils/TableGen/Common/ |
| H A D | DAGISelMatcher.cpp | 22 void Matcher::print(raw_ostream &OS, indent Indent) const { in print() argument
28 void Matcher::printOne(raw_ostream &OS) const { printImpl(OS, indent(0)); } in printOne() argument
52 bool Matcher::canMoveBefore(const Matcher *Other) const { in canMoveBefore() argument
66 bool Matcher::canMoveBeforeNode(const Matcher *Other) const { in canMoveBeforeNode() argument
107 getOperandNo(unsigned i) const getOperandNo() argument
114 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
124 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
128 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
132 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
137 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
141 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
145 printImpl(raw_ostream & OS,unsigned Indent) const printImpl() argument
149 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
153 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
157 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
162 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
166 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
170 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
174 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
183 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
188 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
197 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
202 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
207 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
211 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
216 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
220 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
224 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
228 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
232 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
237 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
242 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
247 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
251 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
257 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
262 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
272 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
277 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
281 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
285 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
290 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
303 printImpl(raw_ostream & OS,unsigned indent) const printImpl() argument
309 isEqualImpl(const Matcher * M) const isEqualImpl() argument
316 isEqualImpl(const Matcher * m) const isEqualImpl() argument
349 isContradictoryImpl(const Matcher * M) const isContradictoryImpl() argument
373 isContradictoryImpl(const Matcher * M) const isContradictoryImpl() argument
379 isContradictoryImpl(const Matcher * M) const isContradictoryImpl() argument
391 isContradictoryImpl(const Matcher * M) const isContradictoryImpl() argument
397 isContradictoryImpl(const Matcher * M) const isContradictoryImpl() argument
410 isContradictoryImpl(const Matcher * M) const isContradictoryImpl() argument
416 isContradictoryImpl(const Matcher * M) const isContradictoryImpl() argument
421 isContradictoryImpl(const Matcher * M) const isContradictoryImpl() argument
426 isContradictoryImpl(const Matcher * M) const isContradictoryImpl() argument
432 isContradictoryImpl(const Matcher * M) const isContradictoryImpl() argument
[all...] |
| /llvm-project/clang/lib/StaticAnalyzer/Checkers/MPI-Checker/ |
| H A D | MPIFunctionClassifier.cpp | 203 bool MPIFunctionClassifier::isMPIType(const IdentifierInfo *IdentInfo) const { in isMPIType() argument
208 const IdentifierInfo *IdentInfo) const { in isNonBlockingType() argument
214 const IdentifierInfo *IdentInfo) const { in isPointToPointType() argument
220 const IdentifierInfo *IdentInfo) const { in isCollectiveType() argument
225 const IdentifierInfo *IdentInfo) const { in isCollToColl() argument
230 const IdentifierInfo *IdentInfo) const { in isScatterType() argument
236 const IdentifierInfo *IdentInfo) const { in isGatherType() argument
244 const IdentifierInfo *IdentInfo) const { in isAllgatherType() argument
250 const IdentifierInfo *IdentInfo) const { in isAlltoallType() argument
255 bool MPIFunctionClassifier::isBcastType(const IdentifierInfo *IdentInfo) const { in isBcastType() argument
[all …]
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| /llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DIE.cpp | 36 void DIEAbbrevData::Profile(FoldingSetNodeID &ID) const { in Profile()
51 void DIEAbbrev::Profile(FoldingSetNodeID &ID) const { in Profile()
62 void DIEAbbrev::Emit(const AsmPrinter *AP) const { in Emit() argument
101 void DIEAbbrev::print(raw_ostream &O) const { in print()
160 void DIEAbbrevSet::Emit(const AsmPrinter *AP, MCSection *Section) const { in Emit()
210 DIEValue DIE::findAttribute(dwarf::Attribute Attribute) const { in findAttribute()
236 void DIE::print(raw_ostream &O, unsigned IndentCount) const { in print()
315 void DIEValue::emitValue(const AsmPrinter *AP) const { in emitValue() argument
327 unsigned DIEValue::sizeOf(const dwarf::FormParams &FormParams) const { in sizeOf() argument
340 void DIEValue::print(raw_ostream &O) const { in print()
[all …]
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| H A D | AsmPrinterDwarf.cpp | 90 emitEncodingByte(unsigned Val,const char * Desc) const emitEncodingByte() argument
103 GetSizeOfEncodedValue(unsigned Encoding) const GetSizeOfEncodedValue() argument
133 emitDwarfSymbolReference(const MCSymbol * Label,bool ForceOffset) const emitDwarfSymbolReference() argument
155 emitDwarfStringOffset(DwarfStringPoolEntry S) const emitDwarfStringOffset() argument
166 emitDwarfOffset(const MCSymbol * Label,uint64_t Offset) const emitDwarfOffset() argument
170 emitDwarfLengthOrOffset(uint64_t Value) const emitDwarfLengthOrOffset() argument
176 emitDwarfUnitLength(uint64_t Length,const Twine & Comment) const emitDwarfUnitLength() argument
181 emitDwarfUnitLength(const Twine & Prefix,const Twine & Comment) const emitDwarfUnitLength() argument
186 emitCallSiteOffset(const MCSymbol * Hi,const MCSymbol * Lo,unsigned Encoding) const emitCallSiteOffset() argument
194 emitCallSiteValue(uint64_t Value,unsigned Encoding) const emitCallSiteValue() argument
206 emitCFIInstruction(const MCCFIInstruction & Inst) const emitCFIInstruction() argument
264 emitDwarfDIE(const DIE & Die) const emitDwarfDIE() argument
299 emitDwarfAbbrev(const DIEAbbrev & Abbrev) const emitDwarfAbbrev() argument
[all...] |
| /llvm-project/llvm/lib/Demangle/ |
| H A D | MicrosoftDemangleNodes.cpp | 120 std::string Node::toString(OutputFlags Flags) const { in toString() argument
129 void PrimitiveTypeNode::outputPre(OutputBuffer &OB, OutputFlags Flags) const { in outputPre() argument
156 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
161 output(OutputBuffer & OB,OutputFlags Flags,std::string_view Separator) const output() argument
173 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
193 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
200 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
222 outputTemplateParameters(OutputBuffer & OB,OutputFlags Flags) const outputTemplateParameters() argument
231 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
248 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
254 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
355 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
365 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
372 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
380 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
386 outputPre(OutputBuffer & OB,OutputFlags Flags) const outputPre() argument
418 outputPost(OutputBuffer & OB,OutputFlags Flags) const outputPost() argument
455 outputPre(OutputBuffer & OB,OutputFlags Flags) const outputPre() argument
461 outputPost(OutputBuffer & OB,OutputFlags Flags) const outputPost() argument
478 outputPre(OutputBuffer & OB,OutputFlags Flags) const outputPre() argument
524 outputPost(OutputBuffer & OB,OutputFlags Flags) const outputPost() argument
532 outputPre(OutputBuffer & OB,OutputFlags Flags) const outputPre() argument
546 outputPost(OutputBuffer & OB,OutputFlags Flags) const outputPost() argument
548 outputPre(OutputBuffer & OB,OutputFlags Flags) const outputPre() argument
554 outputOneDimension(OutputBuffer & OB,OutputFlags Flags,Node * N) const outputOneDimension() argument
562 outputDimensionsImpl(OutputBuffer & OB,OutputFlags Flags) const outputDimensionsImpl() argument
573 outputPost(OutputBuffer & OB,OutputFlags Flags) const outputPost() argument
581 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
585 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
592 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
623 outputPre(OutputBuffer & OB,OutputFlags Flags) const outputPre() argument
626 outputPost(OutputBuffer & OB,OutputFlags Flags) const outputPost() argument
628 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
633 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
641 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
646 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
650 output(OutputBuffer & OB,OutputFlags Flags) const output() argument
[all...] |
| /llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | CheckerDocumentation.cpp | 78 void checkPreStmt(const ReturnStmt *DS, CheckerContext &C) const {} in checkPreStmt()
97 void checkPreObjCMessage(const ObjCMethodCall &M, CheckerContext &C) const {} in checkPreObjCMessage()
103 void checkPostObjCMessage(const ObjCMethodCall &M, CheckerContext &C) const {} in checkPostObjCMessage()
112 void checkObjCMessageNil(const ObjCMethodCall &M, CheckerContext &C) const {} in checkObjCMessageNil()
124 void checkPreCall(const CallEvent &Call, CheckerContext &C) const {} in checkPreCall()
130 void checkPostCall(const CallEvent &Call, CheckerContext &C) const {} in checkPostCall()
133 void checkBranchCondition(const Stmt *Condition, CheckerContext &Ctx) const {} in checkBranchCondition()
146 void checkNewAllocator(const CXXAllocatorCall &, CheckerContext &) const {} in checkNewAllocator()
158 CheckerContext &) const {} in checkLocation()
167 void checkBind(SVal Loc, SVal Val, const Stmt *S, CheckerContext &) const {} in checkBind()
[all …]
|
| H A D | AnalysisOrderChecker.cpp | 44 StringRef CallbackName) const { in isCallbackEnabled()
49 bool isCallbackEnabled(CheckerContext &C, StringRef CallbackName) const { in isCallbackEnabled()
54 bool isCallbackEnabled(ProgramStateRef State, StringRef CallbackName) const { in isCallbackEnabled()
61 void checkPreStmt(const CastExpr *CE, CheckerContext &C) const { in checkPreStmt()
67 void checkPostStmt(const CastExpr *CE, CheckerContext &C) const { in checkPostStmt()
74 CheckerContext &C) const { in checkPreStmt()
80 CheckerContext &C) const { in checkPostStmt()
85 void checkPreStmt(const CXXNewExpr *NE, CheckerContext &C) const { in checkPreStmt()
90 void checkPostStmt(const CXXNewExpr *NE, CheckerContext &C) const { in checkPostStmt()
95 void checkPreStmt(const CXXDeleteExpr *NE, CheckerContext &C) const { in checkPreStmt()
[all …]
|
| /llvm-project/bolt/lib/Core/ |
| H A D | MCPlusBuilder.cpp | 40 CompFuncTy Comp) const { in equals()
56 CompFuncTy Comp) const { in equals()
84 CompFuncTy Comp) const { in equals()
128 CompFuncTy Comp) const { in equals()
132 bool MCPlusBuilder::isTerminator(const MCInst &Inst) const { in isTerminator() argument
137 void MCPlusBuilder::setTailCall(MCInst &Inst) const { in setTailCall()
142 bool MCPlusBuilder::isTailCall(const MCInst &Inst) const { in isTailCall() argument
150 std::optional<MCLandingPad> MCPlusBuilder::getEHInfo(const MCInst &Inst) const { in getEHInfo() argument
166 void MCPlusBuilder::addEHInfo(MCInst &Inst, const MCLandingPad &LP) const { in addEHInfo() argument
176 bool MCPlusBuilder::updateEHInfo(MCInst &Inst, const MCLandingPad &LP) const { in updateEHInfo() argument
[all …]
|
| /llvm-project/clang/lib/Basic/ |
| H A D | SourceLocation.cpp | 33 void PrettyStackTraceLoc::print(raw_ostream &OS) const { in print()
62 void SourceLocation::print(raw_ostream &OS, const SourceManager &SM)const{ in print() argument
89 SourceLocation::printToString(const SourceManager &SM) const { in printToString() argument
96 LLVM_DUMP_METHOD void SourceLocation::dump(const SourceManager &SM) const { in dump() argument
101 LLVM_DUMP_METHOD void SourceRange::dump(const SourceManager &SM) const { in dump() argument
136 void SourceRange::print(raw_ostream &OS, const SourceManager &SM) const { in print() argument
148 SourceRange::printToString(const SourceManager &SM) const { in printToString() argument
183 PresumedLoc FullSourceLoc::getPresumedLoc(bool UseLineDirectives) const { in getPresumedLoc()
190 bool FullSourceLoc::isMacroArgExpansion(FullSourceLoc *StartLoc) const { in isMacroArgExpansion()
215 unsigned FullSourceLoc::getLineNumber(bool *Invalid) const { in getLineNumber()
[all …]
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| H A D | TargetInfo.cpp | 196 TargetInfo::checkCFProtectionBranchSupported(DiagnosticsEngine &Diags) const { in checkCFProtectionBranchSupported() argument
202 checkCFProtectionReturnSupported(DiagnosticsEngine & Diags) const checkCFProtectionReturnSupported() argument
227 getTypeConstantSuffix(IntType T) const getTypeConstantSuffix() argument
270 getTypeWidth(IntType T) const getTypeWidth() argument
287 getIntTypeByWidth(unsigned BitWidth,bool IsSigned) const getIntTypeByWidth() argument
302 getLeastIntTypeByWidth(unsigned BitWidth,bool IsSigned) const getLeastIntTypeByWidth() argument
317 getRealTypeByWidth(unsigned BitWidth,FloatModeKind ExplicitType) const getRealTypeByWidth() argument
352 getTypeAlign(IntType T) const getTypeAlign() argument
534 initFeatureMap(llvm::StringMap<bool> & Features,DiagnosticsEngine & Diags,StringRef CPU,const std::vector<std::string> & FeatureVec) const initFeatureMap() argument
548 parseTargetAttr(StringRef Features) const parseTargetAttr() argument
593 getCallingConvKind(bool ClangABICompat4) const getCallingConvKind() argument
600 areDefaultedSMFStillPOD(const LangOptions & LangOpts) const areDefaultedSMFStillPOD() argument
604 getOpenCLTypeAddrSpace(OpenCLTypeKind TK) const getOpenCLTypeAddrSpace() argument
631 isValidClobber(StringRef Name) const isValidClobber() argument
639 isValidGCCRegisterName(StringRef Name) const isValidGCCRegisterName() argument
685 getNormalizedGCCRegisterName(StringRef Name,bool ReturnCanonical) const getNormalizedGCCRegisterName() argument
725 validateOutputConstraint(ConstraintInfo & Info) const validateOutputConstraint() argument
801 resolveSymbolicName(const char * & Name,ArrayRef<ConstraintInfo> OutputConstraints,unsigned & Index) const resolveSymbolicName() argument
824 validateInputConstraint(MutableArrayRef<ConstraintInfo> OutputConstraints,ConstraintInfo & Info) const validateInputConstraint() argument
939 validatePointerAuthKey(const llvm::APSInt & value) const validatePointerAuthKey() argument
[all...] |
| /llvm-project/lld/ELF/Arch/ |
| H A D | SystemZ.cpp | 84 getRelExpr(RelType type,const Symbol & s,const uint8_t * loc) const getRelExpr() argument
179 writeGotHeader(uint8_t * buf) const writeGotHeader() argument
185 writeGotPlt(uint8_t * buf,const Symbol & s) const writeGotPlt() argument
189 writeIgotPlt(uint8_t * buf,const Symbol & s) const writeIgotPlt() argument
194 writePltHeader(uint8_t * buf) const writePltHeader() argument
211 addPltHeaderSymbols(InputSection & isec) const addPltHeaderSymbols() argument
218 writePlt(uint8_t * buf,const Symbol & sym,uint64_t pltEntryAddr) const writePlt() argument
235 getImplicitAddend(const uint8_t * buf,RelType type) const getImplicitAddend() argument
270 getDynRel(RelType type) const getDynRel() argument
276 adjustTlsExpr(RelType type,RelExpr expr) const adjustTlsExpr() argument
282 getTlsGdRelaxSkip(RelType type) const getTlsGdRelaxSkip() argument
306 relaxTlsGdToIe(uint8_t * loc,const Relocation & rel,uint64_t val) const relaxTlsGdToIe() argument
341 relaxTlsGdToLe(uint8_t * loc,const Relocation & rel,uint64_t val) const relaxTlsGdToLe() argument
376 relaxTlsLdToLe(uint8_t * loc,const Relocation & rel,uint64_t val) const relaxTlsLdToLe() argument
418 adjustGotPcExpr(RelType type,int64_t addend,const uint8_t * loc) const adjustGotPcExpr() argument
436 relaxOnce(int pass) const relaxOnce() argument
467 relaxGot(uint8_t * loc,const Relocation & rel,uint64_t val) const relaxGot() argument
482 relocate(uint8_t * loc,const Relocation & rel,uint64_t val) const relocate() argument
[all...] |
| /llvm-project/llvm/lib/Analysis/ |
| H A D | TargetTransformInfo.cpp | 232 adjustInliningThreshold(const CallBase * CB) const adjustInliningThreshold() argument
237 getCallerAllocaCost(const CallBase * CB,const AllocaInst * AI) const getCallerAllocaCost() argument
247 getGEPCost(Type * PointeeType,const Value * Ptr,ArrayRef<const Value * > Operands,Type * AccessType,TTI::TargetCostKind CostKind) const getGEPCost() argument
254 getPointersChainCost(ArrayRef<const Value * > Ptrs,const Value * Base,const TTI::PointersChainInfo & Info,Type * AccessTy,TTI::TargetCostKind CostKind) const getPointersChainCost() argument
262 getEstimatedNumberOfCaseClusters(const SwitchInst & SI,unsigned & JTSize,ProfileSummaryInfo * PSI,BlockFrequencyInfo * BFI) const getEstimatedNumberOfCaseClusters() argument
269 getInstructionCost(const User * U,ArrayRef<const Value * > Operands,enum TargetCostKind CostKind) const getInstructionCost() argument
282 hasBranchDivergence(const Function * F) const hasBranchDivergence() argument
286 isSourceOfDivergence(const Value * V) const isSourceOfDivergence() argument
290 isAlwaysUniform(const Value * V) const isAlwaysUniform() argument
295 isValidAddrSpaceCast(unsigned FromAS,unsigned ToAS) const isValidAddrSpaceCast() argument
300 addrspacesMayAlias(unsigned FromAS,unsigned ToAS) const addrspacesMayAlias() argument
309 collectFlatAddressOperands(SmallVectorImpl<int> & OpIndexes,Intrinsic::ID IID) const collectFlatAddressOperands() argument
314 isNoopAddrSpaceCast(unsigned FromAS,unsigned ToAS) const isNoopAddrSpaceCast() argument
319 canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const canHaveNonUndefGlobalInitializerInAddressSpace() argument
323 getAssumedAddrSpace(const Value * V) const getAssumedAddrSpace() argument
332 getPredicatedAddrSpace(const Value * V) const getPredicatedAddrSpace() argument
337 rewriteIntrinsicWithAddressSpace(IntrinsicInst * II,Value * OldV,Value * NewV) const rewriteIntrinsicWithAddressSpace() argument
341 isLoweredToCall(const Function * F) const isLoweredToCall() argument
347 isHardwareLoopProfitable(Loop * L,ScalarEvolution & SE,AssumptionCache & AC,TargetLibraryInfo * LibInfo,HardwareLoopInfo & HWLoopInfo) const isHardwareLoopProfitable() argument
352 preferPredicateOverEpilogue(TailFoldingInfo * TFI) const preferPredicateOverEpilogue() argument
357 getPreferredTailFoldingStyle(bool IVUpdateMayOverflow) const getPreferredTailFoldingStyle() argument
363 instCombineIntrinsic(InstCombiner & IC,IntrinsicInst & II) const instCombineIntrinsic() argument
369 simplifyDemandedUseBitsIntrinsic(InstCombiner & IC,IntrinsicInst & II,APInt DemandedMask,KnownBits & Known,bool & KnownBitsComputed) const simplifyDemandedUseBitsIntrinsic() argument
378 simplifyDemandedVectorEltsIntrinsic(InstCombiner & IC,IntrinsicInst & II,APInt DemandedElts,APInt & UndefElts,APInt & UndefElts2,APInt & UndefElts3,std::function<void (Instruction *,unsigned,APInt,APInt &)> SimplifyAndSetOp) const simplifyDemandedVectorEltsIntrinsic() argument
386 getUnrollingPreferences(Loop * L,ScalarEvolution & SE,UnrollingPreferences & UP,OptimizationRemarkEmitter * ORE) const getUnrollingPreferences() argument
391 getPeelingPreferences(Loop * L,ScalarEvolution & SE,PeelingPreferences & PP) const getPeelingPreferences() argument
395 isLegalAddImmediate(int64_t Imm) const isLegalAddImmediate() argument
399 isLegalAddScalableImmediate(int64_t Imm) const isLegalAddScalableImmediate() argument
403 isLegalICmpImmediate(int64_t Imm) const isLegalICmpImmediate() argument
412 isLegalAddressingMode(Type * Ty,GlobalValue * BaseGV,int64_t BaseOffset,bool HasBaseReg,int64_t Scale,unsigned AddrSpace,Instruction * I,int64_t ScalableOffset) const isLegalAddressingMode() argument
418 isLSRCostLess(const LSRCost & C1,const LSRCost & C2) const isLSRCostLess() argument
434 isProfitableLSRChainElement(Instruction * I) const isProfitableLSRChainElement() argument
445 canSaveCmp(Loop * L,BranchInst ** BI,ScalarEvolution * SE,LoopInfo * LI,DominatorTree * DT,AssumptionCache * AC,TargetLibraryInfo * LibInfo) const canSaveCmp() argument
451 getPreferredAddressingMode(const Loop * L,ScalarEvolution * SE) const getPreferredAddressingMode() argument
456 isLegalMaskedStore(Type * DataType,Align Alignment) const isLegalMaskedStore() argument
461 isLegalMaskedLoad(Type * DataType,Align Alignment) const isLegalMaskedLoad() argument
466 isLegalNTStore(Type * DataType,Align Alignment) const isLegalNTStore() argument
470 isLegalNTLoad(Type * DataType,Align Alignment) const isLegalNTLoad() argument
475 isLegalBroadcastLoad(Type * ElementTy,ElementCount NumElements) const isLegalBroadcastLoad() argument
480 isLegalMaskedGather(Type * DataType,Align Alignment) const isLegalMaskedGather() argument
486 isLegalAltInstr(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask) const isLegalAltInstr() argument
491 isLegalMaskedScatter(Type * DataType,Align Alignment) const isLegalMaskedScatter() argument
496 forceScalarizeMaskedGather(VectorType * DataType,Align Alignment) const forceScalarizeMaskedGather() argument
501 forceScalarizeMaskedScatter(VectorType * DataType,Align Alignment) const forceScalarizeMaskedScatter() argument
506 isLegalMaskedCompressStore(Type * DataType,Align Alignment) const isLegalMaskedCompressStore() argument
511 isLegalMaskedExpandLoad(Type * DataType,Align Alignment) const isLegalMaskedExpandLoad() argument
516 isLegalStridedLoadStore(Type * DataType,Align Alignment) const isLegalStridedLoadStore() argument
521 isLegalMaskedVectorHistogram(Type * AddrType,Type * DataType) const isLegalMaskedVectorHistogram() argument
529 hasDivRemOp(Type * DataType,bool IsSigned) const hasDivRemOp() argument
534 hasVolatileVariant(Instruction * I,unsigned AddrSpace) const hasVolatileVariant() argument
544 getScalingFactorCost(Type * Ty,GlobalValue * BaseGV,StackOffset BaseOffset,bool HasBaseReg,int64_t Scale,unsigned AddrSpace) const getScalingFactorCost() argument
555 isTruncateFree(Type * Ty1,Type * Ty2) const isTruncateFree() argument
559 isProfitableToHoist(Instruction * I) const isProfitableToHoist() argument
565 isTypeLegal(Type * Ty) const isTypeLegal() argument
569 getRegUsageForType(Type * Ty) const getRegUsageForType() argument
578 shouldBuildLookupTablesForConstant(Constant * C) const shouldBuildLookupTablesForConstant() argument
586 useColdCCForColdCall(Function & F) const useColdCCForColdCall() argument
592 getScalarizationOverhead(VectorType * Ty,const APInt & DemandedElts,bool Insert,bool Extract,TTI::TargetCostKind CostKind) const getScalarizationOverhead() argument
599 getOperandsScalarizationOverhead(ArrayRef<const Value * > Args,ArrayRef<Type * > Tys,TTI::TargetCostKind CostKind) const getOperandsScalarizationOverhead() argument
611 supportsTailCallFor(const CallBase * CB) const supportsTailCallFor() argument
616 enableAggressiveInterleaving(bool LoopHasReductions) const enableAggressiveInterleaving() argument
621 enableMemCmpExpansion(bool OptSize,bool IsZeroCmp) const enableMemCmpExpansion() argument
630 shouldTreatInstructionLikeSelect(const Instruction * I) const shouldTreatInstructionLikeSelect() argument
651 allowsMisalignedMemoryAccesses(LLVMContext & Context,unsigned BitWidth,unsigned AddressSpace,Align Alignment,unsigned * Fast) const allowsMisalignedMemoryAccesses() argument
657 getPopcntSupport(unsigned IntTyWidthInBit) const getPopcntSupport() argument
661 haveFastSqrt(Type * Ty) const haveFastSqrt() argument
666 isExpensiveToSpeculativelyExecute(const Instruction * I) const isExpensiveToSpeculativelyExecute() argument
670 isFCmpOrdCheaperThanFCmpZero(Type * Ty) const isFCmpOrdCheaperThanFCmpZero() argument
674 getFPOpCost(Type * Ty) const getFPOpCost() argument
683 getIntImmCodeSizeCost(unsigned Opcode,unsigned Idx,const APInt & Imm,Type * Ty) const getIntImmCodeSizeCost() argument
691 getIntImmCost(const APInt & Imm,Type * Ty,TTI::TargetCostKind CostKind) const getIntImmCost() argument
699 getIntImmCostInst(unsigned Opcode,unsigned Idx,const APInt & Imm,Type * Ty,TTI::TargetCostKind CostKind,Instruction * Inst) const getIntImmCostInst() argument
709 getIntImmCostIntrin(Intrinsic::ID IID,unsigned Idx,const APInt & Imm,Type * Ty,TTI::TargetCostKind CostKind) const getIntImmCostIntrin() argument
717 preferToKeepConstantsAttached(const Instruction & Inst,const Function & Fn) const preferToKeepConstantsAttached() argument
721 getNumberOfRegisters(unsigned ClassID) const getNumberOfRegisters() argument
725 hasConditionalLoadStoreForType(Type * Ty) const hasConditionalLoadStoreForType() argument
730 getRegisterClassForType(bool Vector,Type * Ty) const getRegisterClassForType() argument
734 getRegisterClassName(unsigned ClassID) const getRegisterClassName() argument
739 getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const getRegisterBitWidth() argument
760 shouldMaximizeVectorBandwidth(TargetTransformInfo::RegisterKind K) const shouldMaximizeVectorBandwidth() argument
765 getMinimumVF(unsigned ElemWidth,bool IsScalable) const getMinimumVF() argument
770 getMaximumVF(unsigned ElemWidth,unsigned Opcode) const getMaximumVF() argument
775 getStoreMinimumVF(unsigned VF,Type * ScalarMemTy,Type * ScalarValTy) const getStoreMinimumVF() argument
780 shouldConsiderAddressTypePromotion(const Instruction & I,bool & AllowPromotionWithoutCommonHeader) const shouldConsiderAddressTypePromotion() argument
791 getCacheSize(CacheLevel Level) const getCacheSize() argument
796 getCacheAssociativity(CacheLevel Level) const getCacheAssociativity() argument
811 getMinPrefetchStride(unsigned NumMemAccesses,unsigned NumStridedMemAccesses,unsigned NumPrefetches,bool HasCall) const getMinPrefetchStride() argument
824 shouldPrefetchAddressSpace(unsigned AS) const shouldPrefetchAddressSpace() argument
828 getMaxInterleaveFactor(ElementCount VF) const getMaxInterleaveFactor() argument
897 getArithmeticInstrCost(unsigned Opcode,Type * Ty,TTI::TargetCostKind CostKind,OperandValueInfo Op1Info,OperandValueInfo Op2Info,ArrayRef<const Value * > Args,const Instruction * CxtI,const TargetLibraryInfo * TLibInfo) const getArithmeticInstrCost() argument
922 getAltInstrCost(VectorType * VecTy,unsigned Opcode0,unsigned Opcode1,const SmallBitVector & OpcodeMask,TTI::TargetCostKind CostKind) const getAltInstrCost() argument
932 getShuffleCost(ShuffleKind Kind,VectorType * Ty,ArrayRef<int> Mask,TTI::TargetCostKind CostKind,int Index,VectorType * SubTp,ArrayRef<const Value * > Args,const Instruction * CxtI) const getShuffleCost() argument
985 getCastInstrCost(unsigned Opcode,Type * Dst,Type * Src,CastContextHint CCH,TTI::TargetCostKind CostKind,const Instruction * I) const getCastInstrCost() argument
995 getExtractWithExtendCost(unsigned Opcode,Type * Dst,VectorType * VecTy,unsigned Index) const getExtractWithExtendCost() argument
1003 getCFInstrCost(unsigned Opcode,TTI::TargetCostKind CostKind,const Instruction * I) const getCFInstrCost() argument
1013 getCmpSelInstrCost(unsigned Opcode,Type * ValTy,Type * CondTy,CmpInst::Predicate VecPred,TTI::TargetCostKind CostKind,const Instruction * I) const getCmpSelInstrCost() argument
1024 getVectorInstrCost(unsigned Opcode,Type * Val,TTI::TargetCostKind CostKind,unsigned Index,Value * Op0,Value * Op1) const getVectorInstrCost() argument
1037 getVectorInstrCost(const Instruction & I,Type * Val,TTI::TargetCostKind CostKind,unsigned Index) const getVectorInstrCost() argument
1048 getReplicationShuffleCost(Type * EltTy,int ReplicationFactor,int VF,const APInt & DemandedDstElts,TTI::TargetCostKind CostKind) const getReplicationShuffleCost() argument
1058 getMemoryOpCost(unsigned Opcode,Type * Src,Align Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,TTI::OperandValueInfo OpInfo,const Instruction * I) const getMemoryOpCost() argument
1069 getMaskedMemoryOpCost(unsigned Opcode,Type * Src,Align Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind) const getMaskedMemoryOpCost() argument
1078 getGatherScatterOpCost(unsigned Opcode,Type * DataTy,const Value * Ptr,bool VariableMask,Align Alignment,TTI::TargetCostKind CostKind,const Instruction * I) const getGatherScatterOpCost() argument
1088 getStridedMemoryOpCost(unsigned Opcode,Type * DataTy,const Value * Ptr,bool VariableMask,Align Alignment,TTI::TargetCostKind CostKind,const Instruction * I) const getStridedMemoryOpCost() argument
1098 getInterleavedMemoryOpCost(unsigned Opcode,Type * VecTy,unsigned Factor,ArrayRef<unsigned> Indices,Align Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,bool UseMaskForCond,bool UseMaskForGaps) const getInterleavedMemoryOpCost() argument
1108 getIntrinsicInstrCost(const IntrinsicCostAttributes & ICA,TTI::TargetCostKind CostKind) const getIntrinsicInstrCost() argument
1117 getCallInstrCost(Function * F,Type * RetTy,ArrayRef<Type * > Tys,TTI::TargetCostKind CostKind) const getCallInstrCost() argument
1123 getNumberOfParts(Type * Tp) const getNumberOfParts() argument
1129 getAddressComputationCost(Type * Tp,ScalarEvolution * SE,const SCEV * Ptr) const getAddressComputationCost() argument
1135 getMemcpyCost(const Instruction * I) const getMemcpyCost() argument
1147 getArithmeticReductionCost(unsigned Opcode,VectorType * Ty,std::optional<FastMathFlags> FMF,TTI::TargetCostKind CostKind) const getArithmeticReductionCost() argument
1156 getMinMaxReductionCost(Intrinsic::ID IID,VectorType * Ty,FastMathFlags FMF,TTI::TargetCostKind CostKind) const getMinMaxReductionCost() argument
1165 getExtendedReductionCost(unsigned Opcode,bool IsUnsigned,Type * ResTy,VectorType * Ty,FastMathFlags FMF,TTI::TargetCostKind CostKind) const getExtendedReductionCost() argument
1172 getMulAccReductionCost(bool IsUnsigned,Type * ResTy,VectorType * Ty,TTI::TargetCostKind CostKind) const getMulAccReductionCost() argument
1177 getCostOfKeepingLiveOverCall(ArrayRef<Type * > Tys) const getCostOfKeepingLiveOverCall() argument
1182 getTgtMemIntrinsic(IntrinsicInst * Inst,MemIntrinsicInfo & Info) const getTgtMemIntrinsic() argument
1191 getOrCreateResultFromMemIntrinsic(IntrinsicInst * Inst,Type * ExpectedType) const getOrCreateResultFromMemIntrinsic() argument
1198 getMemcpyLoopLoweringType(LLVMContext & Context,Value * Length,unsigned SrcAddrSpace,unsigned DestAddrSpace,unsigned SrcAlign,unsigned DestAlign,std::optional<uint32_t> AtomicElementSize) const getMemcpyLoopLoweringType() argument
1208 getMemcpyLoopResidualLoweringType(SmallVectorImpl<Type * > & OpsOut,LLVMContext & Context,unsigned RemainingBytes,unsigned SrcAddrSpace,unsigned DestAddrSpace,unsigned SrcAlign,unsigned DestAlign,std::optional<uint32_t> AtomicCpySize) const getMemcpyLoopResidualLoweringType() argument
1215 areInlineCompatible(const Function * Caller,const Function * Callee) const areInlineCompatible() argument
1222 getInlineCallPenalty(const Function * F,const CallBase & Call,unsigned DefaultCallPenalty) const getInlineCallPenalty() argument
1228 areTypesABICompatible(const Function * Caller,const Function * Callee,const ArrayRef<Type * > & Types) const areTypesABICompatible() argument
1233 isIndexedLoadLegal(MemIndexedMode Mode,Type * Ty) const isIndexedLoadLegal() argument
1238 isIndexedStoreLegal(MemIndexedMode Mode,Type * Ty) const isIndexedStoreLegal() argument
1242 getLoadStoreVecRegBitWidth(unsigned AS) const getLoadStoreVecRegBitWidth() argument
1246 isLegalToVectorizeLoad(LoadInst * LI) const isLegalToVectorizeLoad() argument
1250 isLegalToVectorizeStore(StoreInst * SI) const isLegalToVectorizeStore() argument
1255 isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes,Align Alignment,unsigned AddrSpace) const isLegalToVectorizeLoadChain() argument
1261 isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes,Align Alignment,unsigned AddrSpace) const isLegalToVectorizeStoreChain() argument
1267 isLegalToVectorizeReduction(const RecurrenceDescriptor & RdxDesc,ElementCount VF) const isLegalToVectorizeReduction() argument
1271 isElementTypeLegalForScalableVector(Type * Ty) const isElementTypeLegalForScalableVector() argument
1278 getLoadVectorFactor(unsigned VF,unsigned LoadSize,unsigned ChainSizeInBytes,VectorType * VecTy) const getLoadVectorFactor() argument
1285 getStoreVectorFactor(unsigned VF,unsigned StoreSize,unsigned ChainSizeInBytes,VectorType * VecTy) const getStoreVectorFactor() argument
1290 preferInLoopReduction(unsigned Opcode,Type * Ty,ReductionFlags Flags) const preferInLoopReduction() argument
1295 preferPredicatedReductionSelect(unsigned Opcode,Type * Ty,ReductionFlags Flags) const preferPredicatedReductionSelect() argument
1304 getVPLegalizationStrategy(const VPIntrinsic & VPI) const getVPLegalizationStrategy() argument
1308 hasArmWideBranch(bool Thumb) const hasArmWideBranch() argument
1316 shouldExpandReduction(const IntrinsicInst * II) const shouldExpandReduction() argument
1337 hasActiveVectorLength(unsigned Opcode,Type * DataType,Align Alignment) const hasActiveVectorLength() argument
[all...] |
| /llvm-project/llvm/unittests/DebugInfo/PDB/ |
| H A D | PDBApiTest.cpp | 70 std::unique_ptr<PDBSymbol> getSymbolById(SymIndexId SymbolId) const override { in getSymbolById()
74 getSourceFileById(uint32_t SymbolId) const override { in getSourceFileById()
78 uint32_t &Offset) const override { in addressForVA()
82 uint32_t &Offset) const override { in addressForRVA()
100 const IPDBSourceFile &File) const override { in findLineNumbers() argument
104 findLineNumbersByAddress(uint64_t Address, uint32_t Length) const override { in findLineNumbersByAddress()
108 findLineNumbersByRVA(uint32_t RVA, uint32_t Length) const override { in findLineNumbersByRVA()
113 uint32_t Length) const override { in findLineNumbersBySectOffset()
118 PDB_NameSearchFlags Flags) const override { in findSourceFiles()
124 PDB_NameSearchFlags Flags) const override { in findOneSourceFile()
[all …]
|
| /llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstrInfo.cpp | 28 bool SPIRVInstrInfo::isConstantInstr(const MachineInstr &MI) const { in isConstantInstr() argument
50 bool SPIRVInstrInfo::isSpecConstantInstr(const MachineInstr &MI) const { in isInlineAsmDefInstr() argument
83 bool SPIRVInstrInfo::isDecorationInstr(const MachineInstr &MI) const { in isHeaderInstr() argument
60 isTypeDeclInstr(const MachineInstr & MI) const isTypeDeclInstr() argument
70 isDecorationInstr(const MachineInstr & MI) const isDecorationInstr() argument
105 canUseFastMathFlags(const MachineInstr & MI) const canUseFastMathFlags() argument
124 canUseNSW(const MachineInstr & MI) const canUseNSW() argument
141 canUseNUW(const MachineInstr & MI) const canUseNUW() argument
186 analyzeBranch(MachineBasicBlock & MBB,MachineBasicBlock * & TBB,MachineBasicBlock * & FBB,SmallVectorImpl<MachineOperand> & Cond,bool AllowModify) const analyzeBranch() argument
215 removeBranch(MachineBasicBlock & MBB,int * BytesRemoved) const removeBranch() argument
235 insertBranch(MachineBasicBlock & MBB,MachineBasicBlock * TBB,MachineBasicBlock * FBB,ArrayRef<MachineOperand> Cond,const DebugLoc & DL,int * BytesAdded) const insertBranch() argument
244 copyPhysReg(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,const DebugLoc & DL,MCRegister DestReg,MCRegister SrcReg,bool KillSrc) const copyPhysReg() argument
258 expandPostRAPseudo(MachineInstr & MI) const expandPostRAPseudo() argument
[all...] |
| /llvm-project/mlir/lib/TableGen/ |
| H A D | Class.cpp | 29 void MethodParameter::writeDeclTo(raw_indented_ostream &os) const { in writeDeclTo()
37 void MethodParameter::writeDefTo(raw_indented_ostream &os) const { in writeDefTo()
47 void MethodParameters::writeDeclTo(raw_indented_ostream &os) const { in writeDeclTo()
51 void MethodParameters::writeDefTo(raw_indented_ostream &os) const { in writeDefTo()
56 bool MethodParameters::subsumes(const MethodParameters &other) const { in subsumes() argument
78 bool MethodSignature::makesRedundant(const MethodSignature &other) const { in makesRedundant() argument
83 void MethodSignature::writeDeclTo(raw_indented_ostream &os) const { in writeDeclTo()
90 StringRef namePrefix) const { in writeDefTo()
98 mlir::raw_indented_ostream &os) const { in writeTemplateParamsTo()
115 void MethodBody::writeTo(raw_indented_ostream &os) const { in writeTo()
[all …]
|
| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 156 isAsCheapAsAMove(const MachineInstr & MI) const isAsCheapAsAMove() argument
187 shouldSink(const MachineInstr & MI) const shouldSink() argument
201 findLoopInstr(MachineBasicBlock * BB,unsigned EndLoopOp,MachineBasicBlock * TargetBB,SmallPtrSet<MachineBasicBlock *,8> & Visited) const findLoopInstr() argument
291 isLoadFromStackSlot(const MachineInstr & MI,int & FrameIndex) const isLoadFromStackSlot() argument
339 isStoreToStackSlot(const MachineInstr & MI,int & FrameIndex) const isStoreToStackSlot() argument
390 hasLoadFromStackSlot(const MachineInstr & MI,SmallVectorImpl<const MachineMemOperand * > & Accesses) const hasLoadFromStackSlot() argument
408 hasStoreToStackSlot(const MachineInstr & MI,SmallVectorImpl<const MachineMemOperand * > & Accesses) const hasStoreToStackSlot() argument
440 analyzeBranch(MachineBasicBlock & MBB,MachineBasicBlock * & TBB,MachineBasicBlock * & FBB,SmallVectorImpl<MachineOperand> & Cond,bool AllowModify) const analyzeBranch() argument
607 removeBranch(MachineBasicBlock & MBB,int * BytesRemoved) const removeBranch() argument
634 insertBranch(MachineBasicBlock & MBB,MachineBasicBlock * TBB,MachineBasicBlock * FBB,ArrayRef<MachineOperand> Cond,const DebugLoc & DL,int * BytesAdded) const insertBranch() argument
751 shouldIgnoreForPipelining(const MachineInstr * MI) const shouldIgnoreForPipelining() argument
806 analyzeLoopForPipelining(MachineBasicBlock * LoopBB) const analyzeLoopForPipelining() argument
822 isProfitableToIfCvt(MachineBasicBlock & MBB,unsigned NumCycles,unsigned ExtraPredCycles,BranchProbability Probability) const isProfitableToIfCvt() argument
828 isProfitableToIfCvt(MachineBasicBlock & TMBB,unsigned NumTCycles,unsigned ExtraTCycles,MachineBasicBlock & FMBB,unsigned NumFCycles,unsigned ExtraFCycles,BranchProbability Probability) const isProfitableToIfCvt() argument
834 isProfitableToDupForIfCvt(MachineBasicBlock & MBB,unsigned NumInstrs,BranchProbability Probability) const isProfitableToDupForIfCvt() argument
860 copyPhysReg(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,const DebugLoc & DL,MCRegister DestReg,MCRegister SrcReg,bool KillSrc) const copyPhysReg() argument
963 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register SrcReg,bool isKill,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
1011 loadRegFromStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register DestReg,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const loadRegFromStackSlot() argument
1052 expandPostRAPseudo(MachineInstr & MI) const expandPostRAPseudo() argument
1444 isConstant(const MachineFrameInfo *) const expandPostRAPseudo() argument
1447 isAliased(const MachineFrameInfo *) const expandPostRAPseudo() argument
1450 mayAlias(const MachineFrameInfo *) const expandPostRAPseudo() argument
1453 printCustom(raw_ostream & OS) const expandPostRAPseudo() argument
1546 expandVGatherPseudo(MachineInstr & MI) const expandVGatherPseudo() argument
1635 reverseBranchCondition(SmallVectorImpl<MachineOperand> & Cond) const reverseBranchCondition() argument
1650 insertNoop(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI) const insertNoop() argument
1655 isPostIncrement(const MachineInstr & MI) const isPostIncrement() argument
1667 isPredicated(const MachineInstr & MI) const isPredicated() argument
1673 PredicateInstruction(MachineInstr & MI,ArrayRef<MachineOperand> Cond) const PredicateInstruction() argument
1725 SubsumesPredicate(ArrayRef<MachineOperand> Pred1,ArrayRef<MachineOperand> Pred2) const SubsumesPredicate() argument
1732 ClobbersPredicate(MachineInstr & MI,std::vector<MachineOperand> & Pred,bool SkipDead) const ClobbersPredicate() argument
1757 isPredicable(const MachineInstr & MI) const isPredicable() argument
1795 isSchedulingBoundary(const MachineInstr & MI,const MachineBasicBlock * MBB,const MachineFunction & MF) const isSchedulingBoundary() argument
1843 getInlineAsmLength(const char * Str,const MCAsmInfo & MAI,const TargetSubtargetInfo * STI) const getInlineAsmLength() argument
1870 CreateTargetPostRAHazardRecognizer(const InstrItineraryData * II,const ScheduleDAG * DAG) const CreateTargetPostRAHazardRecognizer() argument
1882 analyzeCompare(const MachineInstr & MI,Register & SrcReg,Register & SrcReg2,int64_t & Mask,int64_t & Value) const analyzeCompare() argument
1972 getInstrLatency(const InstrItineraryData * ItinData,const MachineInstr & MI,unsigned * PredCost) const getInstrLatency() argument
1977 CreateTargetScheduleState(const TargetSubtargetInfo & STI) const CreateTargetScheduleState() argument
1987 areMemAccessesTriviallyDisjoint(const MachineInstr & MIa,const MachineInstr & MIb) const areMemAccessesTriviallyDisjoint() argument
2045 getIncrementValue(const MachineInstr & MI,int & Value) const getIncrementValue() argument
2067 decomposeMachineOperandsTargetFlags(unsigned TF) const decomposeMachineOperandsTargetFlags() argument
2101 createVR(MachineFunction * MF,MVT VT) const createVR() argument
2118 isAbsoluteSet(const MachineInstr & MI) const isAbsoluteSet() argument
2122 isAccumulator(const MachineInstr & MI) const isAccumulator() argument
2127 isBaseImmOffset(const MachineInstr & MI) const isBaseImmOffset() argument
2131 isComplex(const MachineInstr & MI) const isComplex() argument
2140 isCompoundBranchInstr(const MachineInstr & MI) const isCompoundBranchInstr() argument
2146 isConstExtended(const MachineInstr & MI) const isConstExtended() argument
2195 isDeallocRet(const MachineInstr & MI) const isDeallocRet() argument
2211 isDependent(const MachineInstr & ProdMI,const MachineInstr & ConsMI) const isDependent() argument
2241 isDotCurInst(const MachineInstr & MI) const isDotCurInst() argument
2252 isDotNewInst(const MachineInstr & MI) const isDotNewInst() argument
2261 isDuplexPair(const MachineInstr & MIa,const MachineInstr & MIb) const isDuplexPair() argument
2267 isEndLoopN(unsigned Opcode) const isEndLoopN() argument
2272 isExpr(unsigned OpType) const isExpr() argument
2286 isExtendable(const MachineInstr & MI) const isExtendable() argument
2308 isExtended(const MachineInstr & MI) const isExtended() argument
2321 isFloat(const MachineInstr & MI) const isFloat() argument
2329 isHVXMemWithAIndirect(const MachineInstr & I,const MachineInstr & J) const isHVXMemWithAIndirect() argument
2337 isIndirectCall(const MachineInstr & MI) const isIndirectCall() argument
2348 isIndirectL4Return(const MachineInstr & MI) const isIndirectL4Return() argument
2362 isJumpR(const MachineInstr & MI) const isJumpR() argument
2381 isJumpWithinBranchRange(const MachineInstr & MI,unsigned offset) const isJumpWithinBranchRange() argument
2422 isLateSourceInstr(const MachineInstr & MI) const isLateSourceInstr() argument
2428 isLoopN(const MachineInstr & MI) const isLoopN() argument
2440 isMemOp(const MachineInstr & MI) const isMemOp() argument
2472 isNewValue(const MachineInstr & MI) const isNewValue() argument
2477 isNewValue(unsigned Opcode) const isNewValue() argument
2482 isNewValueInst(const MachineInstr & MI) const isNewValueInst() argument
2486 isNewValueJump(const MachineInstr & MI) const isNewValueJump() argument
2490 isNewValueJump(unsigned Opcode) const isNewValueJump() argument
2494 isNewValueStore(const MachineInstr & MI) const isNewValueStore() argument
2499 isNewValueStore(unsigned Opcode) const isNewValueStore() argument
2506 isOperandExtended(const MachineInstr & MI,unsigned OperandNum) const isOperandExtended() argument
2512 isPredicatedNew(const MachineInstr & MI) const isPredicatedNew() argument
2518 isPredicatedNew(unsigned Opcode) const isPredicatedNew() argument
2524 isPredicatedTrue(const MachineInstr & MI) const isPredicatedTrue() argument
2530 isPredicatedTrue(unsigned Opcode) const isPredicatedTrue() argument
2538 isPredicated(unsigned Opcode) const isPredicated() argument
2543 isPredicateLate(unsigned Opcode) const isPredicateLate() argument
2548 isPredictedTaken(unsigned Opcode) const isPredictedTaken() argument
2555 isSaveCalleeSavedRegsCall(const MachineInstr & MI) const isSaveCalleeSavedRegsCall() argument
2562 isSignExtendingLoad(const MachineInstr & MI) const isSignExtendingLoad() argument
2640 isSolo(const MachineInstr & MI) const isSolo() argument
2645 isSpillPredRegOp(const MachineInstr & MI) const isSpillPredRegOp() argument
2655 isTailCall(const MachineInstr & MI) const isTailCall() argument
2666 isTC1(const MachineInstr & MI) const isTC1() argument
2671 isTC2(const MachineInstr & MI) const isTC2() argument
2676 isTC2Early(const MachineInstr & MI) const isTC2Early() argument
2681 isTC4x(const MachineInstr & MI) const isTC4x() argument
2688 isToBeScheduledASAP(const MachineInstr & MI1,const MachineInstr & MI2) const isToBeScheduledASAP() argument
2705 isHVXVec(const MachineInstr & MI) const isHVXVec() argument
2711 isValidAutoIncImm(const EVT VT,int Offset) const isValidAutoIncImm() argument
2749 isValidOffset(unsigned Opcode,int Offset,const TargetRegisterInfo * TRI,bool Extend) const isValidOffset() argument
2958 isVecAcc(const MachineInstr & MI) const isVecAcc() argument
2962 isVecALU(const MachineInstr & MI) const isVecALU() argument
2971 isVecUsableNextPacket(const MachineInstr & ProdMI,const MachineInstr & ConsMI) const isVecUsableNextPacket() argument
2984 isZeroExtendingLoad(const MachineInstr & MI) const isZeroExtendingLoad() argument
3064 addLatencyToSchedule(const MachineInstr & MI1,const MachineInstr & MI2) const addLatencyToSchedule() argument
3075 getMemOperandsWithOffsetWidth(const MachineInstr & LdSt,SmallVectorImpl<const MachineOperand * > & BaseOps,int64_t & Offset,bool & OffsetIsScalable,LocationSize & Width,const TargetRegisterInfo * TRI) const getMemOperandsWithOffsetWidth() argument
3086 canExecuteInBundle(const MachineInstr & First,const MachineInstr & Second) const canExecuteInBundle() argument
3110 doesNotReturn(const MachineInstr & CallMI) const doesNotReturn() argument
3115 hasEHLabel(const MachineBasicBlock * B) const hasEHLabel() argument
3124 hasNonExtEquivalent(const MachineInstr & MI) const hasNonExtEquivalent() argument
3159 hasPseudoInstrPair(const MachineInstr & MI) const hasPseudoInstrPair() argument
3164 hasUncondBranch(const MachineBasicBlock * B) const hasUncondBranch() argument
3176 mayBeCurLoad(const MachineInstr & MI) const mayBeCurLoad() argument
3183 mayBeNewStore(const MachineInstr & MI) const mayBeNewStore() argument
3192 producesStall(const MachineInstr & ProdMI,const MachineInstr & ConsMI) const producesStall() argument
3210 producesStall(const MachineInstr & MI,MachineBasicBlock::const_instr_iterator BII) const producesStall() argument
3230 predCanBeUsedAsDotNew(const MachineInstr & MI,Register PredReg) const predCanBeUsedAsDotNew() argument
3264 PredOpcodeHasJMP_c(unsigned Opcode) const PredOpcodeHasJMP_c() argument
3275 predOpcodeHasNot(ArrayRef<MachineOperand> Cond) const predOpcodeHasNot() argument
3281 getAddrMode(const MachineInstr & MI) const getAddrMode() argument
3292 getBaseAndOffset(const MachineInstr & MI,int64_t & Offset,LocationSize & AccessSize) const getBaseAndOffset() argument
3324 getBaseAndOffsetPosition(const MachineInstr & MI,unsigned & BasePos,unsigned & OffsetPos) const getBaseAndOffsetPosition() argument
3361 getBranchingInstrs(MachineBasicBlock & MBB) const getBranchingInstrs() argument
3418 getCExtOpNum(const MachineInstr & MI) const getCExtOpNum() argument
3426 getCompoundCandidateGroup(const MachineInstr & MI) const getCompoundCandidateGroup() argument
3514 getCompoundOpcode(const MachineInstr & GA,const MachineInstr & GB) const getCompoundOpcode() argument
3541 getDuplexOpcode(const MachineInstr & MI,bool ForBigCore) const getDuplexOpcode() argument
3597 getCondOpcode(int Opc,bool invertPredicate) const getCondOpcode() argument
3609 getDotCurOp(const MachineInstr & MI) const getDotCurOp() argument
3629 getNonDotCurOp(const MachineInstr & MI) const getNonDotCurOp() argument
3730 getDotNewOp(const MachineInstr & MI) const getDotNewOp() argument
3772 getDotNewPredJumpOp(const MachineInstr & MI,const MachineBranchProbabilityInfo * MBPI) const getDotNewPredJumpOp() argument
3858 getDotNewPredOp(const MachineInstr & MI,const MachineBranchProbabilityInfo * MBPI) const getDotNewPredOp() argument
3872 getDotOldOp(const MachineInstr & MI) const getDotOldOp() argument
3924 getDuplexCandidateGroup(const MachineInstr & MI) const getDuplexCandidateGroup() argument
4303 getEquivalentHWInstr(const MachineInstr & MI) const getEquivalentHWInstr() argument
4308 getInstrTimingClassLatency(const InstrItineraryData * ItinData,const MachineInstr & MI) const getInstrTimingClassLatency() argument
4329 getOperandLatency(const InstrItineraryData * ItinData,const MachineInstr & DefMI,unsigned DefIdx,const MachineInstr & UseMI,unsigned UseIdx) const getOperandLatency() argument
4372 getInvertedPredSense(SmallVectorImpl<MachineOperand> & Cond) const getInvertedPredSense() argument
4380 getInvertedPredicatedOpcode(const int Opc) const getInvertedPredicatedOpcode() argument
4391 getMaxValue(const MachineInstr & MI) const getMaxValue() argument
4405 isAddrModeWithOffset(const MachineInstr & MI) const isAddrModeWithOffset() argument
4433 isPureSlot0(const MachineInstr & MI) const isPureSlot0() argument
4445 isRestrictNoSlot1Store(const MachineInstr & MI) const isRestrictNoSlot1Store() argument
4452 changeDuplexOpcode(MachineBasicBlock::instr_iterator MII,bool ToBigInstrs) const changeDuplexOpcode() argument
4470 translateInstrsForDup(MachineFunction & MF,bool ToBigInstrs) const translateInstrsForDup() argument
4480 translateInstrsForDup(MachineBasicBlock::instr_iterator MII,bool ToBigInstrs) const translateInstrsForDup() argument
4488 getMemAccessSize(const MachineInstr & MI) const getMemAccessSize() argument
4511 getMinValue(const MachineInstr & MI) const getMinValue() argument
4525 getNonExtOpcode(const MachineInstr & MI) const getNonExtOpcode() argument
4550 getPredReg(ArrayRef<MachineOperand> Cond,Register & PredReg,unsigned & PredRegPos,unsigned & PredRegFlags) const getPredReg() argument
4569 getPseudoInstrPair(const MachineInstr & MI) const getPseudoInstrPair() argument
4573 getRegForm(const MachineInstr & MI) const getRegForm() argument
4581 getSize(const MachineInstr & MI) const getSize() argument
4615 getType(const MachineInstr & MI) const getType() argument
4620 getUnits(const MachineInstr & MI) const getUnits() argument
4628 nonDbgBBSize(const MachineBasicBlock * BB) const nonDbgBBSize() argument
4633 nonDbgBundleSize(MachineBasicBlock::const_iterator BundleHead) const nonDbgBundleSize() argument
4642 immediateExtend(MachineInstr & MI) const immediateExtend() argument
4656 invertAndChangeJumpTarget(MachineInstr & MI,MachineBasicBlock * NewTarget) const invertAndChangeJumpTarget() argument
4676 genAllInsnTimingClasses(MachineFunction & MF) const genAllInsnTimingClasses() argument
4698 reversePredSense(MachineInstr & MI) const reversePredSense() argument
4705 reversePrediction(unsigned Opcode) const reversePrediction() argument
4716 validateBranchCond(const ArrayRef<MachineOperand> & Cond) const validateBranchCond() argument
4722 setBundleNoShuf(MachineBasicBlock::instr_iterator MIB) const setBundleNoShuf() argument
4731 getBundleNoShuf(const MachineInstr & MIB) const getBundleNoShuf() argument
4738 changeAddrMode_abs_io(short Opc) const changeAddrMode_abs_io() argument
4742 changeAddrMode_io_abs(short Opc) const changeAddrMode_io_abs() argument
4746 changeAddrMode_io_pi(short Opc) const changeAddrMode_io_pi() argument
4750 changeAddrMode_io_rr(short Opc) const changeAddrMode_io_rr() argument
4754 changeAddrMode_pi_io(short Opc) const changeAddrMode_pi_io() argument
4758 changeAddrMode_rr_io(short Opc) const changeAddrMode_rr_io() argument
4762 changeAddrMode_rr_ur(short Opc) const changeAddrMode_rr_ur() argument
4766 changeAddrMode_ur_rr(short Opc) const changeAddrMode_ur_rr() argument
[all...] |
| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.cpp | 204 const MCPhysReg *AArch64RegisterInfo::getCalleeSavedRegsViaCopy( in getCalleeSavedRegsViaCopy() argument
53 regNeedsCFI(unsigned Reg,unsigned & RegToUseForCFI) const regNeedsCFI() argument
71 getCalleeSavedRegs(const MachineFunction * MF) const getCalleeSavedRegs() argument
149 getDarwinCalleeSavedRegs(const MachineFunction * MF) const getDarwinCalleeSavedRegs() argument
213 UpdateCustomCalleeSavedRegs(MachineFunction & MF) const UpdateCustomCalleeSavedRegs() argument
231 getSubClassWithSubReg(const TargetRegisterClass * RC,unsigned Idx) const getSubClassWithSubReg() argument
244 getDarwinCallPreservedMask(const MachineFunction & MF,CallingConv::ID CC) const getDarwinCallPreservedMask() argument
280 getCallPreservedMask(const MachineFunction & MF,CallingConv::ID CC) const getCallPreservedMask() argument
332 getCustomEHPadPreservedMask(const MachineFunction & MF) const getCustomEHPadPreservedMask() argument
348 UpdateCustomCallPreservedMask(MachineFunction & MF,const uint32_t ** Mask) const UpdateCustomCallPreservedMask() argument
381 getThisReturnPreservedMask(const MachineFunction & MF,CallingConv::ID CC) const getThisReturnPreservedMask() argument
401 explainReservedReg(const MachineFunction & MF,MCRegister PhysReg) const explainReservedReg() argument
427 getStrictlyReservedRegs(const MachineFunction & MF) const getStrictlyReservedRegs() argument
496 getReservedRegs(const MachineFunction & MF) const getReservedRegs() argument
509 isReservedReg(const MachineFunction & MF,MCRegister Reg) const isReservedReg() argument
514 isStrictlyReservedReg(const MachineFunction & MF,MCRegister Reg) const isStrictlyReservedReg() argument
518 isAnyArgRegReserved(const MachineFunction & MF) const isAnyArgRegReserved() argument
525 emitReservedArgRegCallError(const MachineFunction & MF) const emitReservedArgRegCallError() argument
532 isAsmClobberable(const MachineFunction & MF,MCRegister PhysReg) const isAsmClobberable() argument
549 getPointerRegClass(const MachineFunction & MF,unsigned Kind) const getPointerRegClass() argument
554 getCrossCopyRegClass(const TargetRegisterClass * RC) const getCrossCopyRegClass() argument
562 hasBasePointer(const MachineFunction & MF) const hasBasePointer() argument
600 isArgumentRegister(const MachineFunction & MF,MCRegister Reg) const isArgumentRegister() argument
677 getFrameRegister(const MachineFunction & MF) const getFrameRegister() argument
683 requiresRegisterScavenging(const MachineFunction & MF) const requiresRegisterScavenging() argument
688 requiresVirtualBaseRegisters(const MachineFunction & MF) const requiresVirtualBaseRegisters() argument
693 useFPForScavengingIndex(const MachineFunction & MF) const useFPForScavengingIndex() argument
711 requiresFrameIndexScavenging(const MachineFunction & MF) const requiresFrameIndexScavenging() argument
716 cannotEliminateFrame(const MachineFunction & MF) const cannotEliminateFrame() argument
728 needsFrameBaseReg(MachineInstr * MI,int64_t Offset) const needsFrameBaseReg() argument
793 isFrameOffsetLegal(const MachineInstr * MI,Register BaseReg,int64_t Offset) const isFrameOffsetLegal() argument
804 materializeFrameBaseRegister(MachineBasicBlock * MBB,int FrameIdx,int64_t Offset) const materializeFrameBaseRegister() argument
827 resolveFrameIndex(MachineInstr & MI,Register BaseReg,int64_t Offset) const resolveFrameIndex() argument
875 getOffsetOpcodes(const StackOffset & Offset,SmallVectorImpl<uint64_t> & Ops) const getOffsetOpcodes() argument
903 eliminateFrameIndex(MachineBasicBlock::iterator II,int SPAdj,unsigned FIOperandNum,RegScavenger * RS) const eliminateFrameIndex() argument
995 getRegPressureLimit(const TargetRegisterClass * RC,MachineFunction & MF) const getRegPressureLimit() argument
1042 getLocalAddressRegister(const MachineFunction & MF) const getLocalAddressRegister() argument
1055 shouldCoalesce(MachineInstr * MI,const TargetRegisterClass * SrcRC,unsigned SubReg,const TargetRegisterClass * DstRC,unsigned DstSubReg,const TargetRegisterClass * NewRC,LiveIntervals & LIS) const shouldCoalesce() argument
1103 shouldAnalyzePhysregInMachineLoopInfo(MCRegister R) const shouldAnalyzePhysregInMachineLoopInfo() argument
[all...] |
| /llvm-project/clang/lib/Basic/Targets/ |
| H A D | SPIR.cpp | 39 void SPIR32TargetInfo::getTargetDefines(const LangOptions &Opts, in getTargetDefines() argument
22 getTargetDefines(const LangOptions & Opts,MacroBuilder & Builder) const getTargetDefines() argument
27 getTargetDefines(const LangOptions & Opts,MacroBuilder & Builder) const getTargetDefines() argument
33 getTargetDefines(const LangOptions & Opts,MacroBuilder & Builder) const getTargetDefines() argument
44 getTargetDefines(const LangOptions & Opts,MacroBuilder & Builder) const getTargetDefines() argument
49 getTargetDefines(const LangOptions & Opts,MacroBuilder & Builder) const getTargetDefines() argument
55 getTargetDefines(const LangOptions & Opts,MacroBuilder & Builder) const getTargetDefines() argument
68 initFeatureMap(llvm::StringMap<bool> & Features,DiagnosticsEngine & Diags,StringRef,const std::vector<std::string> & FeatureVec) const initFeatureMap() argument
75 validateAsmConstraint(const char * & Name,TargetInfo::ConstraintInfo & Info) const validateAsmConstraint() argument
80 convertConstraint(const char * & Constraint) const convertConstraint() argument
89 getTargetDefines(const LangOptions & Opts,MacroBuilder & Builder) const getTargetDefines() argument
[all...] |
| /llvm-project/llvm/tools/llvm-cov/ |
| H A D | CoverageFilters.cpp | 22 const coverage::FunctionRecord &Function) const { in matches() argument
29 const coverage::FunctionRecord &Function) const { in matches() argument
33 bool NameRegexCoverageFilter::matchesFilename(StringRef Filename) const { in matchesFilename()
39 const coverage::FunctionRecord &Function) const { in matches() argument
45 const coverage::FunctionRecord &Function) const { in matches() argument
52 const coverage::FunctionRecord &Function) const { in matches() argument
62 const coverage::FunctionRecord &Function) const { in matches() argument
70 bool CoverageFilters::matchesFilename(StringRef Filename) const { in matchesFilename()
80 const coverage::FunctionRecord &Function) const { in matches() argument
|
| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelDAGToDAG.cpp | 52 getAnalysisUsage(AnalysisUsage & AU) const getAnalysisUsage() argument
80 selectAddrRegImm(SDValue Addr,SDValue & Base,SDValue & Offset) const selectAddrRegImm() argument
86 selectAddrDefault(SDValue Addr,SDValue & Base,SDValue & Offset) const selectAddrDefault() argument
92 selectIntAddr(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddr() argument
98 selectIntAddr11MM(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddr11MM() argument
104 selectIntAddr12MM(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddr12MM() argument
110 selectIntAddr16MM(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddr16MM() argument
116 selectIntAddrLSL2MM(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrLSL2MM() argument
122 selectIntAddrSImm10(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrSImm10() argument
128 selectIntAddrSImm10Lsl1(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrSImm10Lsl1() argument
134 selectIntAddrSImm10Lsl2(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrSImm10Lsl2() argument
140 selectIntAddrSImm10Lsl3(SDValue Addr,SDValue & Base,SDValue & Offset) const selectIntAddrSImm10Lsl3() argument
158 selectVSplat(SDNode * N,APInt & Imm,unsigned MinSizeInBits) const selectVSplat() argument
163 selectVSplatUimm1(SDValue N,SDValue & Imm) const selectVSplatUimm1() argument
168 selectVSplatUimm2(SDValue N,SDValue & Imm) const selectVSplatUimm2() argument
173 selectVSplatUimm3(SDValue N,SDValue & Imm) const selectVSplatUimm3() argument
178 selectVSplatUimm4(SDValue N,SDValue & Imm) const selectVSplatUimm4() argument
183 selectVSplatUimm5(SDValue N,SDValue & Imm) const selectVSplatUimm5() argument
188 selectVSplatUimm6(SDValue N,SDValue & Imm) const selectVSplatUimm6() argument
193 selectVSplatUimm8(SDValue N,SDValue & Imm) const selectVSplatUimm8() argument
198 selectVSplatSimm5(SDValue N,SDValue & Imm) const selectVSplatSimm5() argument
203 selectVSplatUimmPow2(SDValue N,SDValue & Imm) const selectVSplatUimmPow2() argument
208 selectVSplatUimmInvPow2(SDValue N,SDValue & Imm) const selectVSplatUimmInvPow2() argument
213 selectVSplatMaskL(SDValue N,SDValue & Imm) const selectVSplatMaskL() argument
218 selectVSplatMaskR(SDValue N,SDValue & Imm) const selectVSplatMaskR() argument
330 isUnneededShiftMask(SDNode * N,unsigned ShAmtBits) const isUnneededShiftMask() argument
[all...] |
| /llvm-project/llvm/lib/Option/ |
| H A D | ArgList.cpp | 57 ArgList::getRange(std::initializer_list<OptSpecifier> Ids) const { in getRange() argument
72 bool ArgList::hasFlag(OptSpecifier Pos, OptSpecifier Neg, bool Default) const { in hasFlag() argument
79 bool Default) const { in hasFlagNoClaim() argument
86 bool Default) const { in hasFlag() argument
92 StringRef ArgList::getLastArgValue(OptSpecifier Id, StringRef Default) const { in getLastArgValue() argument
98 std::vector<std::string> ArgList::getAllArgValues(OptSpecifier Id) const { in getAllArgValues() argument
105 OptSpecifier Neg) const { in addOptInFlag() argument
113 AddAllArgsExcept(ArgStringList & Output,ArrayRef<OptSpecifier> Ids,ArrayRef<OptSpecifier> ExcludeIds) const AddAllArgsExcept() argument
136 addAllArgs(ArgStringList & Output,ArrayRef<OptSpecifier> Ids) const addAllArgs() argument
141 AddAllArgs(ArgStringList & Output,OptSpecifier Id0) const AddAllArgs() argument
149 AddAllArgValues(ArgStringList & Output,OptSpecifier Id0,OptSpecifier Id1,OptSpecifier Id2) const AddAllArgValues() argument
159 AddAllArgsTranslated(ArgStringList & Output,OptSpecifier Id0,const char * Translation,bool Joined) const AddAllArgsTranslated() argument
173 ClaimAllArgs(OptSpecifier Id0) const ClaimAllArgs() argument
186 GetOrMakeJoinedArgString(unsigned Index,StringRef LHS,StringRef RHS) const GetOrMakeJoinedArgString() argument
195 print(raw_ostream & O) const print() argument
218 MakeIndex(StringRef String0) const MakeIndex() argument
229 MakeIndex(StringRef String0,StringRef String1) const MakeIndex() argument
237 MakeArgStringRef(StringRef Str) const MakeArgStringRef() argument
244 MakeArgStringRef(StringRef Str) const MakeArgStringRef() argument
252 MakeFlagArg(const Arg * BaseArg,const Option Opt) const MakeFlagArg() argument
260 MakePositionalArg(const Arg * BaseArg,const Option Opt,StringRef Value) const MakePositionalArg() argument
269 MakeSeparateArg(const Arg * BaseArg,const Option Opt,StringRef Value) const MakeSeparateArg() argument
278 MakeJoinedArg(const Arg * BaseArg,const Option Opt,StringRef Value) const MakeJoinedArg() argument
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600RegisterInfo.cpp | 36 BitVector R600RegisterInfo::getReservedRegs(const MachineFunction &MF) const { in getReservedRegs() argument
69 const MachineFunction *) const { in getCalleeSavedRegs() argument
73 Register R600RegisterInfo::getFrameRegister(const MachineFunction &MF) const { in getFrameRegister() argument
77 unsigned R600RegisterInfo::getHWRegChan(unsigned reg) const { in getHWRegChan()
81 unsigned R600RegisterInfo::getHWRegIndex(unsigned Reg) const { in getHWRegIndex()
86 MVT VT) const { in getCFGStructurizerRegClass()
93 bool R600RegisterInfo::isPhysRegLiveAcrossClauses(Register Reg) const { in isPhysRegLiveAcrossClauses()
109 RegScavenger *RS) const { in eliminateFrameIndex()
113 void R600RegisterInfo::reserveRegisterTuples(BitVector &Reserved, unsigned Reg) const { in reserveRegisterTuples()
|
| /llvm-project/llvm/lib/Support/ |
| H A D | DataExtractor.cpp | 19 Error *E) const { in prepareRead() argument
41 T DataExtractor::getU(uint64_t *offset_ptr, Error *Err) const { in getU() argument
61 Error *Err) const { in getUs() argument
80 uint8_t DataExtractor::getU8(uint64_t *offset_ptr, llvm::Error *Err) const { in getU8() argument
85 uint32_t count) const { in getU8() argument
89 uint8_t *DataExtractor::getU8(Cursor &C, uint8_t *Dst, uint32_t Count) const { in getU8() argument
93 uint16_t DataExtractor::getU16(uint64_t *offset_ptr, llvm::Error *Err) const { in getU16() argument
98 uint32_t count) const { in getU16() argument
102 uint32_t DataExtractor::getU24(uint64_t *OffsetPtr, Error *Err) const { in getU24() argument
108 uint32_t DataExtractor::getU32(uint64_t *offset_ptr, llvm::Error *Err) const { in getU32() argument
113 getU32(uint64_t * offset_ptr,uint32_t * dst,uint32_t count) const getU32() argument
117 getU64(uint64_t * offset_ptr,llvm::Error * Err) const getU64() argument
122 getU64(uint64_t * offset_ptr,uint64_t * dst,uint32_t count) const getU64() argument
127 getUnsigned(uint64_t * offset_ptr,uint32_t byte_size,llvm::Error * Err) const getUnsigned() argument
142 getSigned(uint64_t * offset_ptr,uint32_t byte_size) const getSigned() argument
156 getCStrRef(uint64_t * OffsetPtr,Error * Err) const getCStrRef() argument
176 getFixedLengthString(uint64_t * OffsetPtr,uint64_t Length,StringRef TrimChars) const getFixedLengthString() argument
182 getBytes(uint64_t * OffsetPtr,uint64_t Length,Error * Err) const getBytes() argument
221 getULEB128(uint64_t * offset_ptr,Error * Err) const getULEB128() argument
225 getSLEB128(uint64_t * offset_ptr,Error * Err) const getSLEB128() argument
229 skip(Cursor & C,uint64_t Length) const skip() argument
[all...] |
| /llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiMCInstLower.cpp | 33 GetGlobalAddressSymbol(const MachineOperand & MO) const GetGlobalAddressSymbol() argument
38 GetBlockAddressSymbol(const MachineOperand & MO) const GetBlockAddressSymbol() argument
43 GetExternalSymbolSymbol(const MachineOperand & MO) const GetExternalSymbolSymbol() argument
47 GetJumpTableSymbol(const MachineOperand & MO) const GetJumpTableSymbol() argument
57 GetConstantPoolIndexSymbol(const MachineOperand & MO) const GetConstantPoolIndexSymbol() argument
67 LowerSymbolOperand(const MachineOperand & MO,MCSymbol * Sym) const LowerSymbolOperand() argument
93 Lower(const MachineInstr * MI,MCInst & OutMI) const Lower() argument
[all...] |