[HLSL] Make bool in hlsl i32 (#122977)

make a bool's memory representation i32 in hlsl
add new test
fix broken test
Closes #122932

Revert "[SPIR-V] Fixup storage class for global private (#116636)" (#118312)

This reverts commit aa7fe1c10e5d6d0d3aacdb345fed995de413e142.

[SPIR-V] Fixup storage class for global private (#116636)

Adds a new address spaces: `hlsl_private`. Variables with such address
space will be emitted with a `Private` storage class.
This is usefu

[SPIR-V] Fixup storage class for global private (#116636)

Adds a new address spaces: `hlsl_private`. Variables with such address
space will be emitted with a `Private` storage class.
This is useful for variables global to a SPIR-V module, since up to now,
they were still emitted with a `Function` storage class, which is wrong.

---------

Signed-off-by: Nathan Gauër <brioche@google.com>

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Remove support for RenderScript (#112916)

See
https://discourse.llvm.org/t/rfc-deprecate-and-eventually-remove-renderscript-support/81284
for the RFC

[clang][AVR] Fix basic type size/alignment values to match avr-gcc. (#111290)

Closes #102172

[clang][RISCV] Introduce command line options for RISC-V Zicfilp CFI

This patch enables the following command line flags for RISC-V targets:

+ `-fcf-protection=branch` turns on forward-edge contr

[clang][RISCV] Introduce command line options for RISC-V Zicfilp CFI

This patch enables the following command line flags for RISC-V targets:

+ `-fcf-protection=branch` turns on forward-edge control-flow integrity conditioning
+ `-mcf-branch-label-scheme=unlabeled|func-sig` selects the label scheme used in the forward-edge CFI conditioning

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Revert "[NFC][Clang] Move functions of BranchProtectionInfo out of line" (#98437)

Reverts llvm/llvm-project#98329

[NFC][Clang] Move functions of BranchProtectionInfo out of line (#98329)

Also let's add const to the setFnAttributes.

[HLSL] Cleanup TargetInfo handling (#90694)

We had some odd places where we set target behaviors. We were setting
the long size in target-specific code, but it should be language-based.
We were no

[HLSL] Cleanup TargetInfo handling (#90694)

We had some odd places where we set target behaviors. We were setting
the long size in target-specific code, but it should be language-based.
We were not setting the Half float type semantics correctly, and instead
were overriding the query in the AST context.

This change it moves existing code to the right places in the Target so
that as we continue working on target and language feature they are
controlled in the right places.

It also fixes a bug where the size of `half` was computed incorrectly
when native half types are not supported.

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[clang] TargetInfo hook for unaligned bitfields (#65742)

Promote ARM & AArch64's HasUnaligned to TargetInfo and set for all
targets.

[AArch64][PAC] Support ptrauth builtins and -fptrauth-intrinsics. (#65996)

This defines the basic set of pointer authentication clang builtins
(provided in a new header, ptrauth.h), with diagnostic

[AArch64][PAC] Support ptrauth builtins and -fptrauth-intrinsics. (#65996)

This defines the basic set of pointer authentication clang builtins
(provided in a new header, ptrauth.h), with diagnostics and IRGen
support. The availability of the builtins is gated on a new flag,
`-fptrauth-intrinsics`.

Note that this only includes the basic intrinsics, and notably excludes
`ptrauth_sign_constant`, `ptrauth_type_discriminator`, and
`ptrauth_string_discriminator`, which need extra logic to be fully
supported.

This also introduces clang/docs/PointerAuthentication.rst, which
describes the ptrauth model in general, in addition to these builtins.

Co-Authored-By: Akira Hatanaka <ahatanaka@apple.com>
Co-Authored-By: John McCall <rjmccall@apple.com>

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Revert "[AArch64] Add soft-float ABI (#74460)" (#82032)

This reverts commit 9cc98e336980f00cbafcbed8841344e6ac472bdc.

Issue: https://github.com/ClangBuiltLinux/linux/issues/1997

[AArch64] Add soft-float ABI (#74460)

This adds support for the AArch64 soft-float ABI. The specification for
this ABI was added by https://github.com/ARM-software/abi-aa/pull/232.

Because all e

[AArch64] Add soft-float ABI (#74460)

This adds support for the AArch64 soft-float ABI. The specification for
this ABI was added by https://github.com/ARM-software/abi-aa/pull/232.

Because all existing AArch64 hardware has floating-point hardware, we
expect this to be a niche option, only used for embedded systems on
R-profile systems. We are going to document that SysV-like systems
should only ever use the base (hard-float) PCS variant:
https://github.com/ARM-software/abi-aa/pull/233. For that reason, I've
not added an option to select the ABI independently of the FPU hardware,
instead the new ABI is enabled iff the target architecture does not have
an FPU.

For testing, I have run this through an ABI fuzzer, but since this is
the first implementation it can only test for internal consistency
(callers and callees agree on the PCS), not for conformance to the ABI
spec.

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[clang] Use StringRef::{starts,ends}_with (NFC) (#75149)

This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}:

[clang] Use StringRef::{starts,ends}_with (NFC) (#75149)

This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}::{starts,ends}_with in C++20.

I'm planning to deprecate and eventually remove
StringRef::{starts,ends}with.

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Fix diag for read-only target features

Currently the diag is emitted even when there is no
target feature specified on command line for OpenMP.
This is because the function to initialize feature map

Fix diag for read-only target features

Currently the diag is emitted even when there is no
target feature specified on command line for OpenMP.
This is because the function to initialize feature map
is also used with cached feature string. The fix is to
only diag when the feature map is initialized with
feature strings from command line options.

Reviewed by: Joseph Huber, Matt Arsenault, Johannes Doerfert

Differential Revision: https://reviews.llvm.org/D153123

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[HIP] emit macro `__HIP_NO_IMAGE_SUPPORT`

HIP texture/image support is optional as some devices
do not have image instructions. A macro __HIP_NO_IMAGE_SUPPORT
is defined for device not supporting im

[HIP] emit macro `__HIP_NO_IMAGE_SUPPORT`

HIP texture/image support is optional as some devices
do not have image instructions. A macro __HIP_NO_IMAGE_SUPPORT
is defined for device not supporting images (https://github.com/ROCm-Developer-Tools/HIP/blob/d0448aa4c4dd0f4b29ccf6a663b7f5ad9f5183e0/docs/reference/kernel_language.md?plain=1#L426 )

Currently the macro is defined by HIP header based on predefined macros
for GPU, e.g __gfx*__ , which is error prone. This patch let clang
emit the predefined macro.

Reviewed by: Matt Arsenault, Artem Belevich

Differential Revision: https://reviews.llvm.org/D151349

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[Clang][BFloat16] Upgrade __bf16 to arithmetic type, change mangling, and extend excess precision support

Pursuant to discussions at
https://discourse.llvm.org/t/rfc-c-23-p1467r9-extended-floating-p

[Clang][BFloat16] Upgrade __bf16 to arithmetic type, change mangling, and extend excess precision support

Pursuant to discussions at
https://discourse.llvm.org/t/rfc-c-23-p1467r9-extended-floating-point-types-and-standard-names/70033/22,
this commit enhances the handling of the __bf16 type in Clang.
- Firstly, it upgrades __bf16 from a storage-only type to an arithmetic
type.
- Secondly, it changes the mangling of __bf16 to DF16b on all
architectures except ARM. This change has been made in
accordance with the finalization of the mangling for the
std::bfloat16_t type, as discussed at
https://github.com/itanium-cxx-abi/cxx-abi/pull/147.
- Finally, this commit extends the existing excess precision support to
the __bf16 type. This applies to hardware architectures that do not
natively support bfloat16 arithmetic.
Appropriate tests have been added to verify the effects of these
changes and ensure no regressions in other areas of the compiler.

Reviewed By: rjmccall, pengfei, zahiraam

Differential Revision: https://reviews.llvm.org/D150913

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Fix file info comment; NFC

There is no TargetInfoImpl class any longer.

[LLVM][OHOS] Clang toolchain and targets

Add a clang part of OpenHarmony target

Related LLVM part: D138202

~~~

Huawei RRI, OS Lab

Reviewed By: DavidSpickett

Differential Revision: https://revie

[LLVM][OHOS] Clang toolchain and targets

Add a clang part of OpenHarmony target

Related LLVM part: D138202

~~~

Huawei RRI, OS Lab

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D145227

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[clang][WebAssembly] Initial support for reference type funcref in clang

This is the funcref counterpart to 890146b. We introduce a new attribute
that marks a function pointer as a funcref. It also

[clang][WebAssembly] Initial support for reference type funcref in clang

This is the funcref counterpart to 890146b. We introduce a new attribute
that marks a function pointer as a funcref. It also implements builtin
__builtin_wasm_ref_null_func(), that returns a null funcref value.

Differential Revision: https://reviews.llvm.org/D128440

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Revert "[LLVM][OHOS] Clang toolchain and targets"

This change had tests that break whenever LLVM_ENABLE_LINKER_BUILD_ID is
set, as is the case in the Fuchsia target.

This reverts commits:
f81317a54

Revert "[LLVM][OHOS] Clang toolchain and targets"

This change had tests that break whenever LLVM_ENABLE_LINKER_BUILD_ID is
set, as is the case in the Fuchsia target.

This reverts commits:
f81317a54586dbcef0c14cf512a0770e8ecaab3d
72474afa27570a0a1307f3260f0187b703aa6d84

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[LLVM][OHOS] Clang toolchain and targets

Add a clang part of OpenHarmony target

Related LLVM part: D138202

~~~

Huawei RRI, OS Lab

Reviewed By: DavidSpickett

Differential Revision: https://revie

[LLVM][OHOS] Clang toolchain and targets

Add a clang part of OpenHarmony target

Related LLVM part: D138202

~~~

Huawei RRI, OS Lab

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D145227

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Move SIMD alignment calculation to LLVM Frontend

Currently default simd alignment is defined by Clang specific TargetInfo class.
This class cannot be reused for LLVM Flang. That's why default simd a

Move SIMD alignment calculation to LLVM Frontend

Currently default simd alignment is defined by Clang specific TargetInfo class.
This class cannot be reused for LLVM Flang. That's why default simd alignment
calculation has been moved to OMPIRBuilder which is common for Flang and Clang.

Previous attempt: https://reviews.llvm.org/D138496 was wrong because
the default alignment depended on the number of built LLVM targets.

If we wanted to calculate the default alignment for PPC and we hadn't specified
PPC LLVM target to build, then we would get 0 as the alignment because
OMPIRBuilder couldn't create PPCTargetMachine object and it returned 0 as
the default value.

If PPC LLVM target had been built earlier, then OMPIRBuilder could have created
PPCTargetMachine object and it would have returned 128.

Differential Revision: https://reviews.llvm.org/D141910

Reviewed By: jdoerfert

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[NFC][TargetParser] Remove llvm/Support/TargetParser.h

Revert "[OpenMP][OMPIRBuilder]Move SIMD alignment calculation to LLVM Frontend"

Causes clang build failures, see https://reviews.llvm.org/D141910#4089465 for details.

This reverts commit ca446037af

Revert "[OpenMP][OMPIRBuilder]Move SIMD alignment calculation to LLVM Frontend"

Causes clang build failures, see https://reviews.llvm.org/D141910#4089465 for details.

This reverts commit ca446037af019d1aa01b1352a30a18df33038359.

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