| /llvm-project/llvm/lib/MCA/Stages/ |
| H A D | InOrderIssueStage.cpp | 159 SmallVectorImpl<unsigned> &UsedRegs) { in addRegisterReadWrite() argument
179 const InstRef &IR, unsigned Ops, ArrayRef<unsigned> UsedRegs) { in notifyInstructionDispatched() argument
227 SmallVector<unsigned, 4> UsedRegs(PRF.getNumRegisterFiles()); in tryIssue() local
|
| H A D | DispatchStage.cpp | 39 ArrayRef<unsigned> UsedRegs, in notifyInstructionDispatched()
|
| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86LowerTileCopy.cpp | 89 LiveRegUnits UsedRegs(*TRI); runOnMachineFunction() local
|
| H A D | X86CallFrameOptimization.cpp | 281 const X86RegisterInfo &RegInfo, DenseSet<unsigned int> &UsedRegs) { in classifyInstruction()
409 DenseSet<unsigned int> UsedRegs; in collectCallInfo() local
|
| /llvm-project/bolt/lib/Passes/ |
| H A D | RegAnalysis.cpp | 197 BitVector UsedRegs = BitVector(BC.MRI->getNumRegs(), false); in getFunctionUsedRegsList() local
|
| H A D | ValidateInternalCalls.cpp | 266 BitVector UsedRegs = BitVector(BC.MRI->getNumRegs(), false); in analyzeFunction() local
|
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 60 LiveRegUnits UsedRegs(*RegInfo); copyPhysReg() local
|
| H A D | Thumb1FrameLowering.cpp | 615 findTemporariesForLR(const BitVector & GPRsNoLRSP,const BitVector & PopFriendly,const LiveRegUnits & UsedRegs,unsigned & PopReg,unsigned & TmpReg,MachineRegisterInfo & MRI) findTemporariesForLR() argument
687 LiveRegUnits UsedRegs(TRI); emitPopSpecialFixUp() local
|
| H A D | ARMFastISel.cpp | 2021 FinishCall(MVT RetVT,SmallVectorImpl<Register> & UsedRegs,const Instruction * I,CallingConv::ID CC,unsigned & NumBytes,bool isVarArg) FinishCall() argument
2284 SmallVector<Register, 4> UsedRegs; ARMEmitLibcall() local
2428 SmallVector<Register, 4> UsedRegs; SelectCall() local
[all...] |
| H A D | ARMLoadStoreOptimizer.cpp | 868 DenseSet<unsigned> UsedRegs; MergeOpsUpdate() local
|
| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | CallingConvLower.h | 184 SmallVector<uint32_t, 16> UsedRegs; variable
|
| /llvm-project/llvm/lib/CodeGen/ |
| H A D | WindowScheduler.cpp | 640 SmallVector<Register, 128> UsedRegs; updateLiveIntervals() local
|
| H A D | PrologEpilogInserter.cpp | 1225 BitVector UsedRegs(TRI.getNumRegs()); insertZeroCallUsedRegs() local
|
| H A D | MachineBasicBlock.cpp | 1193 SmallVector<Register, 4> UsedRegs; SplitCriticalEdge() local
|
| H A D | MachineInstr.cpp | 2162 setPhysRegsDeadExcept(ArrayRef<Register> UsedRegs,const TargetRegisterInfo & TRI) setPhysRegsDeadExcept() argument
|
| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 1156 SmallVector<Register, 8> UsedRegs; EmitMachineNode() local
|
| /llvm-project/llvm/utils/TableGen/ |
| H A D | GlobalISelEmitter.cpp | 2369 SmallPtrSet<Record *, 16> UsedRegs; postProcessRule() local
|
| /llvm-project/llvm/lib/CodeGen/LiveDebugValues/ |
| H A D | VarLocBasedImpl.cpp | 1607 SmallVector<Register, 32> UsedRegs; transferRegisterDef() local
|
| H A D | InstrRefBasedImpl.cpp | 2343 BitVector UsedRegs(TRI->getNumRegs()); produceMLocTransferFunction() local
|