Home
last modified time | relevance | path

Searched defs:UseReg (Results 1 – 10 of 10) sorted by relevance

/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCVSXSwapRemoval.cpp724 MachineInstr *DefMI = MRI->getVRegDef(UseReg); in recordUnoptimizableWebs() local
801 MachineInstr *DefMI = MRI->getVRegDef(UseReg); in markSwapsForRemoval() local
H A DPPCPreEmitPeephole.cpp260 Register UseReg; addLinkerOpt() member
/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonCopyToCombine.cpp243 static bool isUnsafeToMoveAcross(MachineInstr &MI, unsigned UseReg, in isUnsafeToMoveAcross()
252 static Register UseReg(const MachineOperand& MO) { in UseReg() function
/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFoldOperands.cpp659 getRegSeqInit(SmallVectorImpl<std::pair<MachineOperand *,unsigned>> & Defs,Register UseReg,uint8_t OpTy) const getRegSeqInit() argument
709 Register UseReg = OpToFold.getReg(); tryToFoldACImm() local
894 Register UseReg = OpToFold.getReg(); foldOperand() local
1084 Register UseReg = UseOp->getReg(); foldOperand() local
[all...]
H A DGCNHazardRecognizer.cpp956 Register UseReg; checkVALUHazards() local
/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64StackTaggingPreRA.cpp275 Register UseReg = WorkList.pop_back_val(); findFirstSlotCandidate() local
/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCCodeEmitter.cpp724 unsigned UseReg = MO.getReg(); getMachineOpValue() local
/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegStackify.cpp918 if (DefReg != UseReg || !MRI.hasOneNonDBGUse(DefReg)) in runOnMachineFunction() local
/llvm-project/llvm/lib/Target/ARM/
H A DARMFastISel.cpp2388 if (!GV || Subtarget->genLongCalls()) UseReg = true; in SelectCall() local
2174 ARMSelectCallOp(bool UseReg) ARMSelectCallOp() argument
/llvm-project/llvm/lib/CodeGen/
H A DScheduleDAGInstrs.cpp272 Register UseReg = UseInstr->getOperand(UseOpIdx).getReg(); addPhysRegDataDeps() local