| /freebsd-src/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrItineraries.h | 187 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding()
210 unsigned UseIdx) const { in getOperandLatency()
|
| H A D | MCSubtargetInfo.h | 184 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles() argument
|
| H A D | MCSchedule.h | 104 unsigned UseIdx; member
|
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetSchedule.cpp | 162 unsigned UseIdx = 0; in findUseIdx() local
216 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local
|
| H A D | LiveIntervalCalc.cpp | 171 SlotIndex UseIdx; in extendToUses() local
|
| H A D | RegisterCoalescer.cpp | 1756 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in eliminateUndefCopy() local
885 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI); removeCopyByCommutingDef() local
935 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI).getRegSlot(true); removeCopyByCommutingDef() local
1227 SlotIndex UseIdx = LIS->getInstructionIndex(MI); removePartialRedundancy() local
1790 addUndefFlag(const LiveInterval & Int,SlotIndex UseIdx,MachineOperand & MO,unsigned SubRegIdx) addUndefFlag() argument
1829 SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot(true); updateRegDefsUses() local
1887 SlotIndex UseIdx = MIIdx.getRegSlot(true); updateRegDefsUses() local
[all...] |
| H A D | LiveRangeEdit.cpp | 159 SlotIndex UseIdx, boo in canRematerializeAt() argument
[all...] |
| H A D | MachineCopyPropagation.cpp | 538 isBackwardPropagatableRegClassCopy(const MachineInstr & Copy,const MachineInstr & UseI,unsigned UseIdx) isBackwardPropagatableRegClassCopy() argument
557 isForwardableRegClassCopy(const MachineInstr & Copy,const MachineInstr & UseI,unsigned UseIdx) isForwardableRegClassCopy() argument
|
| H A D | MachineCombiner.cpp | 236 int UseIdx = InstrPtr->findRegisterUseOperandIdx(MO.getReg()); getDepth() local
|
| H A D | MachineVerifier.cpp | 2427 checkLivenessAtUse(const MachineOperand * MO,unsigned MONum,SlotIndex UseIdx,const LiveRange & LR,Register VRegOrUnit,LaneBitmask LaneMask) checkLivenessAtUse() argument
2542 SlotIndex UseIdx; checkLiveness() local
[all...] |
| H A D | InlineSpiller.cpp | 631 SlotIndex UseIdx = LIS.getInstructionIndex(MI).getRegSlot(true); in reMaterializeFor() local
|
| H A D | TwoAddressInstructionPass.cpp | 1625 SlotIndex UseIdx = LIS->getInstructionIndex(*MI); processTiedPairs() local
|
| H A D | SplitKit.cpp | 594 defFromParent(unsigned RegIdx,const VNInfo * ParentVNI,SlotIndex UseIdx,MachineBasicBlock & MBB,MachineBasicBlock::iterator I) defFromParent() argument
|
| H A D | MachineInstr.cpp | 1121 tieOperands(unsigned DefIdx,unsigned UseIdx) tieOperands() argument
|
| /freebsd-src/contrib/llvm-project/llvm/lib/IR/ |
| H A D | AbstractCallSite.cpp | 100 unsigned UseIdx = CB->getArgOperandNo(U); in AbstractCallSite() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXSwapRemoval.cpp | 680 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
746 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
788 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval() local
|
| H A D | PPCInstrInfo.h | 332 getOperandLatency(const InstrItineraryData * ItinData,SDNode * DefNode,unsigned DefIdx,SDNode * UseNode,unsigned UseIdx) getOperandLatency() argument
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 473 int UseIdx = -1; adjustSchedDependency() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 702 unsigned UseIdx; in FoldImmediate() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 3952 getVSTMUseCycle(const InstrItineraryData * ItinData,const MCInstrDesc & UseMCID,unsigned UseClass,unsigned UseIdx,unsigned UseAlign) const getVSTMUseCycle() argument
3991 getSTMUseCycle(const InstrItineraryData * ItinData,const MCInstrDesc & UseMCID,unsigned UseClass,unsigned UseIdx,unsigned UseAlign) const getSTMUseCycle() argument
4019 getOperandLatency(const InstrItineraryData * ItinData,const MCInstrDesc & DefMCID,unsigned DefIdx,unsigned DefAlign,const MCInstrDesc & UseMCID,unsigned UseIdx,unsigned UseAlign) const getOperandLatency() argument
4154 getBundledUseMI(const TargetRegisterInfo * TRI,const MachineInstr & MI,unsigned Reg,unsigned & UseIdx,unsigned & Dist) getBundledUseMI() argument
4400 getOperandLatencyImpl(const InstrItineraryData * ItinData,const MachineInstr & DefMI,unsigned DefIdx,const MCInstrDesc & DefMCID,unsigned DefAdj,const MachineOperand & DefMO,unsigned Reg,const MachineInstr & UseMI,unsigned UseIdx,const MCInstrDesc & UseMCID,unsigned UseAdj) const getOperandLatencyImpl() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 1353 unsigned UseIdx = GroupIdx.back() + 1; EmitSpecialNode() local
|
| /freebsd-src/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | SubtargetEmitter.cpp | 1248 for (unsigned UseIdx = 0, EndIdx = Reads.size(); GenSchedClassTables() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 639 unsigned UseIdx; FoldImmediate() local
|
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1778 hasHighOperandLatency(const TargetSchedModel & SchedModel,const MachineRegisterInfo * MRI,const MachineInstr & DefMI,unsigned DefIdx,const MachineInstr & UseMI,unsigned UseIdx) hasHighOperandLatency() argument
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 3152 SlotIndex UseIdx = LIS->getInstructionIndex(Use); findReachingDef() local
|