| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandImm.cpp | 494 unsigned TZ = llvm::countr_zero(Imm); in expandMOVImmSimple() local
|
| /llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 292 unsigned TZ = llvm::countr_zero<uint64_t>(Imm); in selectI64ImmDirect() local
|
| /llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAddressingModes.h | 121 unsigned TZ = llvm::countr_zero(Imm); in getSOImmValRotate() local
|
| /llvm-project/llvm/include/llvm/ADT/ |
| H A D | APInt.h | 435 unsigned TZ = countr_zero(); isNegatedPowerOf2() local
|
| /llvm-project/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 1501 uint32_t TZ = BitWidth; extractConstantWithoutWrapping() local
1520 const uint32_t TZ = SE.getMinTrailingZeros(Step); extractConstantWithoutWrapping() local
6308 uint32_t TZ = getMinTrailingZeros(T->getOperand()); getConstantMultipleImpl() local
6331 uint32_t TZ = 0; getConstantMultipleImpl() local
6342 uint32_t TZ = getMinTrailingZeros(N->getOperand(0)); getConstantMultipleImpl() local
6652 uint32_t TZ = getMinTrailingZeros(S); getRangeRef() local
7799 unsigned TZ = A.countr_zero(); createSCEV() local
[all...] |
| /llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 329 unsigned TZ = llvm::countr_zero(ITState.Mask); in forwardITPosition() local
339 unsigned TZ = llvm::countr_zero(ITState.Mask); in rewindImplicitITPosition() local
382 unsigned TZ = llvm::countr_zero(ITState.Mask); in extendImplicitITBlock() local
421 unsigned TZ in forwardVPTPosition() local
[all...] |
| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 1266 uint32_t TZ = llvm::countr_zero(Mask); in ppAddrRewriteAndSrl() local
|
| /llvm-project/llvm/lib/ExecutionEngine/Interpreter/ |
| H A D | Execution.cpp | 407 #define MASK_VECTOR_NANS_T(X,Y, TZ, FLAG) \ argument
|
| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 1021 unsigned TZ = llvm::countr_zero<uint64_t>(Imm); in selectI64ImmDirect() local
1262 unsigned TZ in selectI64ImmDirectPrefix() local
[all...] |
| /llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCalls.cpp | 1904 uint64_t TZ = alignDown(Known.countMinTrailingZeros(), 8); visitCallInst() local
|
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 453 unsigned TZ = llvm::countr_zero(And_imm); PreprocessISelDAG() local
|
| /llvm-project/lldb/source/Plugins/Instruction/ARM/ |
| H A D | EmulateInstructionARM.cpp | 607 uint32_t TZ = llvm::countr_zero(ITMask); in CountITSize() local
|
| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 13925 unsigned TZ = llvm::countr_zero(C); expandMul() local
|
| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 31389 unsigned TZ = Known.countMinTrailingZeros(); LowerCTPOP() local
32576 unsigned TZ = Known.countMinTrailingZeros(); ReplaceNodeResults() local
[all...] |