/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | LiveVariables.cpp | 245 for (MCPhysReg SubReg : TRI->subregs_inclusive(DefReg)) in HandlePhysRegUse() local 282 LastPartialDef->addOperand(MachineOperand::CreateReg(SubReg, in FindLastRefOrPartRef() local 194 for (MCPhysReg SubReg : TRI->subregs(Reg)) { FindLastPartialDef() local 215 for (MCPhysReg SubReg : TRI->subregs_inclusive(DefReg)) FindLastPartialDef() local 267 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) HandlePhysRegUse() local 330 for (MCPhysReg SubReg : TRI->subregs(Reg)) { HandlePhysRegKill() local 359 for (MCPhysReg SubReg : TRI->subregs(Reg)) { HandlePhysRegKill() local 436 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) HandlePhysRegDef() local 439 for (MCPhysReg SubReg : TRI->subregs(Reg)) { HandlePhysRegDef() local 459 for (MCPhysReg SubReg : TRI->subregs(Reg)) { HandlePhysRegDef() local 474 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) { UpdatePhysRegDefs() local [all...] |
H A D | LiveIntervalCalc.cpp | 58 unsigned SubReg = MO.getSubReg(); in calculate() local 158 unsigned SubReg = MO.getSubReg(); in extendToUses() local
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H A D | DetectDeadLanes.cpp | 92 unsigned SubReg = MI.getOperand(2).getImm(); in isCrossCopy() local 343 unsigned SubReg = MO.getSubReg(); in determineInitialUsedLanes() local 419 unsigned SubReg = MO.getSubReg(); in isUndefRegAtInput() local
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H A D | MachineInstrBundle.cpp | 200 if (LocalDefSet.insert(SubReg).second) in finalizeBundle() local 320 unsigned SubReg = MO.getSubReg(); AnalyzeVirtRegLanesInBundle() local
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H A D | LiveRangeEdit.cpp | 140 unsigned SubReg = MO.getSubReg(); in allUsesAvailableAt() local 273 unsigned SubReg = MO.getSubReg(); in useIsKill() local
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H A D | LiveIntervals.cpp | 559 unsigned SubReg = MO.getSubReg(); shrinkToUses() local 777 unsigned SubReg = MO.getSubReg(); addKillFlags() local 1019 unsigned SubReg = MO.getSubReg(); updateAllRanges() local 1036 unsigned SubReg = MO.getSubReg(); updateAllRanges() local 1450 unsigned SubReg = MO.getSubReg(); findLastUseBefore() local 1585 unsigned SubReg = MO.getSubReg(); repairOldRegInRange() local [all...] |
H A D | CriticalAntiDepBreaker.cpp | 216 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) in PrescanInstruction() local 240 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) { in PrescanInstruction() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64AdvSIMDScalarPass.cpp | 104 static bool isGPR64(unsigned Reg, unsigned SubReg, in isGPR64() 113 static bool isFPR64(unsigned Reg, unsigned SubReg, in isFPR64() 129 unsigned &SubReg) { in getSrcFromCopy() 245 unsigned SubReg; in isProfitableToTransform() local
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H A D | AArch64RegisterInfo.cpp | 333 for (MCPhysReg SubReg : UpdateCustomCallPreservedMask() local 442 for (MCPhysReg SubReg : subregs_inclusive(AArch64::ZA)) getStrictlyReservedRegs() local 447 for (MCSubRegIterator SubReg(AArch64::ZT0, this, /*self=*/true); getStrictlyReservedRegs() local 1019 shouldCoalesce(MachineInstr * MI,const TargetRegisterClass * SrcRC,unsigned SubReg,const TargetRegisterClass * DstRC,unsigned DstSubReg,const TargetRegisterClass * NewRC,LiveIntervals & LIS) const shouldCoalesce() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | GCNRewritePartialRegUses.cpp | 86 unsigned SubReg = AMDGPU::NoSubRegister; member 180 unsigned GCNRewritePartialRegUses::shiftSubReg(unsigned SubReg, in shiftSubReg() argument 426 const unsigned SubReg = MO.getSubReg(); rewriteReg() local 469 unsigned SubReg = SubRegs[MO.getSubReg()].SubReg; rewriteReg() local [all...] |
H A D | SIRegisterInfo.h | 388 unsigned getChannelFromSubReg(unsigned SubReg) const { in getChannelFromSubReg() 393 unsigned getNumChannelsFromSubReg(unsigned SubReg) const { in getNumChannelsFromSubReg()
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H A D | SIPreAllocateWWMRegs.cpp | 133 const unsigned SubReg = MO.getSubReg(); in rewriteRegs() local
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H A D | SIRegisterInfo.cpp | 1533 Register SubReg = e == 1 buildSpillLoadStore() local 1774 Register SubReg = spillSGPR() local 1828 Register SubReg = spillSGPR() local 1890 Register SubReg = restoreSGPR() local 1923 Register SubReg = restoreSGPR() local 1970 Register SubReg = spillEmergencySGPR() local 2005 Register SubReg = spillEmergencySGPR() local 3020 shouldCoalesce(MachineInstr * MI,const TargetRegisterClass * SrcRC,unsigned SubReg,const TargetRegisterClass * DstRC,unsigned DstSubReg,const TargetRegisterClass * NewRC,LiveIntervals & LIS) const shouldCoalesce() argument 3147 findReachingDef(Register Reg,unsigned SubReg,MachineInstr & Use,MachineRegisterInfo & MRI,LiveIntervals * LIS) const findReachingDef() argument [all...] |
H A D | SIFormMemoryClauses.cpp | 374 for (unsigned SubReg : KilledIndexes) { in runOnMachineFunction() local
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H A D | SIFrameLowering.cpp | 254 Register SubReg = NumSubRegs == 1 in saveToMemory() local 275 Register SubReg = NumSubRegs == 1 in saveToVGPRLane() local 302 Register SubReg = NumSubRegs == 1 in restoreFromMemory() local 321 Register SubReg = NumSubRegs == 1 in restoreFromVGPRLane() local
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H A D | R600OptimizeVectorRegisters.cpp | 194 unsigned SubReg = It.first; RebuildVector() local
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H A D | SIFixSGPRCopies.cpp | 295 unsigned SubReg = CopyUse.getOperand(1).getSubReg(); in foldVGPRCopyIntoRegSequence() local 1064 unsigned SubReg = MI->getOperand(1).getSubReg(); lowerVGPR2SGPRCopies() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsOptionRecord.cpp | 77 for (const MCPhysReg &SubReg : MCRegInfo->subregs_inclusive(Reg)) { SetPhysRegUsed() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | LivePhysRegs.h | 84 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) addReg() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.cpp | 558 Reserved.set(SubReg); in getReservedRegs() local 546 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RSP)) getReservedRegs() local 553 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RIP)) getReservedRegs() local 572 for (const MCPhysReg &SubReg : subregs_inclusive(BasePtr)) getReservedRegs() local
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/freebsd-src/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | CodeGenRegisters.cpp |
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRRegisterInfo.cpp | 314 MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFMIPeephole.cpp | 221 Register SubReg = MovMI->getOperand(1).getReg(); in eliminateZExtSeq() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 354 const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZRegisterInfo.cpp | 381 unsigned SubReg, in shouldCoalesce()
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