Lines Matching defs:SubReg

1542     Register SubReg = e == 1
1605       SubReg = Register(getSubReg(ValueReg,
1611     unsigned FinalReg = SubReg;
1624                            .addReg(SubReg, getKillRegState(IsKill));
1629       SubReg = TmpIntermediateVGPR;
1645             .addReg(SubReg, getDefRegState(!IsStore) | getKillRegState(IsKill));
1713         MI->readsRegister(SubReg, this)) {
1714       MIB.addReg(SubReg, RegState::Implicit);
1782       Register SubReg =
1797                      .addReg(SubReg, getKillRegState(UseKill))
1823     // SubReg carries the "Kill" flag when SubReg == SB.SuperReg.
1836         Register SubReg =
1844                 .addReg(SubReg, SubKillState)
1898       Register SubReg =
1905                          SB.TII.get(AMDGPU::SI_RESTORE_S32_FROM_VGPR), SubReg)
1931         Register SubReg =
1938                            SB.TII.get(AMDGPU::SI_RESTORE_S32_FROM_VGPR), SubReg)
1978       Register SubReg =
1986               .addReg(SubReg, SubKillState)
2013       Register SubReg =
2019                          SubReg)
3029                                     unsigned SubReg,
3156 MachineInstr *SIRegisterInfo::findReachingDef(Register Reg, unsigned SubReg,
3168     LaneBitmask SubLanes = SubReg ? getSubRegIndexLaneMask(SubReg)
3277                                           unsigned SubReg) const {
3280     return std::min(128u, getSubRegIdxSize(SubReg));
3284     return std::min(32u, getSubRegIdxSize(SubReg));