/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | MVELaneInterleavingPass.cpp | 364 Value *Shuffle = Builder.CreateShuffleVector(I->getOperand(0), LeafMask); in tryInterleave() local 377 Value *Shuffle = Builder.CreateShuffleVector(I->get(), LeafMask); in tryInterleave() local
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H A D | ARMISelLowering.cpp | 8363 SDValue Shuffle = buildLegalVectorShuffle(ShuffleVT, dl, ShuffleOps[0], ReconstructShuffle() local 16672 if (auto *Shuffle = dyn_cast<ShuffleVectorSDNode>(Trunc.getOperand(0))) PerformSplittingToNarrowingStores() local 19357 Instruction *Shuffle = Op; shouldSinkOperands() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | UseListOrder.h | 29 std::vector<unsigned> Shuffle; member
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/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | InterleavedAccessPass.cpp | 333 for (auto *Shuffle : Shuffles) { lowerInterleavedLoad() local 343 for (auto *Shuffle : BinOpShuffles) { lowerInterleavedLoad() local 433 for (auto *Shuffle : Shuffles) { tryReplaceExtracts() local [all...] |
H A D | ComplexDeinterleavingPass.cpp | 1729 Value *Op = Shuffle->getOperand(0); in identifyDeinterleave() argument 1742 if (!CheckType(Shuffle)) in identifyDeinterleave() argument [all...] |
H A D | CodeGenPrepare.cpp | 7211 Value *Shuffle = Builder.CreateVectorSplat(NewVecType->getNumElements(), BC1); optimizeShuffleVectorInst() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86PartialReduction.cpp | 390 auto *Shuffle = dyn_cast<ShuffleVectorInst>(LHS); in matchAddReduction() local
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H A D | X86InstCombineIntrinsic.cpp | 498 auto *Shuffle = Builder.CreateShuffleVector(Arg0, Arg1, PackMask); simplifyX86pack() local
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H A D | X86ISelLowering.cpp | 15497 if (SDValue Shuffle = ShuffleSubLanes(Scale)) lowerShuffleAsRepeatedMaskAndLanePermute() local 17345 SDValue Shuffle = DAG.getVectorShuffle(ExtVT, DL, V1, V2, Mask); lower1BitShuffle() local 19356 SDValue Shuffle = DAG.getVectorShuffle(MVT::v2f64, dl, Sub, Sub, {1,-1}); LowerUINT_TO_FP_i64() local 37075 matchUnaryShuffle(MVT MaskVT,ArrayRef<int> Mask,bool AllowFloatDomain,bool AllowIntDomain,SDValue V1,const SelectionDAG & DAG,const X86Subtarget & Subtarget,unsigned & Shuffle,MVT & SrcVT,MVT & DstVT) matchUnaryShuffle() argument 37231 matchUnaryPermuteShuffle(MVT MaskVT,ArrayRef<int> Mask,const APInt & Zeroable,bool AllowFloatDomain,bool AllowIntDomain,const SelectionDAG & DAG,const X86Subtarget & Subtarget,unsigned & Shuffle,MVT & ShuffleVT,unsigned & PermuteImm) matchUnaryPermuteShuffle() argument 37379 matchBinaryShuffle(MVT MaskVT,ArrayRef<int> Mask,bool AllowFloatDomain,bool AllowIntDomain,SDValue & V1,SDValue & V2,const SDLoc & DL,SelectionDAG & DAG,const X86Subtarget & Subtarget,unsigned & Shuffle,MVT & SrcVT,MVT & DstVT,bool IsUnary) matchBinaryShuffle() argument 37575 matchBinaryPermuteShuffle(MVT MaskVT,ArrayRef<int> Mask,const APInt & Zeroable,bool AllowFloatDomain,bool AllowIntDomain,SDValue & V1,SDValue & V2,const SDLoc & DL,SelectionDAG & DAG,const X86Subtarget & Subtarget,unsigned & Shuffle,MVT & ShuffleVT,unsigned & PermuteImm) matchBinaryPermuteShuffle() argument 38012 unsigned Shuffle, PermuteImm; combineX86ShuffleChain() local 39358 if (SDValue Shuffle = combineX86ShuffleChain( combineX86ShufflesRecursively() local 40874 if (SDValue Shuffle = combineTargetShuffle(Op, DAG, DCI, Subtarget)) combineShuffle() local 43555 SDValue Shuffle = combineVPDPBUSDPattern() local 43629 SDValue Shuffle = combineBasicSADPattern() local 48791 if (SDValue Shuffle = combineX86ShufflesRecursively( combineAnd() local [all...] |
/freebsd-src/contrib/googletest/googletest/src/ |
H A D | gtest-internal-inl.h | 328 inline void Shuffle(internal::Random* random, std::vector<E>* v) { Shuffle() function
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostLegalizerCombiner.cpp | 90 MachineInstr *Shuffle = in matchExtractVecEltPairwiseAdd() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstCombineIntrinsic.cpp | 1353 auto *Shuffle = IC.Builder.CreateShuffleVector(NewCall, EltMask); simplifyAMDGCNMemoryIntrinsicDemanded() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineSimplifyDemanded.cpp | 1516 auto *Shuffle = cast<ShuffleVectorInst>(I); SimplifyDemandedVectorElts() local [all...] |
H A D | InstCombineCalls.cpp | 3055 Value *Shuffle = Builder.CreateShuffleVector(Vec, WidenShuffle, Mask); visitCallInst() local 3111 Value *Shuffle = Builder.CreateShuffleVector(Vec, Mask); visitCallInst() local
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H A D | InstCombineVectorOps.cpp | 340 ShuffleVectorInst *Shuffle = cast<ShuffleVectorInst>(UserInstr); in findDemandedEltsBySingleUser() local
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/freebsd-src/contrib/llvm-project/llvm/lib/IR/ |
H A D | AsmWriter.cpp | 232 std::vector<unsigned> Shuffle(List.size()); in predictValueUseListOrder() local 246 std::vector<unsigned> Shuffle = in predictUseListOrder() local 4696 printUseListOrder(const Value * V,const std::vector<unsigned> & Shuffle) printUseListOrder() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
H A D | VectorCombine.cpp | 1437 ShuffleVectorInst *Shuffle = nullptr; foldShuffleFromReductions() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/include/llvm/Analysis/ |
H A D | TargetTransformInfoImpl.h | 1309 auto *Shuffle = dyn_cast<ShuffleVectorInst>(U); getInstructionCost() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 11141 SDValue Shuffle = ReconstructShuffle() local 11305 SDValue Shuffle = DAG.getVectorShuffle(ShuffleVT, dl, ShuffleOps[0], ReconstructShuffle() local 11936 SDValue Shuffle; GenerateTBL() local 13260 if (SDValue Shuffle = ReconstructShuffle(Op, DAG)) LowerBUILD_VECTOR() local 13263 if (SDValue Shuffle = ReconstructShuffleWithRuntimeMask(Op, DAG)) LowerBUILD_VECTOR() local 15183 ShuffleVectorInst *Shuffle = dyn_cast<ShuffleVectorInst>(Op); shouldSinkOperands() local 15930 Value *Shuffle; lowerInterleavedStore() local 18080 ShuffleVectorSDNode *Shuffle = dyn_cast<ShuffleVectorSDNode>(N01); performExtractVectorEltCombine() local 26604 SDValue Shuffle; GenerateFixedLengthSVETBL() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorTypes.cpp | 2499 auto *Shuffle = dyn_cast<ShuffleVectorSDNode>(Input.getNode()); SplitVecRes_VECTOR_SHUFFLE() local 2521 auto *Shuffle = SplitVecRes_VECTOR_SHUFFLE() local 2609 auto *Shuffle = dyn_cast<ShuffleVectorSDNode>(Inputs[I].getNode()); SplitVecRes_VECTOR_SHUFFLE() local [all...] |
H A D | LegalizeDAG.cpp | 1877 SDValue Shuffle; ExpandBVWithShuffles() local
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H A D | DAGCombiner.cpp | 7190 if (SDValue Shuffle = XformToShuffleWithZero(N)) visitAND() local 21623 auto *Shuffle = dyn_cast<ShuffleVectorSDNode>(N->getOperand(0)); combineInsertEltToLoad() local 22858 SDValue Shuffle = DAG.getVectorShuffle(InVT1, DL, VecIn1, VecIn2, Mask); createBuildVecShuffle() local 23123 if (SDValue Shuffle = createBuildVecShuffle(DL, N, VectorMask, VecLeft, reduceBuildVecToShuffle() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 2462 auto Shuffle = cast<ShuffleVectorSDNode>(N); performVECTOR_SHUFFLECombine() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLoweringHVX.cpp | 3554 auto AppendToMask = [&](SDValue Shuffle) { in combineConcatVectorsBeforeLegal()
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 15605 SDValue Shuffle = PerformDAGCombine() local 15668 SDValue Shuffle = DAG.getVectorShuffle(VT, DL, MSN->getValue(), PerformDAGCombine() local 20123 Value *Shuffle = Builder.CreateShuffleVector( lowerInterleavedStore() local
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