Lines Matching defs:Shuffle

8380   SDValue Shuffle = buildLegalVectorShuffle(ShuffleVT, dl, ShuffleOps[0],
8382   if (!Shuffle)
8384   return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, Shuffle);
16685   if (auto *Shuffle = dyn_cast<ShuffleVectorSDNode>(Trunc.getOperand(0)))
16686     if (isVMOVNShuffle(Shuffle, false) || isVMOVNShuffle(Shuffle, true))
19379     Instruction *Shuffle = Op;
19380     if (Shuffle->getOpcode() == Instruction::BitCast)
19381       Shuffle = dyn_cast<Instruction>(Shuffle->getOperand(0));
19383     if (!Shuffle ||
19384         !match(Shuffle, m_Shuffle(
19399     Ops.push_back(&Shuffle->getOperandUse(0));
19400     if (Shuffle != Op)