/freebsd-src/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchISelDAGToDAG.h | 50 selectShiftMaskGRLen(SDValue N,SDValue & ShAmt) selectShiftMaskGRLen() argument 53 selectShiftMask32(SDValue N,SDValue & ShAmt) selectShiftMask32() argument
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H A D | LoongArchISelDAGToDAG.cpp | 228 selectShiftMask(SDValue N,unsigned ShiftWidth,SDValue & ShAmt) selectShiftMask() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCasts.cpp | 502 Value *ShAmt = matchShiftAmount(ShAmt0, ShAmt1, NarrowWidth); narrowFunnelShift() local 597 if (Constant *ShAmt = ConstantFoldIntegerCast(C, A->getType(), narrowBinOp() local 778 Constant *ShAmt = ConstantFoldSelectInstruction(Cmp, C, MaxAmt); visitTrunc() local 785 Constant *ShAmt = GetNewShAmt(DestWidth); visitTrunc() local 793 Constant *ShAmt = GetNewShAmt(AWidth); visitTrunc() local 927 uint32_t ShAmt = KnownZeroMask.logBase2(); transformZExtICmp() local 958 Value *X, *ShAmt; transformZExtICmp() local 1427 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize); visitSExt() local 1443 Constant *ShAmt = ConstantInt::get(DestTy, DestBitSize - SrcBitSize); visitSExt() local [all...] |
H A D | InstCombineNegator.cpp | 259 Constant *ShAmt; visitImpl() local
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H A D | InstCombineShifts.cpp | 628 __anon5dec4a760302(unsigned ShAmt) foldShiftedShift() argument 904 const unsigned ShAmt = ShAmtAPInt->getZExtValue(); foldLShrOverflowBit() local 1580 unsigned ShAmt = ShAmtAPInt->getZExtValue(); visitAShr() local [all...] |
H A D | InstCombineAddSub.cpp | 950 unsigned ShAmt = 0; foldAddWithConstant() local 1380 Value *X, *Y, *ShAmt; factorizeMathWithShlOps() local 2554 const APInt *ShAmt; visitSub() local [all...] |
H A D | InstCombineVectorOps.cpp | 291 unsigned ShAmt = Chunk * DestWidth; in foldBitcastExtElt() local 1570 uint64_t ShAmt; foldTruncInsEltPair() local
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H A D | InstCombineAndOrXor.cpp | 2088 Value *ShAmt; foldBinOpOfDisplacedShifts() local 2831 Value *ShAmt = matchShiftAmount(ShAmt0, ShAmt1, Width); matchFunnelShift() local 4188 const APInt *ShAmt; canonicalizeAbs() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPULateCodeGenPrepare.cpp | 180 unsigned ShAmt = Adjust * 8; visitLoadInst() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.h | 88 bool selectShiftMaskXLen(SDValue N, SDValue &ShAmt) { in selectShiftMaskXLen() argument 91 bool selectShiftMask32(SDValue N, SDValue &ShAmt) { in selectShiftMask32() argument [all...] |
H A D | RISCVISelDAGToDAG.cpp | 647 uint64_t ShAmt = ShlCst->getZExtValue(); tryShrinkShlLogicImm() local 981 unsigned ShAmt = N1C->getZExtValue(); Select() local 1010 unsigned ShAmt = N1C->getZExtValue(); Select() local 1094 unsigned ShAmt = N1C->getZExtValue(); Select() local 2546 selectShiftMask(SDValue N,unsigned ShiftWidth,SDValue & ShAmt) selectShiftMask() argument 2731 selectSHXADDOp(SDValue N,unsigned ShAmt,SDValue & Val) selectSHXADDOp() argument 2826 selectSHXADD_UWOp(SDValue N,unsigned ShAmt,SDValue & Val) selectSHXADD_UWOp() argument 3004 unsigned ShAmt = User->getConstantOperandVal(1); hasAllNBitUsers() local [all...] |
H A D | RISCVMergeBaseOffset.cpp | 279 unsigned ShAmt; foldShiftedOffset() local
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H A D | RISCVOptWInstrs.cpp | 197 unsigned ShAmt = UserMI->getOperand(2).getImm(); hasAllNBitUsers() local
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H A D | RISCVTargetTransformInfo.cpp | 130 unsigned ShAmt = cast<ConstantInt>(BO->getOperand(1))->getZExtValue(); canUseShiftPair() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
H A D | AggressiveInstCombine.cpp | 67 __anon613858650102(Value *V, Value *&ShVal0, Value *&ShVal1, Value *&ShAmt) foldGuardedFunnelShift() argument 99 Value *ShVal0, *ShVal1, *ShAmt; foldGuardedFunnelShift() local [all...] |
/freebsd-src/contrib/llvm-project/clang/lib/Lex/ |
H A D | PPExpressions.cpp | 744 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); in EvaluateDirectiveSubExpr() local
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/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 789 unsigned ShAmt = MaxSA->getZExtValue(); SimplifyMultipleUseDemandedBits() local 1729 unsigned ShAmt = SA->getZExtValue(); SimplifyDemandedBits() local 1888 unsigned ShAmt = MaxSA->getZExtValue(); SimplifyDemandedBits() local 1909 unsigned ShAmt = SA->getZExtValue(); SimplifyDemandedBits() local 2015 unsigned ShAmt = SA->getZExtValue(); SimplifyDemandedBits() local 2293 SDValue ShAmt = TLO.DAG.getConstant(ShiftAmount, dl, ShiftAmtTy); SimplifyDemandedBits() local 2671 SDValue ShAmt = TLO.DAG.getConstant(ShVal, dl, VT); SimplifyDemandedBits() local 2866 if (unsigned ShAmt = getShiftLeftAmt(Op0)) SimplifyDemandedBits() local 2869 if (unsigned ShAmt = getShiftLeftAmt(Op1)) SimplifyDemandedBits() local 2874 if (unsigned ShAmt = getShiftLeftAmt(Op1)) SimplifyDemandedBits() local 4355 unsigned ShAmt = ShAmtC->getZExtValue(); foldSetCCWithFunnelShift() local 4476 if (ConstantSDNode *ShAmt = isConstOrConstSplat(N0.getOperand(1))) { SimplifySetCC() local 7779 SDValue ShAmt, InvShAmt; expandVPFunnelShift() local 7882 SDValue ShAmt, InvShAmt; expandFunnelShift() local 7959 SDValue ShAmt = DAG.getNode(ISD::AND, DL, ShVT, Op1, BitWidthMinusOneC); expandROT() local 7967 SDValue ShAmt = DAG.getNode(ISD::UREM, DL, ShVT, Op1, BitWidthC); expandROT() local 7988 SDValue ShAmt = Node->getOperand(2); expandShiftParts() local [all...] |
H A D | LegalizeIntegerTypes.cpp | 537 SDValue ShAmt = DAG.getShiftAmountConstant(DiffBits, NVT, dl); PromoteIntRes_BSWAP() local 565 SDValue ShAmt = DAG.getShiftAmountConstant(DiffBits, NVT, dl); PromoteIntRes_BITREVERSE() local 2162 SDValue ShAmt = DAG.getShiftAmountConstant(Diff, VT, dl); PromoteIntOp_VP_SIGN_EXTEND() local 4423 SDValue ShAmt = N->getOperand(1); ExpandIntRes_ShiftThroughStack() local 4634 SDValue ShAmt = DAG.getZExtOrTrunc(N->getOperand(1), dl, ShAmtTy); ExpandIntRes_Shift() local 5037 SDValue ShAmt = N->getOperand(2); ExpandIntRes_FunnelShift() local [all...] |
H A D | DAGCombiner.cpp | 2685 SDValue ShAmt = ShiftOp.getOperand(1); foldAddSubOfSignBit() local 4113 SDValue ShAmt = N1.getOperand(1); visitSUB() local 4483 unsigned ShAmt = visitMUL() local 6452 isLegalNarrowLdSt(LSBaseSDNode * LDST,ISD::LoadExtType ExtType,EVT & MemVT,unsigned ShAmt) isLegalNarrowLdSt() argument 7626 SDValue ShAmt = DAG.getConstant(16, DL, ShiftAmountTy); matchBSwapHWordOrAndAnd() local 7689 SDValue ShAmt = DAG.getConstant(16, DL, getShiftAmountTy(VT)); MatchBSwapHWord() local 10682 unsigned ShAmt = UnknownBits.countr_zero(); visitSRL() local 10793 unsigned ShAmt = Cst->getZExtValue(); visitFunnelShift() local 11040 auto *ShAmt = dyn_cast<ConstantSDNode>(N0.getOperand(1)); visitBSWAP() local 11063 auto *ShAmt = dyn_cast<ConstantSDNode>(N0.getOperand(1)); visitBSWAP() local 13880 SDValue ShAmt = N0.getOperand(1); visitZERO_EXTEND() local 14190 unsigned ShAmt = 0; reduceLoadWidth() local 14343 __anon29909ce22f02(unsigned ShAmt) reduceLoadWidth() argument 14495 if (auto *ShAmt = dyn_cast<ConstantSDNode>(N0.getOperand(1))) visitSIGN_EXTEND_INREG() local 19606 unsigned ShAmt = Imm.countr_zero(); ReduceLoadOpStoreWidth() local 21404 ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op1.getOperand(1)); splitMergedValStore() local 22119 unsigned ShAmt = ShAmtC->getZExtValue(); refineExtractVectorEltIntoMultipleNarrowExtractVectorElts() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Support/ |
H A D | APInt.cpp | 1994 sshl_ov(const APInt & ShAmt,bool & Overflow) const sshl_ov() argument 1998 sshl_ov(unsigned ShAmt,bool & Overflow) const sshl_ov() argument 2011 ushl_ov(const APInt & ShAmt,bool & Overflow) const ushl_ov() argument 2015 ushl_ov(unsigned ShAmt,bool & Overflow) const ushl_ov() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 1245 SDValue ShAmt = Op.getOperand(2); LowerSHL_PARTS() local 1293 SDValue ShAmt = Op.getOperand(2); LowerSRL_PARTS() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 1009 isTruncatedShiftCountForLEA(unsigned ShAmt) isTruncatedShiftCountForLEA() argument 1260 unsigned ShAmt = MI.getOperand(2).getImm(); convertToThreeAddressWithLEA() local 1419 unsigned ShAmt = getTruncatedShiftCount(MI, 2); convertToThreeAddress() local 1439 unsigned ShAmt = getTruncatedShiftCount(MI, 2); convertToThreeAddress() local 1473 unsigned ShAmt = getTruncatedShiftCount(MI, 2); convertToThreeAddress() local 4849 unsigned ShAmt = getTruncatedShiftCount(MI, 2); isDefConvertible() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 545 isShifterOpProfitable(const SDValue & Shift,ARM_AM::ShiftOpc ShOpcVal,unsigned ShAmt) isShifterOpProfitable() argument 737 unsigned ShAmt = Log2_32(RHSC); SelectLdStSOReg() local 765 unsigned ShAmt = 0; SelectLdStSOReg() local 844 unsigned ShAmt = 0; SelectAddrMode2OffsetReg() local 1505 unsigned ShAmt = 0; SelectT2AddrModeSoReg() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/IR/ |
H A D | ConstantFold.cpp | 162 APInt ShAmt = Amt->getValue(); ExtractConstantBytes() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 2426 SDValue ShAmt = Op.getOperand(2); LowerShiftRightParts() local 2487 SDValue ShAmt = Op.getOperand(2); LowerShiftLeftParts() local [all...] |