Lines Matching defs:ShAmt
754 EVT &MemVT, unsigned ShAmt = 0);
2607 SDValue ShAmt = ShiftOp.getOperand(1);
2608 ConstantSDNode *ShAmtC = isConstOrConstSplat(ShAmt);
2619 Not.getOperand(0), ShAmt);
4071 SDValue ShAmt = N1.getOperand(1);
4072 ConstantSDNode *ShAmtC = isConstOrConstSplat(ShAmt);
4074 SDValue SRA = DAG.getNode(ISD::SRA, DL, VT, N1.getOperand(0), ShAmt);
4439 unsigned ShAmt =
4441 ShAmt += TZeros;
4442 assert(ShAmt < BitWidth &&
4445 DAG.getNode(ISD::SHL, DL, VT, N0, DAG.getConstant(ShAmt, DL, VT));
6456 unsigned ShAmt) {
6460 if (ShAmt % 8)
6484 if (ShAmt) {
6485 assert(ShAmt % 8 == 0 && "ShAmt is byte offset");
6486 const unsigned ByteShAmt = ShAmt / 8;
6523 Load->getMemoryVT().getSizeInBits() < MemVT.getSizeInBits() + ShAmt)
6532 if (Store->getMemoryVT().getSizeInBits() < MemVT.getSizeInBits() + ShAmt)
7616 SDValue ShAmt = DAG.getShiftAmountConstant(16, VT, DL);
7617 return DAG.getNode(ISD::ROTR, DL, VT, BSwap, ShAmt);
7677 SDValue ShAmt = DAG.getShiftAmountConstant(16, VT, DL);
7679 return DAG.getNode(ISD::ROTL, DL, VT, BSwap, ShAmt);
7681 return DAG.getNode(ISD::ROTR, DL, VT, BSwap, ShAmt);
7683 DAG.getNode(ISD::SHL, DL, VT, BSwap, ShAmt),
7684 DAG.getNode(ISD::SRL, DL, VT, BSwap, ShAmt));
10696 unsigned ShAmt = UnknownBits.countr_zero();
10699 if (ShAmt) {
10702 DAG.getShiftAmountConstant(ShAmt, VT, DL));
10804 unsigned ShAmt = Cst->getZExtValue();
10805 if (ShAmt == 0)
10815 DAG.getConstant(IsFSHL ? BitWidth - ShAmt : ShAmt, DL, ShAmtTy));
10819 DAG.getConstant(IsFSHL ? ShAmt : BitWidth - ShAmt, DL, ShAmtTy));
10826 if ((BitWidth % 8) == 0 && (ShAmt % 8) == 0 && !VT.isVector() &&
10837 IsFSHL ? (((BitWidth - ShAmt) % BitWidth) / 8) : (ShAmt / 8);
11051 auto *ShAmt = dyn_cast<ConstantSDNode>(N0.getOperand(1));
11053 if (ShAmt && ShAmt->getAPIntValue().ult(BW) &&
11054 ShAmt->getZExtValue() >= (BW / 2) &&
11055 (ShAmt->getZExtValue() % 16) == 0 && TLI.isTypeLegal(HalfVT) &&
11059 if (uint64_t NewShAmt = (ShAmt->getZExtValue() - (BW / 2)))
11074 auto *ShAmt = dyn_cast<ConstantSDNode>(N0.getOperand(1));
11075 if (ShAmt && ShAmt->getAPIntValue().ult(BW) &&
11076 ShAmt->getZExtValue() % 8 == 0) {
14113 SDValue ShAmt = N0.getOperand(1);
14114 if (auto *ShAmtC = dyn_cast<ConstantSDNode>(ShAmt)) {
14136 if (Log2_32_Ceil(VT.getSizeInBits()) > ShAmt.getValueSizeInBits())
14137 ShAmt = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i32, ShAmt);
14140 DAG.getNode(ISD::ZERO_EXTEND, DL, VT, ShVal), ShAmt);
14436 // The ShAmt variable is used to indicate that we've consumed a right
14438 // ShAmt least significant bits.
14439 unsigned ShAmt = 0;
14442 // to indicate that the narrowed load should be left-shifted ShAmt bits to get
14463 ShAmt = N1C->getZExtValue();
14465 if (MemoryWidth <= ShAmt)
14469 ExtVT = EVT::getIntegerVT(*DAG.getContext(), MemoryWidth - ShAmt);
14488 } else if (Mask.isShiftedMask(ShAmt, ActiveBits)) {
14489 ShiftedOffset = ShAmt;
14498 // In case Opc==SRL we've already prepared ExtVT/ExtType/ShAmt based on doing
14523 ShAmt = SRL1C->getZExtValue();
14525 if (ShAmt >= MemoryWidth)
14535 // happened if we only adjust the load base pointer by ShAmt). Instead we
14539 if (ExtVT.getScalarSizeInBits() > MemoryWidth - ShAmt) {
14545 ExtVT = EVT::getIntegerVT(*DAG.getContext(), MemoryWidth - ShAmt);
14564 (Offset + ShAmt) < VT.getScalarSizeInBits()) {
14571 ShAmt = Offset + ShAmt;
14586 if (ShAmt == 0 && N0.getOpcode() == ISD::SHL && N0.hasOneUse() &&
14602 !isLegalNarrowLdSt(LN0, ExtType, ExtVT, ShAmt))
14605 auto AdjustBigEndianShift = [&](unsigned ShAmt) {
14609 return LVTStoreBits - EVTStoreBits - ShAmt;
14612 // We need to adjust the pointer to the load by ShAmt bits in order to load
14615 DAG.getDataLayout().isBigEndian() ? AdjustBigEndianShift(ShAmt) : ShAmt;
14754 if (auto *ShAmt = dyn_cast<ConstantSDNode>(N0.getOperand(1)))
14755 if (ShAmt->getAPIntValue().ule(VTBits - ExtVTBits)) {
14759 if (((VTBits - ExtVTBits) - ShAmt->getZExtValue()) < InSignBits)
19944 unsigned ShAmt = Imm.countr_zero();
19946 unsigned NewBW = NextPowerOf2(MSB - ShAmt);
19962 if (ShAmt % NewBW)
19963 ShAmt = (((ShAmt + NewBW - 1) / NewBW) * NewBW) - NewBW;
19964 APInt Mask = APInt::getBitsSet(BitWidth, ShAmt,
19965 std::min(BitWidth, ShAmt + NewBW));
19967 APInt NewImm = (Imm & Mask).lshr(ShAmt).trunc(NewBW);
19970 uint64_t PtrOff = ShAmt / 8;
21772 ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op1.getOperand(1));
21773 if (!ShAmt || ShAmt->getAPIntValue() != HalfValBitSize)
22486 unsigned ShAmt = ShAmtC->getZExtValue();
22487 Worklist.emplace_back(User, E.BitPos + ShAmt, E.NumBits - ShAmt);