Lines Matching defs:ShAmt

645   uint64_t ShAmt = ShlCst->getZExtValue();
649   uint64_t RemovedBitsMask = maskTrailingOnes<uint64_t>(ShAmt);
653   int64_t ShiftedVal = Val >> ShAmt;
658   if (SignExt && ShAmt >= 32)
677                              CurDAG->getTargetConstant(ShAmt, DL, VT));
1080     unsigned ShAmt = N1C->getZExtValue();
1085     if (ShAmt <= 32 && isShiftedMask_64(Mask)) {
1095             CurDAG->getTargetConstant(TrailingZeros + ShAmt, DL, VT));
1109     unsigned ShAmt = N1C->getZExtValue();
1118       if (LeadingZeros == 32 && TrailingZeros > ShAmt) {
1124             CurDAG->getTargetConstant(TrailingZeros - ShAmt, DL, VT));
1137     Mask |= maskTrailingOnes<uint64_t>(ShAmt);
1141     if (ShAmt >= TrailingOnes)
1147           N0->getOperand(0), CurDAG->getTargetConstant(ShAmt, DL, VT));
1156     // If C2 is (1 << ShAmt) use bexti or th.tst if possible.
1157     if (HasBitTest && ShAmt + 1 == TrailingOnes) {
1160           N0->getOperand(0), CurDAG->getTargetConstant(ShAmt, DL, VT));
1171         CurDAG->getTargetConstant(LShAmt + ShAmt, DL, VT));
1193     unsigned ShAmt = N1C->getZExtValue();
1197     if (ExtSize >= 32 || ShAmt >= ExtSize)
1205         CurDAG->getTargetConstant(LShAmt + ShAmt, DL, VT));
2747                                         SDValue &ShAmt) {
2748   ShAmt = N;
2751   if (ShAmt->getOpcode() == ISD::ZERO_EXTEND)
2752     ShAmt = ShAmt.getOperand(0);
2757   if (ShAmt.getOpcode() == ISD::AND &&
2758       isa<ConstantSDNode>(ShAmt.getOperand(1))) {
2759     const APInt &AndMask = ShAmt.getConstantOperandAPInt(1);
2767       ShAmt = ShAmt.getOperand(0);
2771       KnownBits Known = CurDAG->computeKnownBits(ShAmt.getOperand(0));
2774       ShAmt = ShAmt.getOperand(0);
2778   if (ShAmt.getOpcode() == ISD::ADD &&
2779       isa<ConstantSDNode>(ShAmt.getOperand(1))) {
2780     uint64_t Imm = ShAmt.getConstantOperandVal(1);
2784       ShAmt = ShAmt.getOperand(0);
2787   } else if (ShAmt.getOpcode() == ISD::SUB &&
2788              isa<ConstantSDNode>(ShAmt.getOperand(0))) {
2789     uint64_t Imm = ShAmt.getConstantOperandVal(0);
2793       SDLoc DL(ShAmt);
2794       EVT VT = ShAmt.getValueType();
2798                                                   ShAmt.getOperand(1));
2799       ShAmt = SDValue(Neg, 0);
2805       SDLoc DL(ShAmt);
2806       EVT VT = ShAmt.getValueType();
2808           CurDAG->getMachineNode(RISCV::XORI, DL, VT, ShAmt.getOperand(1),
2810       ShAmt = SDValue(Not, 0);
2930 /// into a SHXADD. \p ShAmt contains 1, 2, or 3 and is set based on which
2932 bool RISCVDAGToDAGISel::selectSHXADDOp(SDValue N, unsigned ShAmt,
2955         if (LeftShift && Leading == 0 && C2 < Trailing && Trailing == ShAmt) {
2967         if (!LeftShift && Leading == C2 && Trailing == ShAmt) {
2994         // C3 trailing zeros. If C1+C3==ShAmt we can use SRLIW+SHXADD.
2996             (Trailing + C1) == ShAmt) {
3006         // C3 trailing zeros. If C3-C1==ShAmt we can use SRLIW+SHXADD.
3008             (Trailing - C1) == ShAmt) {
3025 /// into a SHXADD_UW. \p ShAmt contains 1, 2, or 3 and is set based on which
3027 bool RISCVDAGToDAGISel::selectSHXADD_UWOp(SDValue N, unsigned ShAmt,
3040       // 32-ShAmt leading zeros and c2 trailing zeros. We can use SLLI by
3041       // c2-ShAmt followed by SHXADD_UW with ShAmt for the X amount.
3045         if (Leading == 32 - ShAmt && Trailing == C2 && Trailing > ShAmt) {
3050                             CurDAG->getTargetConstant(C2 - ShAmt, DL, VT)),
3176       // SLLI only uses the lower (XLen - ShAmt) bits.
3205       unsigned ShAmt = User->getConstantOperandVal(1);
3209       if (Bits > ShAmt && hasAllNBitUsers(User, Bits - ShAmt, Depth + 1))