/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | VLIWMachineScheduler.cpp | 108 bool VLIWResourceModel::isResourceAvailable(SUnit *SU, bool IsTop) { in isResourceAvailable() argument 145 bool VLIWResourceModel::reserveResources(SUnit *SU, bool IsTop) { in reserveResources() argument 244 SUnit *SU = SchedImpl->pickNode(IsTopNode); schedule() local 310 releaseTopNode(SUnit * SU) releaseTopNode() argument 325 releaseBottomNode(SUnit * SU) releaseBottomNode() argument 361 checkHazard(SUnit * SU) checkHazard() argument 373 releaseNode(SUnit * SU,unsigned ReadyCycle) releaseNode() argument 414 bumpNode(SUnit * SU) bumpNode() argument 451 SUnit *SU = *(Pending.begin() + i); releasePending() local 472 removeReady(SUnit * SU) removeReady() argument 511 traceCandidate(const char * Label,const ReadyQueue & Q,SUnit * SU,int Cost,PressureChange P) traceCandidate() argument 548 isSingleUnscheduledPred(SUnit * SU,SUnit * SU2) isSingleUnscheduledPred() argument 563 isSingleUnscheduledSucc(SUnit * SU,SUnit * SU2) isSingleUnscheduledSucc() argument 580 pressureChange(const SUnit * SU,bool isBotUp) pressureChange() argument 596 SchedulingCost(ReadyQueue & Q,SUnit * SU,SchedCandidate & Candidate,RegPressureDelta & Delta,bool verbose) SchedulingCost() argument 887 if (SUnit *SU = Bot.pickOnlyChoice()) { pickNodeBidrectional() local 892 if (SUnit *SU = Top.pickOnlyChoice()) { pickNodeBidrectional() local 956 SUnit *SU; pickNode() local 999 schedNode(SUnit * SU,bool IsTopNode) schedNode() argument [all...] |
H A D | LatencyPriorityQueue.cpp | 56 SUnit *LatencyPriorityQueue::getSingleUnscheduledPred(SUnit *SU) { in getSingleUnscheduledPred() 72 void LatencyPriorityQueue::push(SUnit *SU) { in push() 89 void LatencyPriorityQueue::scheduledNode(SUnit *SU) { in scheduledNode() 100 void LatencyPriorityQueue::AdjustPriorityOfUnscheduledPreds(SUnit *SU) { in AdjustPriorityOfUnscheduledPreds() 129 void LatencyPriorityQueue::remove(SUnit *SU) { in remove() 142 for (const SUnit *SU : Queue) { in dump() local
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H A D | ScheduleDAG.cpp | 223 SUnit *SU = WorkList.pop_back_val(); in setDepthDirty() local 238 SUnit *SU = WorkList.pop_back_val(); in setHeightDirty() local 497 SUnit *SU = WorkList.back(); InitDAGTopologicalSorting() local 502 SUnit *SU = PredDep.getSUnit(); InitDAGTopologicalSorting() local 571 DFS(const SUnit * SU,int UpperBound,bool & HasLoop) DFS() argument 620 const SUnit *SU = WorkList.back(); GetSubGraph() local 654 const SUnit *SU = WorkList.back(); GetSubGraph() local 704 WillCreateCycle(SUnit * TargetSU,SUnit * SU) WillCreateCycle() argument 716 AddSUnitWithoutPredecessors(const SUnit * SU) AddSUnitWithoutPredecessors() argument 724 IsReachable(const SUnit * SU,const SUnit * TargetSU) IsReachable() argument [all...] |
H A D | MultiHazardRecognizer.cpp | 34 MultiHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { in getHazardType() 48 void MultiHazardRecognizer::EmitInstruction(SUnit *SU) { in EmitInstruction() 58 unsigned MultiHazardRecognizer::PreEmitNoops(SUnit *SU) { in PreEmitNoops() 72 bool MultiHazardRecognizer::ShouldPreferAnother(SUnit *SU) { in ShouldPreferAnother()
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H A D | MachineScheduler.cpp | 735 for (SDep &Succ : SU->Succs) in releasePredecessors() argument 651 for (const SUnit *SU : Queue) dump() local 670 releaseSucc(SUnit * SU,SDep * SuccEdge) releaseSucc() argument 698 releaseSuccessors(SUnit * SU) releaseSuccessors() argument 707 releasePred(SUnit * SU,SDep * PredEdge) releasePred() argument 825 SUnit *SU = SchedImpl->pickNode(IsTopNode); schedule() local 928 updateQueues(SUnit * SU,bool IsTopNode) updateQueues() argument 976 SUnit *SU = getSUnit(&MI); dumpScheduleTraceTopDown() local 994 SUnit *SU = getSUnit(&MI); dumpScheduleTraceTopDown() local 1058 SUnit *SU = getSUnit(&MI); dumpScheduleTraceBottomUp() local 1076 SUnit *SU = getSUnit(&MI); dumpScheduleTraceBottomUp() local 1138 if (SUnit *SU = getSUnit(&MI)) dumpSchedule() local 1155 collectVRegUses(SUnit & SU) collectVRegUses() argument 1294 updateScheduledPressure(const SUnit * SU,const std::vector<unsigned> & NewMaxPressure) updateScheduledPressure() argument 1339 SUnit &SU = *V2SU.SU; updatePressureDiffs() local 1371 SUnit *SU = V2SU.SU; updatePressureDiffs() local 1394 for (const SUnit &SU : SUnits) { dump() local 1447 SUnit *SU = SchedImpl->pickNode(IsTopNode); schedule() local 1568 SUnit *SU = V2SU.SU; computeCyclicCriticalPath() local 1613 scheduleMI(SUnit * SU,bool IsTopNode) scheduleMI() argument 1697 SUnit *SU; global() member 1902 for (auto &SU : SUnits) { collectMemOpRecords() local 2297 getLatencyStallCycles(SUnit * SU) getLatencyStallCycles() argument 2416 checkHazard(SUnit * SU) checkHazard() argument 2512 releaseNode(SUnit * SU,unsigned ReadyCycle,bool InPQueue,unsigned Idx) releaseNode() argument 2637 bumpNode(SUnit * SU) bumpNode() argument 2810 SUnit *SU = *(Pending.begin() + I); releasePending() local 2829 removeReady(SUnit * SU) removeReady() argument 3341 for (const SUnit *SU : Bot.Available) { registerRoots() local 3396 getWeakLeft(const SUnit * SU,bool isTop) getWeakLeft() argument 3407 biasPhysReg(const SUnit * SU,bool isTop) biasPhysReg() argument 3444 initCandidate(SchedCandidate & Cand,SUnit * SU,bool AtTop,const RegPressureTracker & RPTracker,RegPressureTracker & TempTracker) initCandidate() argument 3631 if (SUnit *SU = Bot.pickOnlyChoice()) { pickNodeBidirectional() local 3636 if (SUnit *SU = Top.pickOnlyChoice()) { pickNodeBidirectional() local 3712 SUnit *SU; pickNode() local 3751 reschedulePhysReg(SUnit * SU,bool isTop) reschedulePhysReg() argument 3782 schedNode(SUnit * SU,bool IsTopNode) schedNode() argument 3845 for (const SUnit *SU : BotRoots) { registerRoots() local 3922 SUnit *SU; pickNode() local 3950 schedNode(SUnit * SU,bool IsTopNode) schedNode() argument 4030 SUnit *SU = ReadyQ.back(); pickNode() local 4052 schedNode(SUnit * SU,bool IsTopNode) schedNode() argument 4058 releaseBottomNode(SUnit * SU) releaseBottomNode() argument 4125 SUnit *SU; pickNode() local 4146 schedNode(SUnit * SU,bool IsTopNode) schedNode() argument 4148 releaseTopNode(SUnit * SU) releaseTopNode() argument 4151 releaseBottomNode(SUnit * SU) releaseBottomNode() argument [all...] |
H A D | MacroFusion.cpp | 38 static SUnit *getPredClusterSU(const SUnit &SU) { in getPredClusterSU() 46 bool llvm::hasLessThanNumFused(const SUnit &SU, unsigned FuseLimit) { in hasLessThanNumFused() 100 SUnit *SU = SI.getSUnit(); in fuseInstructionPair() local 113 SUnit *SU = SI.getSUnit(); in fuseInstructionPair() local
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H A D | ScheduleDAGInstrs.cpp | 104 for (const SUnit *SU : L) { in dumpSUList() local 238 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDataDeps() argument 294 addPhysRegDeps(SUnit * SU,unsigned OperIdx) addPhysRegDeps() argument 403 addVRegDefDeps(SUnit * SU,unsigned OperIdx) addVRegDefDeps() argument 522 addVRegUseDeps(SUnit * SU,unsigned OperIdx) addVRegUseDeps() argument 585 SUnit *SU = newSUnit(&MI); initSUnits() local 639 insert(SUnit * SU,ValueType V) insert() argument 677 addChainDependencies(SUnit * SU,Value2SUsMap & Val2SUsMap) addChainDependencies() argument 684 addChainDependencies(SUnit * SU,Value2SUsMap & Val2SUsMap,ValueType V) addChainDependencies() argument 698 for (auto *SU : SUs) addBarrierChain() local 825 SUnit *SU = MISUnitMap[&MI]; buildSchedGraph() local 1066 for (const auto *SU : SUs) reduceHugeMemNodeMaps() local 1071 for (const auto *SU : SUs) reduceHugeMemNodeMaps() local 1189 for (const SUnit &SU : SUnits) dump() local 1276 visitPreorder(const SUnit * SU) visitPreorder() argument 1284 visitPostorderNode(const SUnit * SU) visitPostorderNode() argument 1433 follow(const SUnit * SU) follow() argument 1454 hasDataSucc(const SUnit * SU) hasDataSucc() argument 1470 for (const SUnit &SU : SUnits) { compute() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | ResourcePriorityQueue.cpp | 67 ResourcePriorityQueue::numberRCValPredInSU(SUnit *SU, unsigned RCId) { in numberRCValPredInSU() 104 unsigned ResourcePriorityQueue::numberRCValSuccInSU(SUnit *SU, in numberRCValSuccInSU() 142 static unsigned numberCtrlDepsInSU(SUnit *SU) { in numberCtrlDepsInSU() 151 static unsigned numberCtrlPredInSU(SUnit *SU) { in numberCtrlPredInSU() 209 SUnit *ResourcePriorityQueue::getSingleUnscheduledPred(SUnit *SU) { in getSingleUnscheduledPred() 224 void ResourcePriorityQueue::push(SUnit *SU) { in push() 238 bool ResourcePriorityQueue::isResourceAvailable(SUnit *SU) { in isResourceAvailable() 281 void ResourcePriorityQueue::reserveResources(SUnit *SU) { in reserveResources() 318 int ResourcePriorityQueue::rawRegPressureDelta(SUnit *SU, unsigned RCId) { in rawRegPressureDelta() 352 int ResourcePriorityQueue::regPressureDelta(SUnit *SU, bool RawPressure) { in regPressureDelta() [all …]
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H A D | ScheduleDAGRRList.cpp | 211 bool IsReachable(const SUnit *SU, const SUnit *TargetSU) { in IsReachable() argument 217 bool WillCreateCycle(SUnit *SU, SUnit *TargetSU) { in WillCreateCycle() argument 224 void AddPredQueued(SUnit *SU, const SDep &D) { in AddPredQueued() argument 232 AddPred(SUnit * SU,const SDep & D) AddPred() argument 240 RemovePred(SUnit * SU,const SDep & D) RemovePred() argument 246 isReady(SUnit * SU) isReady() argument 400 ReleasePred(SUnit * SU,const SDep * PredEdge) ReleasePred() argument 556 ReleasePredecessors(SUnit * SU) ReleasePredecessors() argument 653 AdvancePastStalls(SUnit * SU) AdvancePastStalls() argument 695 EmitNode(SUnit * SU) EmitNode() argument 738 ScheduleNodeBottomUp(SUnit * SU) ScheduleNodeBottomUp() argument 837 UnscheduleNodeBottomUp(SUnit * SU) UnscheduleNodeBottomUp() argument 940 SUnit *SU = *I; RestoreHazardCheckerBottomUp() local 950 BacktrackBottomUp(SUnit * SU,SUnit * BtSU) BacktrackBottomUp() argument 972 isOperandOf(const SUnit * SU,SDNode * N) isOperandOf() argument 982 TryUnfoldSU(SUnit * SU) TryUnfoldSU() argument 1131 CopyAndMoveSuccessors(SUnit * SU) CopyAndMoveSuccessors() argument 1219 InsertCopiesAndMoveSuccs(SUnit * SU,unsigned Reg,const TargetRegisterClass * DestRC,const TargetRegisterClass * SrcRC,SmallVectorImpl<SUnit * > & Copies) InsertCopiesAndMoveSuccs() argument 1295 CheckForLiveRegDef(SUnit * SU,unsigned Reg,SUnit ** LiveRegDefs,SmallSet<unsigned,4> & RegAdded,SmallVectorImpl<unsigned> & LRegs,const TargetRegisterInfo * TRI,const SDNode * Node=nullptr) CheckForLiveRegDef() argument 1321 CheckForLiveRegDefMasked(SUnit * SU,const uint32_t * RegMask,ArrayRef<SUnit * > LiveRegDefs,SmallSet<unsigned,4> & RegAdded,SmallVectorImpl<unsigned> & LRegs) CheckForLiveRegDefMasked() argument 1348 DelayForLiveRegsBottomUp(SUnit * SU,SmallVectorImpl<unsigned> & LRegs) DelayForLiveRegsBottomUp() argument 1445 SUnit *SU = Interferences[i-1]; releaseInterferences() local 1625 SUnit *SU = PickNodeToScheduleBottomUp(); ListScheduleBottomUp() local 1815 remove(SUnit * SU) remove() argument 1916 SUnit *SU = popFromQueue(DumpQueue, DumpPicker, scheduleDAG); dump() local 1952 CalcNodeSethiUllmanNumber(const SUnit * SU,std::vector<unsigned> & SUNumbers) CalcNodeSethiUllmanNumber() argument 1959 const SUnit *SU; CalcNodeSethiUllmanNumber() member 2026 addNode(const SUnit * SU) addNode() argument 2033 updateNode(const SUnit * SU) updateNode() argument 2143 RegPressureDiff(SUnit * SU,unsigned & LiveUses) const RegPressureDiff() argument 2182 scheduledNode(SUnit * SU) scheduledNode() argument 2251 unscheduledNode(SUnit * SU) unscheduledNode() argument 2346 closestSucc(const SUnit * SU) closestSucc() argument 2364 calcMaxScratches(const SUnit * SU) calcMaxScratches() argument 2375 hasOnlyLiveInOpers(const SUnit * SU) hasOnlyLiveInOpers() argument 2397 hasOnlyLiveOutUses(const SUnit * SU) hasOnlyLiveOutUses() argument 2425 initVRegCycle(SUnit * SU) initVRegCycle() argument 2444 resetVRegCycle(SUnit * SU) resetVRegCycle() argument 2461 hasVRegCycleUse(const SUnit * SU) hasVRegCycleUse() argument 2480 BUHasStall(SUnit * SU,int Height,RegReductionPQBase * SPQ) BUHasStall() argument 2672 isReady(SUnit * SU,unsigned CurCycle) const isReady() argument 2719 isReady(SUnit * SU,unsigned CurCycle) const isReady() argument 2729 canEnableCoalescing(SUnit * SU) canEnableCoalescing() argument 2835 canClobber(const SUnit * SU,const SUnit * Op) canClobber() argument 2856 canClobberReachingPhysRegUse(const SUnit * DepSU,const SUnit * SU,ScheduleDAGRRList * scheduleDAG,const TargetInstrInfo * TII,const TargetRegisterInfo * TRI) canClobberReachingPhysRegUse() argument 2892 canClobberPhysRegDefs(const SUnit * SuccSU,const SUnit * SU,const TargetInstrInfo * TII,const TargetRegisterInfo * TRI) canClobberPhysRegDefs() argument [all...] |
H A D | ScheduleDAGVLIW.cpp | 109 void ScheduleDAGVLIW::releaseSucc(SUnit *SU, const SDep &D) { in releaseSucc() 133 void ScheduleDAGVLIW::releaseSuccessors(SUnit *SU) { in releaseSuccessors() 146 void ScheduleDAGVLIW::scheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { in scheduleNodeTopDown()
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H A D | ScheduleDAGFast.cpp | 84 void AddPred(SUnit *SU, const SDep &D) { in AddPred() argument 90 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred() argument 135 void ScheduleDAGFast::ReleasePred(SUnit *SU, SDep *PredEdge) { in ReleasePred() argument 156 void ScheduleDAGFast::ReleasePredecessors(SUnit *SU, unsigne argument 177 ScheduleNodeBottomUp(SUnit * SU,unsigned CurCycle) ScheduleNodeBottomUp() argument 206 CopyAndMoveSuccessors(SUnit * SU) CopyAndMoveSuccessors() argument 372 InsertCopiesAndMoveSuccs(SUnit * SU,unsigned Reg,const TargetRegisterClass * DestRC,const TargetRegisterClass * SrcRC,SmallVectorImpl<SUnit * > & Copies) InsertCopiesAndMoveSuccs() argument 439 CheckForLiveRegDef(SUnit * SU,unsigned Reg,std::vector<SUnit * > & LiveRegDefs,SmallSet<unsigned,4> & RegAdded,SmallVectorImpl<unsigned> & LRegs,const TargetRegisterInfo * TRI,const SDNode * Node=nullptr) CheckForLiveRegDef() argument 472 DelayForLiveRegsBottomUp(SUnit * SU,SmallVectorImpl<unsigned> & LRegs) DelayForLiveRegsBottomUp() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600MachineScheduler.cpp | 53 SUnit *SU = nullptr; in pickNode() local 135 schedNode(SUnit * SU,bool IsTopNode) schedNode() argument 182 releaseTopNode(SUnit * SU) releaseTopNode() argument 186 releaseBottomNode(SUnit * SU) releaseBottomNode() argument 286 getInstKind(SUnit * SU) getInstKind() argument 315 SUnit *SU = *It; PopInst() local 424 SUnit *SU = AttemptFillSlot(3, true); pickAlu() local 433 SUnit *SU = AttemptFillSlot(Chan, false); pickAlu() local 447 SUnit *SU = nullptr; pickOther() local [all...] |
H A D | GCNILPSched.cpp | 23 SUnit *SU; member 58 CalcNodeSethiUllmanNumber(const SUnit *SU, std::vector<unsigned> &SUNumbers) { in CalcNodeSethiUllmanNumber() argument 106 closestSucc(const SUnit * SU) closestSucc() argument 121 calcMaxScratches(const SUnit * SU) calcMaxScratches() argument 275 releasePredecessors(const SUnit * SU) releasePredecessors() argument 299 for (const SUnit &SU : SUnits) schedule() local 303 for (const SUnit &SU : SUnits) schedule() local 306 for (const auto *SU : BotRoots) { schedule() local 336 auto SU = C->SU; schedule() local 350 for (auto &SU : SUnits) schedule() local [all...] |
H A D | GCNMinRegStrategy.cpp | 25 const SUnit *SU; member 43 void setIsScheduled(const SUnit *SU) { in setIsScheduled() 54 unsigned decNumPreds(const SUnit *SU) { in decNumPreds() 146 auto SU = C.SU; in pickCandidate() local 157 auto SU = C.SU; in pickCandidate() local 193 auto SU = Worklist.pop_back_val(); in bumpPredsPriority() local 213 void GCNMinRegScheduler::releaseSuccessors(const SUnit* SU, int Priority) { in releaseSuccessors() 235 for (const auto *SU : TopRoots) { in schedule() local 252 auto SU = C->SU; in schedule() local
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H A D | SIMachineScheduler.cpp | 178 SUnits.push_back(SU); in addUnit() argument 280 SUnit *SU = TopReadySUs[0]; fastSchedule() local 398 SUnit *SU = pickNode(); schedule() local 434 undoReleaseSucc(SUnit * SU,SDep * SuccEdge) undoReleaseSucc() argument 444 releaseSucc(SUnit * SU,SDep * SuccEdge) releaseSucc() argument 464 releaseSuccessors(SUnit * SU,bool InOrOutBlock) releaseSuccessors() argument 480 nodeScheduled(SUnit * SU) nodeScheduled() argument 595 for (const SUnit* SU : SUnits) printDebug() local 627 isSUInBlock(SUnit * SU,unsigned ID) isSUInBlock() argument 637 SUnit *SU = &DAG->SUnits[i]; colorHighLatenciesAlone() local 645 hasDataDependencyPred(const SUnit & SU,const SUnit & FromSU) hasDataDependencyPred() argument 663 SUnit *SU = &DAG->SUnits[i]; colorHighLatenciesGroups() local 679 const SUnit &SU = DAG->SUnits[SUNum]; colorHighLatenciesGroups() local 791 SUnit *SU = &DAG->SUnits[SUNum]; colorComputeReservedDependencies() local 833 SUnit *SU = &DAG->SUnits[SUNum]; colorComputeReservedDependencies() local 877 for (const SUnit &SU : DAG->SUnits) { colorAccordingToReservedDependencies() local 914 SUnit *SU = &DAG->SUnits[SUNum]; colorEndsAccordingToDependencies() local 958 SUnit *SU = &DAG->SUnits[i]; colorForceConsecutiveOrderInGroup() local 984 SUnit *SU = &DAG->SUnits[SUNum]; colorMergeConstantLoadsNextGroup() local 1010 SUnit *SU = &DAG->SUnits[SUNum]; colorMergeIfPossibleNextGroup() local 1031 SUnit *SU = &DAG->SUnits[SUNum]; colorMergeIfPossibleNextGroupOnlyForReserved() local 1053 SUnit *SU = &DAG->SUnits[SUNum]; colorMergeIfPossibleSmallGroupsToNextGroup() local 1059 SUnit *SU = &DAG->SUnits[SUNum]; colorMergeIfPossibleSmallGroupsToNextGroup() local 1092 SUnit *SU = &DAG->SUnits[SUNum]; regroupNoUserInstructions() local 1124 const SUnit &SU = DAG->SUnits[SUNum]; colorExports() local 1189 SUnit *SU = &DAG->SUnits[i]; createBlocksForVariant() local 1203 SUnit *SU = &DAG->SUnits[i]; createBlocksForVariant() local 1787 SUnit *SU = &SUnits[ScheduledSUnits[i]]; moveLowLatencies() local 1915 SUnit *SU = &SUnits[i]; schedule() local 1990 SUnit *SU = &SUnits[I]; schedule() local [all...] |
H A D | AMDGPUIGroupLP.cpp | 192 allowedByRules(const SUnit * SU,SmallVectorImpl<SchedGroup> & SyncPipe) const allowedByRules() argument 206 add(SUnit & SU) add() argument 249 resetEdges(SUnit & SU,ScheduleDAGInstrs * DAG) resetEdges() argument 402 __anond089bb350202(SUnit *SU) reset() argument 460 for (auto &SU : SG.Collection) { makePipeline() local 481 linkSUnit(SUnit * SU,int SGID,std::vector<std::pair<SUnit *,SUnit * >> & AddedEdges,T I,T E) linkSUnit() argument 498 addEdges(SmallVectorImpl<SchedGroup> & SyncPipeline,SUnit * SU,int SGID,std::vector<std::pair<SUnit *,SUnit * >> & AddedEdges) addEdges() argument 912 apply(const SUnit * SU,const ArrayRef<SUnit * > Collection,SmallVectorImpl<SchedGroup> & SyncPipe) apply() argument 945 apply(const SUnit * SU,const ArrayRef<SUnit * > Collection,SmallVectorImpl<SchedGroup> & SyncPipe) apply() argument 983 apply(const SUnit * SU,const ArrayRef<SUnit * > Collection,SmallVectorImpl<SchedGroup> & SyncPipe) apply() argument 1015 apply(const SUnit * SU,const ArrayRef<SUnit * > Collection,SmallVectorImpl<SchedGroup> & SyncPipe) apply() argument 1056 apply(const SUnit * SU,const ArrayRef<SUnit * > Collection,SmallVectorImpl<SchedGroup> & SyncPipe) apply() argument 1129 for (auto &SU : DAG->SUnits) { applyIGLPStrategy() local 1492 link(SUnit & SU,bool MakePred,std::vector<std::pair<SUnit *,SUnit * >> & AddedEdges) link() argument 1517 link(SUnit & SU,bool MakePred) link() argument 1529 link(SUnit & SU,function_ref<bool (const SUnit * A,const SUnit * B)> P) link() argument 1561 for (auto &SU : DAG->SUnits) { initSchedGroup() local 1574 auto &SU = *RIter; initSchedGroup() local 1591 auto &SU = *I; initSchedGroup() local 1714 initIGLPOpt(SUnit & SU) initIGLPOpt() argument [all...] |
H A D | AMDGPUExportClustering.cpp | 29 static bool isExport(const SUnit &SU) { in isExport() 33 static bool isPositionExport(const SIInstrInfo *TII, SUnit *SU) { in isPositionExport() 82 static void removeExportDependencies(ScheduleDAGInstrs *DAG, SUnit &SU) { in removeExportDependencies()
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCHazardRecognizers.cpp | 24 bool PPCDispatchGroupSBHazardRecognizer::isLoadAfterStore(SUnit *SU) { in isLoadAfterStore() argument 54 bool PPCDispatchGroupSBHazardRecognizer::isBCTRAfterSet(SUnit *SU) { in isBCTRAfterSet() argument 139 getHazardType(SUnit * SU,int Stalls) getHazardType() argument 146 ShouldPreferAnother(SUnit * SU) ShouldPreferAnother() argument 155 PreEmitNoops(SUnit * SU) PreEmitNoops() argument 174 EmitInstruction(SUnit * SU) EmitInstruction() argument 325 getHazardType(SUnit * SU,int Stalls) getHazardType() argument 385 EmitInstruction(SUnit * SU) EmitInstruction() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonHazardRecognizer.cpp | 39 HexagonHazardRecognizer::getHazardType(SUnit *SU, int stalls) { in getHazardType() 95 bool HexagonHazardRecognizer::ShouldPreferAnother(SUnit *SU) { in ShouldPreferAnother() 112 void HexagonHazardRecognizer::EmitInstruction(SUnit *SU) { in EmitInstruction()
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZHazardRecognizer.cpp | 77 getHazardType(SUnit *SU, int Stalls) { in getHazardType() 167 void SystemZHazardRecognizer::dumpSU(SUnit *SU, raw_ostream &OS) const { in dumpSU() 271 EmitInstruction(SUnit *SU) { in EmitInstruction() 387 resourcesCost(SUnit *SU) { in resourcesCost() 413 SUnit SU(MI, 0); in emitInstruction() local
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H A D | SystemZMachineScheduler.cpp | 176 for (auto *SU : Available) { in pickNode() local 241 void SystemZPostRASchedStrategy::schedNode(SUnit *SU, bool IsTopNode) { in schedNode() 251 void SystemZPostRASchedStrategy::releaseTopNode(SUnit *SU) { in releaseTopNode()
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/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ScheduleDAGInstrs.h | 56 SUnit *SU; global() member 78 SUnit *SU; global() member 212 addChainDependencies(SUnit * SU,SUList & SUs,unsigned Latency) addChainDependencies() argument 267 getSchedClass(SUnit * SU) getSchedClass() argument 274 IsReachable(SUnit * SU,SUnit * TargetSU) IsReachable() argument [all...] |
H A D | LatencyPriorityQueue.h | 57 void addNode(const SUnit *SU) override { in addNode() 61 void updateNode(const SUnit *SU) override { in updateNode()
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H A D | ScheduleDFS.h | 145 unsigned getNumInstrs(const SUnit *SU) const { in getNumInstrs() 158 ILPValue getILP(const SUnit *SU) const { in getILP() 169 unsigned getSubtreeID(const SUnit *SU) const { in getSubtreeID()
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMHazardRecognizer.cpp | 44 ARMHazardRecognizerFPMLx::getHazardType(SUnit *SU, int Stalls) { in getHazardType() argument 89 void ARMHazardRecognizerFPMLx::EmitInstruction(SUnit *SU) { in EmitInstruction() argument 184 ARMBankConflictHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { in getHazardType() argument 256 void ARMBankConflictHazardRecognizer::EmitInstruction(SUnit *SU) { in EmitInstruction() argument
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