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Searched defs:SSD (Results 1 – 4 of 4) sorted by relevance

/llvm-project/llvm/lib/CodeGen/
H A DMachinePipeliner.cpp1073 computeScheduledInsts(const SwingSchedulerDAG * SSD,SMSchedule & Schedule,std::vector<MachineInstr * > & OrderedInsts,DenseMap<MachineInstr *,unsigned> & Stages) computeScheduledInsts() argument
1543 detect(const SwingSchedulerDAG * SSD,SMSchedule & Schedule,const unsigned MaxStage) const detect() argument
2967 orderDependence(const SwingSchedulerDAG * SSD,SUnit * SU,std::deque<SUnit * > & Insts) const orderDependence() argument
3095 isLoopCarried(const SwingSchedulerDAG * SSD,MachineInstr & Phi) const isLoopCarried() argument
3124 isLoopCarriedDefOfUse(const SwingSchedulerDAG * SSD,MachineInstr * Def,MachineOperand & MO) const isLoopCarriedDefOfUse() argument
3159 computeUnpipelineableNodes(SwingSchedulerDAG * SSD,TargetInstrInfo::PipelinerLoopInfo * PLI) computeUnpipelineableNodes() argument
3186 normalizeNonPipelinedInstructions(SwingSchedulerDAG * SSD,TargetInstrInfo::PipelinerLoopInfo * PLI) normalizeNonPipelinedInstructions() argument
3227 isValidSchedule(SwingSchedulerDAG * SSD) isValidSchedule() argument
3395 reorderInstructions(const SwingSchedulerDAG * SSD,const std::deque<SUnit * > & Instrs) const reorderInstructions() argument
3414 finalizeSchedule(SwingSchedulerDAG * SSD) finalizeSchedule() argument
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/llvm-project/llvm/include/llvm/CodeGen/
H A DMachinePipeliner.h393 computeNodeSetInfo(SwingSchedulerDAG * SSD) computeNodeSetInfo() argument
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H A DTargetInstrInfo.h751 shouldUseSchedule(SwingSchedulerDAG & SSD,SMSchedule & SMS) shouldUseSchedule() argument
/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp6789 shouldUseSchedule(SwingSchedulerDAG & SSD,SMSchedule & SMS) shouldUseSchedule() argument
6853 tooMuchRegisterPressure(SwingSchedulerDAG & SSD,SMSchedule & SMS) tooMuchRegisterPressure() argument