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Searched defs:Rt (Results 1 – 24 of 24) sorted by relevance

/llvm-project/clang/lib/Headers/
H A Dhvx_hexagon_protos.h63 #define Q6_V_vsplat_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplatw)(Rt) argument
129 #define Q6_Q_vsetq_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_scalar2)(Rt)),-1) argument
151 #define Q6_vmem_QnRIV(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nqpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs) argument
162 Q6_vmem_QnRIV_nt(Qv,Rt,Vs) global() argument
173 Q6_vmem_QRIV_nt(Qv,Rt,Vs) global() argument
184 Q6_vmem_QRIV(Qv,Rt,Vs) global() argument
536 Q6_V_valign_VVR(Vu,Vv,Rt) global() argument
569 Q6_V_vand_QR(Qu,Rt) global() argument
580 Q6_V_vandor_VQR(Vx,Qu,Rt) global() argument
591 Q6_Q_vand_VR(Vu,Rt) global() argument
602 Q6_Q_vandor_QVR(Qx,Vu,Rt) global() argument
613 Q6_Vh_vasl_VhR(Vu,Rt) global() argument
635 Q6_Vw_vasl_VwR(Vu,Rt) global() argument
646 Q6_Vw_vaslacc_VwVwR(Vx,Vu,Rt) global() argument
668 Q6_Vh_vasr_VhR(Vu,Rt) global() argument
679 Q6_Vb_vasr_VhVhR_rnd_sat(Vu,Vv,Rt) global() argument
690 Q6_Vub_vasr_VhVhR_rnd_sat(Vu,Vv,Rt) global() argument
701 Q6_Vub_vasr_VhVhR_sat(Vu,Vv,Rt) global() argument
723 Q6_Vw_vasr_VwR(Vu,Rt) global() argument
734 Q6_Vw_vasracc_VwVwR(Vx,Vu,Rt) global() argument
745 Q6_Vh_vasr_VwVwR(Vu,Vv,Rt) global() argument
756 Q6_Vh_vasr_VwVwR_rnd_sat(Vu,Vv,Rt) global() argument
767 Q6_Vh_vasr_VwVwR_sat(Vu,Vv,Rt) global() argument
778 Q6_Vuh_vasr_VwVwR_sat(Vu,Vv,Rt) global() argument
987 Q6_W_vdeal_VVR(Vu,Vv,Rt) global() argument
1009 Q6_Vh_vdmpy_VubRb(Vu,Rt) global() argument
1020 Q6_Vh_vdmpyacc_VhVubRb(Vx,Vu,Rt) global() argument
1031 Q6_Wh_vdmpy_WubRb(Vuu,Rt) global() argument
1042 Q6_Wh_vdmpyacc_WhWubRb(Vxx,Vuu,Rt) global() argument
1053 Q6_Vw_vdmpy_VhRb(Vu,Rt) global() argument
1064 Q6_Vw_vdmpyacc_VwVhRb(Vx,Vu,Rt) global() argument
1075 Q6_Ww_vdmpy_WhRb(Vuu,Rt) global() argument
1086 Q6_Ww_vdmpyacc_WwWhRb(Vxx,Vuu,Rt) global() argument
1097 Q6_Vw_vdmpy_WhRh_sat(Vuu,Rt) global() argument
1108 Q6_Vw_vdmpyacc_VwWhRh_sat(Vx,Vuu,Rt) global() argument
1119 Q6_Vw_vdmpy_VhRh_sat(Vu,Rt) global() argument
1130 Q6_Vw_vdmpyacc_VwVhRh_sat(Vx,Vu,Rt) global() argument
1141 Q6_Vw_vdmpy_WhRuh_sat(Vuu,Rt) global() argument
1152 Q6_Vw_vdmpyacc_VwWhRuh_sat(Vx,Vuu,Rt) global() argument
1163 Q6_Vw_vdmpy_VhRuh_sat(Vu,Rt) global() argument
1174 Q6_Vw_vdmpyacc_VwVhRuh_sat(Vx,Vu,Rt) global() argument
1207 Q6_Wuw_vdsad_WuhRuh(Vuu,Rt) global() argument
1218 Q6_Wuw_vdsadacc_WuwWuhRuh(Vxx,Vuu,Rt) global() argument
1625 Q6_Vw_vinsert_VwR(Vx,Rt) global() argument
1636 Q6_V_vlalign_VVR(Vu,Vv,Rt) global() argument
1658 Q6_Vuh_vlsr_VuhR(Vu,Rt) global() argument
1680 Q6_Vuw_vlsr_VuwR(Vu,Rt) global() argument
1702 Q6_Vb_vlut32_VbVbR(Vu,Vv,Rt) global() argument
1713 Q6_Vb_vlut32or_VbVbVbR(Vx,Vu,Vv,Rt) global() argument
1724 Q6_Wh_vlut16_VbVhR(Vu,Vv,Rt) global() argument
1735 Q6_Wh_vlut16or_WhVbVhR(Vxx,Vu,Vv,Rt) global() argument
1834 Q6_Wh_vmpa_WubRb(Vuu,Rt) global() argument
1845 Q6_Wh_vmpaacc_WhWubRb(Vxx,Vuu,Rt) global() argument
1878 Q6_Ww_vmpa_WhRb(Vuu,Rt) global() argument
1889 Q6_Ww_vmpaacc_WwWhRb(Vxx,Vuu,Rt) global() argument
1900 Q6_Wh_vmpy_VubRb(Vu,Rt) global() argument
1911 Q6_Wh_vmpyacc_WhVubRb(Vxx,Vu,Rt) global() argument
1977 Q6_Ww_vmpy_VhRh(Vu,Rt) global() argument
1988 Q6_Ww_vmpyacc_WwVhRh_sat(Vxx,Vu,Rt) global() argument
1999 Q6_Vh_vmpy_VhRh_s1_rnd_sat(Vu,Rt) global() argument
2010 Q6_Vh_vmpy_VhRh_s1_sat(Vu,Rt) global() argument
2142 Q6_Vh_vmpyi_VhRb(Vu,Rt) global() argument
2153 Q6_Vh_vmpyiacc_VhVhRb(Vx,Vu,Rt) global() argument
2175 Q6_Vw_vmpyi_VwRb(Vu,Rt) global() argument
2186 Q6_Vw_vmpyiacc_VwVwRb(Vx,Vu,Rt) global() argument
2197 Q6_Vw_vmpyi_VwRh(Vu,Rt) global() argument
2208 Q6_Vw_vmpyiacc_VwVwRh(Vx,Vu,Rt) global() argument
2263 Q6_Wuh_vmpy_VubRub(Vu,Rt) global() argument
2274 Q6_Wuh_vmpyacc_WuhVubRub(Vxx,Vu,Rt) global() argument
2307 Q6_Wuw_vmpy_VuhRuh(Vu,Rt) global() argument
2318 Q6_Wuw_vmpyacc_WuwVuhRuh(Vxx,Vu,Rt) global() argument
2549 Q6_Vw_vrmpy_VubRb(Vu,Rt) global() argument
2560 Q6_Vw_vrmpyacc_VwVubRb(Vx,Vu,Rt) global() argument
2571 Q6_Ww_vrmpy_WubRbI(Vuu,Rt,Iu1) global() argument
2582 Q6_Ww_vrmpyacc_WwWubRbI(Vxx,Vuu,Rt,Iu1) global() argument
2637 Q6_Vuw_vrmpy_VubRub(Vu,Rt) global() argument
2648 Q6_Vuw_vrmpyacc_VuwVubRub(Vx,Vu,Rt) global() argument
2659 Q6_Wuw_vrmpy_WubRubI(Vuu,Rt,Iu1) global() argument
2670 Q6_Wuw_vrmpyacc_WuwWubRubI(Vxx,Vuu,Rt,Iu1) global() argument
2703 Q6_V_vror_VR(Vu,Rt) global() argument
2758 Q6_Wuw_vrsad_WubRubI(Vuu,Rt,Iu1) global() argument
2769 Q6_Wuw_vrsadacc_WuwWubRubI(Vxx,Vuu,Rt,Iu1) global() argument
2879 Q6_W_vshuff_VVR(Vu,Vv,Rt) global() argument
3187 Q6_Wh_vtmpy_WbRb(Vuu,Rt) global() argument
3198 Q6_Wh_vtmpyacc_WhWbRb(Vxx,Vuu,Rt) global() argument
3209 Q6_Wh_vtmpy_WubRb(Vuu,Rt) global() argument
3220 Q6_Wh_vtmpyacc_WhWubRb(Vxx,Vuu,Rt) global() argument
3231 Q6_Ww_vtmpy_WhRb(Vuu,Rt) global() argument
3242 Q6_Ww_vtmpyacc_WwWhRb(Vxx,Vuu,Rt) global() argument
3352 Q6_Vb_vsplat_R(Rt) global() argument
3363 Q6_Vh_vsplat_R(Rt) global() argument
3374 Q6_Q_vsetq2_R(Rt) global() argument
3528 Q6_V_vand_QnR(Qu,Rt) global() argument
3539 Q6_V_vandor_VQnR(Vx,Qu,Rt) global() argument
3572 Q6_Vb_vasr_VhVhR_sat(Vu,Vv,Rt) global() argument
3583 Q6_Vuh_vasr_VuwVuwR_rnd_sat(Vu,Vv,Rt) global() argument
3594 Q6_Vuh_vasr_VwVwR_rnd_sat(Vu,Vv,Rt) global() argument
3605 Q6_Vub_vlsr_VubR(Vu,Rt) global() argument
3616 Q6_Vb_vlut32_VbVbR_nomatch(Vu,Vv,Rt) global() argument
3649 Q6_Wh_vlut16_VbVhR_nomatch(Vu,Vv,Rt) global() argument
3704 Q6_Ww_vmpa_WuhRb(Vuu,Rt) global() argument
3715 Q6_Ww_vmpaacc_WwWuhRb(Vxx,Vuu,Rt) global() argument
3737 Q6_Vw_vmpyi_VwRub(Vu,Rt) global() argument
3748 Q6_Vw_vmpyiacc_VwVwRub(Vx,Vu,Rt) global() argument
3891 Q6_Vh_vaslacc_VhVhR(Vx,Vu,Rt) global() argument
3902 Q6_Vh_vasracc_VhVhR(Vx,Vu,Rt) global() argument
3913 Q6_Vub_vasr_VuhVuhR_rnd_sat(Vu,Vv,Rt) global() argument
3924 Q6_Vub_vasr_VuhVuhR_sat(Vu,Vv,Rt) global() argument
3935 Q6_Vuh_vasr_VuwVuwR_sat(Vu,Vv,Rt) global() argument
4001 Q6_vgather_ARMVh(Rs,Rt,Mu,Vv) global() argument
4012 Q6_vgather_AQRMVh(Rs,Qs,Rt,Mu,Vv) global() argument
4023 Q6_vgather_ARMWw(Rs,Rt,Mu,Vvv) global() argument
4034 Q6_vgather_AQRMWw(Rs,Qs,Rt,Mu,Vvv) global() argument
4045 Q6_vgather_ARMVw(Rs,Rt,Mu,Vv) global() argument
4056 Q6_vgather_AQRMVw(Rs,Qs,Rt,Mu,Vv) global() argument
4078 Q6_Wh_vmpa_WubRub(Vuu,Rt) global() argument
4089 Q6_Wh_vmpaacc_WhWubRub(Vxx,Vuu,Rt) global() argument
4133 Q6_Ww_vmpyacc_WwVhRh(Vxx,Vu,Rt) global() argument
4144 Q6_Vuw_vmpye_VuhRuh(Vu,Rt) global() argument
4155 Q6_Vuw_vmpyeacc_VuwVuhRuh(Vx,Vu,Rt) global() argument
4210 Q6_vscatter_RMVhV(Rt,Mu,Vv,Vw) global() argument
4221 Q6_vscatteracc_RMVhV(Rt,Mu,Vv,Vw) global() argument
4232 Q6_vscatter_QRMVhV(Qs,Rt,Mu,Vv,Vw) global() argument
4243 Q6_vscatter_RMWwV(Rt,Mu,Vvv,Vw) global() argument
4254 Q6_vscatteracc_RMWwV(Rt,Mu,Vvv,Vw) global() argument
4265 Q6_vscatter_QRMWwV(Qs,Rt,Mu,Vvv,Vw) global() argument
4276 Q6_vscatter_RMVwV(Rt,Mu,Vv,Vw) global() argument
4287 Q6_vscatteracc_RMVwV(Rt,Mu,Vv,Vw) global() argument
4298 Q6_vscatter_QRMVwV(Qs,Rt,Mu,Vv,Vw) global() argument
[all...]
/llvm-project/compiler-rt/lib/xray/
H A Dxray_mips.cpp41 uint32_t Rt, in encodeInstruction() argument
47 encodeSpecialInstruction(uint32_t Opcode, uint32_t Rs, uint32_t Rt, uint32_t Rd, in encodeSpecialInstruction() argument
H A Dxray_mips64.cpp42 uint32_t Rt, in encodeInstruction() argument
48 encodeSpecialInstruction(uint32_t Opcode, uint32_t Rs, uint32_t Rt, uint32_t Rd, in encodeSpecialInstruction() argument
/llvm-project/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp618 InsnType Rt = fieldFromInstruction(insn, 16, 5); DecodeAddiGroupBranch() local
646 InsnType Rt = fieldFromInstruction(insn, 21, 5); DecodePOP35GroupBranchMMR6() local
691 InsnType Rt = fieldFromInstruction(insn, 16, 5); DecodeDaddiGroupBranch() local
719 InsnType Rt = fieldFromInstruction(insn, 21, 5); DecodePOP37GroupBranchMMR6() local
760 InsnType Rt = fieldFromInstruction(insn, 21, 5); DecodePOP65GroupBranchMMR6() local
799 InsnType Rt = fieldFromInstruction(insn, 21, 5); DecodePOP75GroupBranchMMR6() local
843 InsnType Rt = fieldFromInstruction(insn, 16, 5); DecodeBlezlGroupBranch() local
888 InsnType Rt = fieldFromInstruction(insn, 16, 5); DecodeBgtzlGroupBranch() local
930 InsnType Rt = fieldFromInstruction(insn, 16, 5); DecodeBgtzGroupBranch() local
979 InsnType Rt = fieldFromInstruction(insn, 16, 5); DecodeBlezGroupBranch() local
1035 InsnType Rt = fieldFromInstruction(Insn, 16, 5); DecodeDEXT() local
1077 InsnType Rt = fieldFromInstruction(Insn, 16, 5); DecodeDINS() local
1095 InsnType Rt = fieldFromInstruction(Insn, 16, 5); DecodeCRC() local
1955 unsigned Rt = fieldFromInstruction(Insn, 16, 5); DecodeSpecial3LlSc() local
2440 InsnType Rt = fieldFromInstruction(insn, 21, 5); DecodeBgtzGroupBranchMMR6() local
2489 InsnType Rt = fieldFromInstruction(insn, 21, 5); DecodeBlezGroupBranchMMR6() local
[all...]
/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp377 MCOperand &Rt = Inst.getOperand(3); HexagonProcessInstruction() local
388 MCOperand &Rt = Inst.getOperand(2); HexagonProcessInstruction() local
400 MCOperand &Rt = Inst.getOperand(2); HexagonProcessInstruction() local
597 MCOperand &Rt = Inst.getOperand(1); HexagonProcessInstruction() local
[all...]
H A DHexagonBitTracker.cpp295 assert(Ws == Rt.width()); in evaluate() argument
H A DHexagonSplitDouble.cpp374 Register Rt = MI->getOperand(2).getReg(); in profit() local
H A DHexagonISelDAGToDAGHVX.cpp816 vshuffvdd(ArrayRef<int> Vu,ArrayRef<int> Vv,unsigned Rt) vshuffvdd() argument
836 vdealvdd(ArrayRef<int> Vu,ArrayRef<int> Vv,unsigned Rt) vdealvdd() argument
2701 SDValue Rt = N->getOperand(2); selectVAlign() local
[all...]
H A DHexagonBitSimplify.cpp1920 matchPackhl(unsigned SelfR,const BitTracker::RegisterCell & RC,BitTracker::RegisterRef & Rs,BitTracker::RegisterRef & Rt) matchPackhl() argument
2054 BitTracker::RegisterRef Rs, Rt; genPackhl() local
[all...]
H A DHexagonInstrInfo.cpp1348 Register Rt = Op3.getReg(); expandPostRAPseudo() local
[all...]
/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp2048 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeAddrMode2IdxInstruction() local
2210 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeAddrMode3Instruction() local
4073 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeT2LoadShift() local
4158 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeT2LoadImm8() local
4243 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeT2LoadImm12() local
4323 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeT2LoadT() local
4362 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeT2LoadLabel() local
4603 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeT2LdStPre() local
5098 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeDoubleRegLoad() local
5121 unsigned Rt = fieldFromInstruction(Insn, 0, 4); DecodeDoubleRegStore() local
5147 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeLDRPreImm() local
5173 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeLDRPreReg() local
5201 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeSTRPreImm() local
5227 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeSTRPreReg() local
5798 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeVMOVSRR() local
5824 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeVMOVRRS() local
5881 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeT2LDRDPreInstruction() local
5918 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeT2STRDPreInstruction() local
5987 unsigned Rt = fieldFromInstruction(Insn, 12, 4); DecodeSwap() local
6168 unsigned Rt = fieldFromInstruction(Val, 12, 4); DecodeLDR() local
6198 unsigned Rt = fieldFromInstruction(Val, 12, 4); DecoderForMRRC2AndMCRR2() local
6255 unsigned Rt = fieldFromInstruction(Val, 12, 4); DecodeForVMRSandVMSR() local
6799 unsigned Rt = fieldFromInstruction(Insn, 0, 4); DecodeMVEVMOVQtoDReg() local
6823 unsigned Rt = fieldFromInstruction(Insn, 0, 4); DecodeMVEVMOVDRegtoQ() local
[all...]
/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp1163 unsigned Rt = fieldFromInstruction(insn, 0, 5); DecodeUnsignedLdStInstruction() local
1222 unsigned Rt = fieldFromInstruction(insn, 0, 5); DecodeSignedLdStInstruction() local
1420 unsigned Rt = fieldFromInstruction(insn, 0, 5); DecodeExclusiveLdStInstruction() local
1503 unsigned Rt = fieldFromInstruction(insn, 0, 5); DecodePairLdStInstruction() local
1637 unsigned Rt = fieldFromInstruction(insn, 0, 5); DecodeAuthLoadInstruction() local
1932 uint64_t Rt = fieldFromInstruction(insn, 0, 5); DecodeTestAndBranch() local
1988 unsigned Rt = fieldFromInstruction(insn, 0, 5); DecodeSyspXzrInstruction() local
2116 uint64_t Rt = fieldFromInstruction(insn, 0, 5); DecodePRFMRegInstruction() local
[all...]
/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCCompound.cpp201 MCOperand Rs, Rt; in getCompoundInsn() local
[all...]
/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVMergeBaseOffset.cpp187 Register Rt = TailAdd.getOperand(2).getReg(); in foldLargeOffset() local
/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp3508 Register Rt = MI.getOperand(0).getReg(); getNumMicroOpsSwiftLdSt() local
3515 Register Rt = MI.getOperand(0).getReg(); getNumMicroOpsSwiftLdSt() local
3545 Register Rt = MI.getOperand(0).getReg(); getNumMicroOpsSwiftLdSt() local
3557 Register Rt = MI.getOperand(0).getReg(); getNumMicroOpsSwiftLdSt() local
3580 Register Rt = MI.getOperand(0).getReg(); getNumMicroOpsSwiftLdSt() local
3595 Register Rt = MI.getOperand(0).getReg(); getNumMicroOpsSwiftLdSt() local
3621 Register Rt = MI.getOperand(0).getReg(); getNumMicroOpsSwiftLdSt() local
3631 Register Rt = MI.getOperand(0).getReg(); getNumMicroOpsSwiftLdSt() local
3668 Register Rt = MI.getOperand(0).getReg(); getNumMicroOpsSwiftLdSt() local
[all...]
H A DThumb2SizeReduction.cpp465 Register Rt = MI->getOperand(IsStore ? 1 : 0).getReg(); ReduceLoadStore() local
/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp1445 MCOperand &Rt = Inst.getOperand(1); processInstruction() local
1866 MCOperand &Rt = Inst.getOperand(2); processInstruction() local
1886 MCOperand &Rt = Inst.getOperand(3); processInstruction() local
1909 MCOperand &Rt = Inst.getOperand(2); processInstruction() local
[all...]
/llvm-project/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.cpp927 uint32_t Rt; // the source register in EmulatePUSH() local
1043 uint32_t Rt; // the destination register in EmulatePOP() local
1774 uint32_t Rt; // the destination register in EmulateLDRRtPCRelative() local
2477 uint32_t Rt; // the source register in EmulateSTRRtSP() local
4428 uint32_t Rt; // the destination register in EmulateLDRRtRnImm() local
5742 uint32_t Rt = ReadCoreReg(t, &success); in EmulateSTRHRegister() local
10402 uint32_t Rt = in EmulateSTREX() local
10494 uint32_t Rt = ReadCoreReg(t, &success); in EmulateSTRBImmARM() local
10595 uint32_t Rt = ReadCoreReg(t, &success); in EmulateSTRImmARM() local
11137 uint32_t Rt = ReadCoreReg(t, &success); in EmulateSTRDReg() local
/llvm-project/lldb/source/Plugins/Instruction/ARM64/
H A DEmulateInstructionARM64.cpp703 uint32_t Rt = Bits32(opcode, 4, 0); in EmulateLDPSTP() local
/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp5354 unsigned Rt = Inst.getOperand(1).getReg(); validateInstruction() local
5379 unsigned Rt = Inst.getOperand(0).getReg(); validateInstruction() local
5392 unsigned Rt = Inst.getOperand(1).getReg(); validateInstruction() local
5408 unsigned Rt = Inst.getOperand(1).getReg(); validateInstruction() local
5441 unsigned Rt = Inst.getOperand(1).getReg(); validateInstruction() local
5460 unsigned Rt = Inst.getOperand(1).getReg(); validateInstruction() local
5476 unsigned Rt = Inst.getOperand(1).getReg(); validateInstruction() local
[all...]
/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp3509 Register Rt = MI.getOperand(1).getReg(); emitST_F16_PSEUDO() local
3574 Register Rt = RegInfo.createVirtualRegister(RC); emitLD_F16_PSEUDO() local
/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp7413 unsigned Rt = MRI->getEncodingValue(Reg1); ParseInstruction() local
7553 unsigned Rt = MRI->getEncodingValue(Inst.getOperand(RtIndex).getReg()); validateLDRDSTRD() local
7820 const unsigned Rt = MRI->getEncodingValue(Inst.getOperand(1).getReg()); validateInstruction() local
7833 const unsigned Rt = MRI->getEncodingValue(Inst.getOperand(0).getReg()); validateInstruction() local
7981 const unsigned Rt = MRI->getEncodingValue(Inst.getOperand(0).getReg()); validateInstruction() local
[all...]
/llvm-project/clang/lib/CodeGen/
H A DCGOpenMPRuntimeGPU.cpp1013 auto &Rt = in emitTeamsOutlinedFunction() local
H A DCGBuiltin.cpp8612 Value *Rt = Builder.CreateTruncOrBitCast(RtAndRt2, Int32Ty); EmitARMBuiltinExpr() local
8641 Value *Rt = Builder.CreateExtractValue(RtAndRt2, 1); EmitARMBuiltinExpr() local