Lines Matching defs:Rt
610 case S2_storerf_io: // memh(Rs32+#s11:1)=Rt.H32
611 case S2_pstorerft_io: // if (Pv4) memh(Rs32+#u6:1)=Rt.H32
612 case S2_pstorerff_io: // if (!Pv4) memh(Rs32+#u6:1)=Rt.H32
613 case S4_pstorerftnew_io: // if (Pv4.new) memh(Rs32+#u6:1)=Rt.H32
614 case S4_pstorerffnew_io: // if (!Pv4.new) memh(Rs32+#u6:1)=Rt.H32
615 case S2_storerf_pi: // memh(Rx32++#s4:1)=Rt.H32
616 case S2_pstorerft_pi: // if (Pv4) memh(Rx32++#s4:1)=Rt.H32
617 case S2_pstorerff_pi: // if (!Pv4) memh(Rx32++#s4:1)=Rt.H32
618 case S2_pstorerftnew_pi: // if (Pv4.new) memh(Rx32++#s4:1)=Rt.H32
619 case S2_pstorerffnew_pi: // if (!Pv4.new) memh(Rx32++#s4:1)=Rt.H32
620 case S4_storerf_ap: // memh(Re32=#U6)=Rt.H32
621 case S2_storerf_pr: // memh(Rx32++Mu2)=Rt.H32
622 case S4_storerf_ur: // memh(Ru32<<#u2+#U6)=Rt.H32
623 case S2_storerf_pbr: // memh(Rx32++Mu2:brev)=Rt.H32
624 case S2_storerf_pci: // memh(Rx32++#s4:1:circ(Mu2))=Rt.H32
625 case S2_storerf_pcr: // memh(Rx32++I:circ(Mu2))=Rt.H32
626 case S4_storerf_rr: // memh(Rs32+Ru32<<#u2)=Rt.H32
627 case S4_pstorerft_rr: // if (Pv4) memh(Rs32+Ru32<<#u2)=Rt.H32
628 case S4_pstorerff_rr: // if (!Pv4) memh(Rs32+Ru32<<#u2)=Rt.H32
629 case S4_pstorerftnew_rr: // if (Pv4.new) memh(Rs32+Ru32<<#u2)=Rt.H32
630 case S4_pstorerffnew_rr: // if (!Pv4.new) memh(Rs32+Ru32<<#u2)=Rt.H32
631 case S2_storerfgp: // memh(gp+#u16:1)=Rt.H32
632 case S4_pstorerft_abs: // if (Pv4) memh(#u6)=Rt.H32
633 case S4_pstorerff_abs: // if (!Pv4) memh(#u6)=Rt.H32
634 case S4_pstorerftnew_abs: // if (Pv4.new) memh(#u6)=Rt.H32
635 case S4_pstorerffnew_abs: // if (!Pv4.new) memh(#u6)=Rt.H32
1793 BitTracker::RegisterRef &Rs, BitTracker::RegisterRef &Rt);
1917 // set the inputs Rs and Rt.
1920 BitTracker::RegisterRef &Rt) {
1928 // Rs = H1.L1, Rt = H2.L2
1935 Rt = H2;
2054 BitTracker::RegisterRef Rs, Rt;
2055 if (!matchPackhl(RD.Reg, RC, Rs, Rt))
2058 !validateReg(Rt, Hexagon::S2_packhl, 2))
2068 .addReg(Rt.Reg, 0, Rt.Sub);