Rm (definition) in projects: llvm-project

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Searched defs:Rm (Results 1 – 7 of 7) sorted by relevance

/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A D	ARMDisassembler.cpp	1667 unsigned Rm = fieldFromInstruction(Val, 0, 4); DecodeSORegImmOperand() local 1705 unsigned Rm = fieldFromInstruction(Val, 0, 4); DecodeSORegRegOperand() local 2049 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeAddrMode2IdxInstruction() local 2154 unsigned Rm = fieldFromInstruction(Val, 0, 4); DecodeSORegMemOperand() local 2212 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeAddrMode3Instruction() local 2433 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeQADDInstruction() local 2743 unsigned Rm = fieldFromInstruction(Insn, 8, 4); DecodeSMLAInstruction() local 2772 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeTSTInstruction() local 2947 unsigned Rm = fieldFromInstruction(Val, 0, 4); DecodeAddrMode6Operand() local 2970 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLDInstruction() local 3302 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVSTInstruction() local 3571 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD1DupInstruction() local 3619 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD2DupInstruction() local 3668 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD3DupInstruction() local 3704 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD4DupInstruction() local 3857 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVSHLMaxInstruction() local 3907 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeTBLInstruction() local 3993 unsigned Rm = fieldFromInstruction(Val, 3, 3); DecodeThumbAddrModeRR() local 4044 unsigned Rm = fieldFromInstruction(Val, 2, 4); DecodeT2AddrModeSOReg() local 4714 unsigned Rm = fieldFromInstruction(Insn, 3, 4); DecodeThumbAddSPReg() local 4741 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodePostIdxReg() local 4839 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeThumbTableBranch() local 5178 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeLDRPreReg() local 5252 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD1LN() local 5319 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVST1LN() local 5384 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD2LN() local 5451 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVST2LN() local 5514 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD3LN() local 5584 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVST3LN() local 5647 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD4LN() local 5728 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVST4LN() local 5800 unsigned Rm = fieldFromInstruction(Insn, 5, 1); DecodeVMOVSRR() local 5826 unsigned Rm = fieldFromInstruction(Insn, 5, 1); DecodeVMOVRRS() local 6169 unsigned Rm = fieldFromInstruction(Val, 0, 4); DecodeLDR() local 6852 unsigned Rm = fieldFromInstruction(Insn, 12, 4); DecodeMVEOverlappingLongShift() local 6960 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeMVEVCMP() local [all...]
/llvm-project/lldb/source/Plugins/Instruction/ARM/
H A D	EmulateInstructionARM.cpp	1288 uint32_t Rm; // the source register in EmulateMOVRdRm() local 1680 uint32_t Rm; // the source register in EmulateMVNReg() local 1965 uint32_t Rm; // the second operand in EmulateADDSPRm() local 2129 uint32_t Rm; // the register with the target address in EmulateBLXRm() local 2181 uint32_t Rm; // the register with the target address in EmulateBXRm() local 2235 uint32_t Rm; // the register with the target address in EmulateBXJRm() local 2953 uint32_t Rm; // the index register which contains an integer pointing to a in EmulateTB() local 3218 uint32_t Rd, Rn, Rm; in EmulateADDReg() local 3349 uint32_t Rm; // the second operand in EmulateCMNReg() local 3466 uint32_t Rm; // the second operand in EmulateCMPReg() local [all …]
/llvm-project/llvm/lib/Target/ARM/
H A D	ARMBaseInstrInfo.cpp	3509 Register Rm = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local 3516 Register Rm = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local 3546 Register Rm = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local 3558 Register Rm = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local 3577 Register Rm = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local 3597 Register Rm = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local 3605 Register Rm = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local 3623 Register Rm = MI.getOperand(4).getReg(); getNumMicroOpsSwiftLdSt() local 3637 Register Rm = MI.getOperand(4).getReg(); getNumMicroOpsSwiftLdSt() local [all...]
/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A D	AArch64Disassembler.cpp	`1070 unsigned Rm = fieldFromInstruction(insn, 16, 5); DecodeThreeAddrSRegInstruction() local 1672 unsigned Rm = fieldFromInstruction(insn, 16, 5); DecodeAddSubERegInstruction() local 2090 unsigned Rm = fieldFromInstruction(insn, 16, 5); DecodeSETMemOpInstruction() local 2123 uint64_t Rm = fieldFromInstruction(insn, 16, 5); DecodePRFMRegInstruction() local [all...]`
/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A D	ARMMCCodeEmitter.cpp	`923 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); getThumbAddrModeRegRegOpValue() local 1277 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); getLdStSORegOpValue() local [all...]`
/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A D	AArch64InstPrinter.cpp	`863 unsigned Rm = MI->getOperand(2).getReg(); printRangePrefetchAlias() local`
/llvm-project/llvm/lib/Target/Hexagon/
H A D	HexagonISelLoweringHVX.cpp	`953 int Rn = 0, Rm = 0; in buildHvxVectorReg() local`