| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1664 unsigned Rm = fieldFromInstruction(Val, 0, 4); DecodeSORegImmOperand() local
1702 unsigned Rm = fieldFromInstruction(Val, 0, 4); DecodeSORegRegOperand() local
2046 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeAddrMode2IdxInstruction() local
2151 unsigned Rm = fieldFromInstruction(Val, 0, 4); DecodeSORegMemOperand() local
2209 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeAddrMode3Instruction() local
2430 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeQADDInstruction() local
2740 unsigned Rm = fieldFromInstruction(Insn, 8, 4); DecodeSMLAInstruction() local
2769 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeTSTInstruction() local
2944 unsigned Rm = fieldFromInstruction(Val, 0, 4); DecodeAddrMode6Operand() local
2967 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLDInstruction() local
3299 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVSTInstruction() local
3568 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD1DupInstruction() local
3616 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD2DupInstruction() local
3665 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD3DupInstruction() local
3701 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD4DupInstruction() local
3854 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVSHLMaxInstruction() local
3904 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeTBLInstruction() local
3990 unsigned Rm = fieldFromInstruction(Val, 3, 3); DecodeThumbAddrModeRR() local
4041 unsigned Rm = fieldFromInstruction(Val, 2, 4); DecodeT2AddrModeSOReg() local
4711 unsigned Rm = fieldFromInstruction(Insn, 3, 4); DecodeThumbAddSPReg() local
4738 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodePostIdxReg() local
4836 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeThumbTableBranch() local
5175 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeLDRPreReg() local
5249 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD1LN() local
5316 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVST1LN() local
5381 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD2LN() local
5448 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVST2LN() local
5511 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD3LN() local
5581 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVST3LN() local
5644 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVLD4LN() local
5725 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeVST4LN() local
5797 unsigned Rm = fieldFromInstruction(Insn, 5, 1); DecodeVMOVSRR() local
5823 unsigned Rm = fieldFromInstruction(Insn, 5, 1); DecodeVMOVRRS() local
6166 unsigned Rm = fieldFromInstruction(Val, 0, 4); DecodeLDR() local
6849 unsigned Rm = fieldFromInstruction(Insn, 12, 4); DecodeMVEOverlappingLongShift() local
6957 unsigned Rm = fieldFromInstruction(Insn, 0, 4); DecodeMVEVCMP() local
[all...] |
| /freebsd-src/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
| H A D | EmulateInstructionARM.cpp | 1288 uint32_t Rm; // the source register in EmulateMOVRdRm() local
1680 uint32_t Rm; // the source register EmulateMVNReg() local
1965 uint32_t Rm; // the second operand EmulateADDSPRm() local
2129 uint32_t Rm; // the register with the target address EmulateBLXRm() local
2181 uint32_t Rm; // the register with the target address EmulateBXRm() local
2235 uint32_t Rm; // the register with the target address EmulateBXJRm() local
2953 uint32_t Rm; // the index register which contains an integer pointing to a EmulateTB() local
3218 uint32_t Rd, Rn, Rm; EmulateADDReg() local
3349 uint32_t Rm; // the second operand EmulateCMNReg() local
3466 uint32_t Rm; // the second operand EmulateCMPReg() local
3754 uint32_t Rm; // the first operand register EmulateShiftImm() local
3841 Rm; // the register whose bottom byte contains the amount to shift by EmulateShiftReg() local
5709 uint32_t Rm = ReadCoreReg(m, &success); EmulateSTRHRegister() local
5871 uint32_t Rd, Rn, Rm; EmulateADCReg() local
6094 uint32_t Rd, Rn, Rm; EmulateANDReg() local
6259 uint32_t Rd, Rn, Rm; EmulateBICReg() local
6574 uint32_t Rm = EmulateLDRRegister() local
7001 uint32_t Rm = EmulateLDRBRegister() local
7413 uint64_t Rm = EmulateLDRHRegister() local
7817 uint64_t Rm = EmulateLDRSBRegister() local
8245 uint64_t Rm = EmulateLDRSHRegister() local
8375 uint64_t Rm = EmulateSXTB() local
8460 uint64_t Rm = EmulateSXTH() local
8545 uint64_t Rm = EmulateUXTB() local
8627 uint64_t Rm = EmulateUXTH() local
8901 uint32_t Rd, Rn, Rm; EmulateEORReg() local
9068 uint32_t Rd, Rn, Rm; EmulateORRReg() local
9230 uint32_t Rm; // the second operand EmulateRSBReg() local
9368 uint32_t Rm; // the second operand EmulateRSCReg() local
9506 uint32_t Rm; // the second operand EmulateSBCReg() local
9810 uint32_t Rn, Rm; EmulateTEQReg() local
9935 uint32_t Rn, Rm; EmulateTSTReg() local
10055 uint32_t Rm = ReadCoreReg(m, &success); EmulateSUBSPReg() local
10141 uint32_t Rm = ReadCoreReg(m, &success); EmulateADDRegShift() local
10273 uint32_t Rm = ReadCoreReg(m, &success); EmulateSUBReg() local
10839 uint32_t Rm = ReadCoreReg(m, &success); EmulateLDRDRegister() local
11119 uint32_t Rm = ReadCoreReg(m, &success); EmulateSTRDReg() local
11957 uint32_t Rm = ReadCoreReg(m, &success); EmulateVLD1Multiple() local
12121 uint32_t Rm = ReadCoreReg(m, &success); EmulateVLD1Single() local
12289 uint32_t Rm = ReadCoreReg(m, &success); EmulateVST1Multiple() local
12456 uint32_t Rm = ReadCoreReg(m, &success); EmulateVST1Single() local
12578 uint32_t Rm = ReadCoreReg(m, &success); EmulateVLD1SingleAll() local
12706 uint32_t Rm = ReadCoreReg(m, &success); EmulateSUBSPcLrEtc() local
[all...] |
| /freebsd-src/sys/arm64/arm64/ |
| H A D | undefined.c | 206 int attempts, error, Rn, Rd, Rm; in swp_emulate() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 3508 Register Rm = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local
3515 Register Rm = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local
3545 Register Rm = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local
3557 Register Rm = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local
3576 Register Rm = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local
3596 Register Rm = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local
3604 Register Rm = MI.getOperand(3).getReg(); getNumMicroOpsSwiftLdSt() local
3622 Register Rm = MI.getOperand(4).getReg(); getNumMicroOpsSwiftLdSt() local
3636 Register Rm = MI.getOperand(4).getReg(); getNumMicroOpsSwiftLdSt() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 1055 unsigned Rm = fieldFromInstruction(insn, 16, 5); DecodeThreeAddrSRegInstruction() local
1657 unsigned Rm = fieldFromInstruction(insn, 16, 5); DecodeAddSubERegInstruction() local
2075 unsigned Rm = fieldFromInstruction(insn, 16, 5); DecodeSETMemOpInstruction() local
2108 uint64_t Rm = fieldFromInstruction(insn, 16, 5); DecodePRFMRegInstruction() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 923 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue() local
1277 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 863 unsigned Rm = MI->getOperand(2).getReg(); in printRangePrefetchAlias() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 953 int Rn = 0, Rm = 0; in buildHvxVectorReg() local
|