Home
last modified time | relevance | path

Searched defs:Reg2 (Results 1 – 25 of 40) sorted by relevance

12

/llvm-project/clang-tools-extra/test/clang-tidy/checkers/llvm/
H A Dprefer-register-over-unsigned.cpp32 unsigned Reg2 = getReg(); in apply_2() local
59 Register Reg2 = getReg(); in done_2() local
81 unsigned Reg2 = getRegLike(); in do_nothing_2() local
H A Dprefer-register-over-unsigned3.cpp21 unsigned Reg2 = getReg(); in do_nothing_2() local
/llvm-project/llvm/unittests/tools/llvm-exegesis/Mips/
H A DTargetTest.cpp108 const unsigned Reg2 = Mips::T2_64; in TEST_F() local
/llvm-project/llvm/lib/Target/Mips/
H A DMicroMipsSizeReduction.cpp378 static bool ConsecutiveRegisters(unsigned Reg1, unsigned Reg2) { in ConsecutiveRegisters()
407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() local
479 Register Reg2 = MI2->getOperand(1).getReg(); in ReduceXWtoXWP() local
H A DMipsAsmPrinter.cpp841 EmitInstrRegReg(const MCSubtargetInfo & STI,unsigned Opcode,unsigned Reg1,unsigned Reg2) EmitInstrRegReg() argument
861 EmitInstrRegRegReg(const MCSubtargetInfo & STI,unsigned Opcode,unsigned Reg1,unsigned Reg2,unsigned Reg3) EmitInstrRegRegReg() argument
872 EmitMovFPIntPair(const MCSubtargetInfo & STI,unsigned MovOpc,unsigned Reg1,unsigned Reg2,unsigned FPReg1,unsigned FPReg2,bool LE) EmitMovFPIntPair() argument
[all...]
/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCVSXFMAMutate.cpp190 Register Reg2 = MI.getOperand(2).getReg(); processBlock() local
H A DPPCVSXSwapRemoval.cpp899 MI->getOperand(1).setReg(Reg2); in handleSpecialSwappables() local
/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64LowerHomogeneousPrologEpilog.cpp205 assert(!(IsFloat ^ AArch64::FPR64RegClass.contains(Reg2))); in emitStore() argument
246 assert(!(IsFloat ^ AArch64::FPR64RegClass.contains(Reg2))); in emitLoad() argument
[all...]
H A DAArch64FrameLowering.cpp2782 invalidateWindowsRegisterPairing(unsigned Reg1,unsigned Reg2,bool NeedsWinCFI,bool IsFirst,const TargetRegisterInfo * TRI) invalidateWindowsRegisterPairing() argument
2813 invalidateRegisterPairing(unsigned Reg1,unsigned Reg2,bool UsesWinAAPCS,bool NeedsWinCFI,bool NeedsFrameRecord,bool IsFirst,const TargetRegisterInfo * TRI) invalidateRegisterPairing() argument
2833 unsigned Reg2 = AArch64::NoRegister; global() member
3102 unsigned Reg2 = RPI.Reg2; spillCalleeSavedRegisters() local
3345 unsigned Reg2 = RPI.Reg2; restoreCalleeSavedRegisters() local
[all...]
/llvm-project/llvm/lib/Target/X86/
H A DX86InstrBuilder.h166 unsigned Reg2, bool isKill2) { in addRegReg()
/llvm-project/bolt/lib/Passes/
H A DRegReAssign.cpp81 const MCPhysReg Reg2 = *BC.MRI->getLLVMRegNum(CFIReg2, /*isEH=*/false); in swap() local
/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYMCCodeEmitter.cpp270 unsigned Reg2 = in getRegisterSeqOpValue() local
/llvm-project/llvm/unittests/DebugInfo/DWARF/
H A DDWARFDebugFrameTest.cpp1002 constexpr uint8_t Reg2 = 15; TEST() local
1058 constexpr uint8_t Reg2 = 15; TEST() local
1149 constexpr uint8_t Reg2 = 15; TEST() local
[all...]
/llvm-project/llvm/lib/Target/ARM/
H A DThumb2SizeReduction.cpp758 Register Reg2 = MI->getOperand(2).getReg(); ReduceTo2Addr() local
793 Register Reg2 = MI->getOperand(2).getReg(); ReduceTo2Addr() local
H A DA15SDOptimizer.cpp446 createRegSequence(MachineBasicBlock & MBB,MachineBasicBlock::iterator InsertBefore,const DebugLoc & DL,unsigned Reg1,unsigned Reg2) createRegSequence() argument
/llvm-project/llvm/unittests/CodeGen/GlobalISel/
H A DCSETest.cpp80 Register Reg2 = MRI->createGenericVirtualRegister(s32); TEST_F() local
/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AsmBackend.cpp683 unsigned Reg2 = *MRI.getLLVMRegNum(Inst2.getRegister(), true); generateCompactUnwindEncoding() local
[all...]
/llvm-project/llvm/lib/Target/SystemZ/AsmParser/
H A DSystemZAsmParser.cpp990 parseAddress(bool & HaveReg1,Register & Reg1,bool & HaveReg2,Register & Reg2,const MCExpr * & Disp,const MCExpr * & Length,bool HasLength,bool HasVectorIndex) parseAddress() argument
1102 Register Reg1, Reg2; parseAddress() local
1495 Register Reg1, Reg2; parseOperand() local
[all...]
/llvm-project/llvm/include/llvm/MC/
H A DMCRegisterInfo.h83 bool contains(MCRegister Reg1, MCRegister Reg2) const { in contains() argument
/llvm-project/llvm/lib/CodeGen/
H A DAggressiveAntiDepBreaker.cpp89 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2) { in UnionGroups() argument
H A DMachineInstr.cpp2532 Register Reg2 = getOperand(2).getReg(); getFirst3RegLLTs() local
2542 Register Reg2 = getOperand(2).getReg(); getFirst4RegLLTs() local
2554 Register Reg2 = getOperand(2).getReg(); getFirst5RegLLTs() local
/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp227 emitRRR(unsigned Opcode,unsigned Reg0,unsigned Reg1,unsigned Reg2,SMLoc IDLoc,const MCSubtargetInfo * STI) emitRRR() argument
233 emitRRRX(unsigned Opcode,unsigned Reg0,unsigned Reg1,unsigned Reg2,MCOperand Op3,SMLoc IDLoc,const MCSubtargetInfo * STI) emitRRRX() argument
/llvm-project/bolt/lib/Target/AArch64/
H A DAArch64MCPlusBuilder.cpp49 createPushRegisters(MCInst & Inst,MCPhysReg Reg1,MCPhysReg Reg2) createPushRegisters() argument
60 createPopRegisters(MCInst & Inst,MCPhysReg Reg1,MCPhysReg Reg2) createPopRegisters() argument
/llvm-project/llvm/unittests/tools/llvm-exegesis/X86/
H A DTargetTest.cpp87 IsMovRegToReg(unsigned Opcode,int64_t Reg1,int64_t Reg2) IsMovRegToReg() argument
/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp1815 StringRef Reg2(R2); processInstruction() local
1959 StringRef Reg2(R2); processInstruction() local

12