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Searched defs:Reg0 (Results 1 – 24 of 24) sorted by relevance

/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp175 void MipsTargetStreamer::emitR(unsigned Opcode, unsigned Reg0, SMLoc IDLoc, in emitR() argument
184 void MipsTargetStreamer::emitRX(unsigned Opcode, unsigned Reg0, MCOperand Op1, in emitRX() argument
194 void MipsTargetStreamer::emitRI(unsigned Opcode, unsigned Reg0, int32_t Imm, in emitRI() argument
199 void MipsTargetStreamer::emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRR() argument
214 void MipsTargetStreamer::emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRX() argument
226 emitRRR(unsigned Opcode,unsigned Reg0,unsigned Reg1,unsigned Reg2,SMLoc IDLoc,const MCSubtargetInfo * STI) emitRRR() argument
232 emitRRRX(unsigned Opcode,unsigned Reg0,unsigned Reg1,unsigned Reg2,MCOperand Op3,SMLoc IDLoc,const MCSubtargetInfo * STI) emitRRRX() argument
245 emitRRI(unsigned Opcode,unsigned Reg0,unsigned Reg1,int16_t Imm,SMLoc IDLoc,const MCSubtargetInfo * STI) emitRRI() argument
251 emitRRIII(unsigned Opcode,unsigned Reg0,unsigned Reg1,int16_t Imm0,int16_t Imm1,int16_t Imm2,SMLoc IDLoc,const MCSubtargetInfo * STI) emitRRIII() argument
[all...]
H A DMipsMCCodeEmitter.cpp97 unsigned Reg0 = Ctx.getRegisterInfo()->getEncodingValue(RegOp0); in LowerCompactBranch() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ExpandPseudo.cpp467 Register Reg0 = TRI->getSubReg(Reg, X86::sub_mask_0); in ExpandMI() local
505 Register Reg0 = TRI->getSubReg(Reg, X86::sub_mask_0); ExpandMI() local
H A DX86CompressEVEX.cpp190 Register Reg0 = MI.getOperand(0).getReg(); isRedundantNewDataDest() local
H A DX86InstrInfo.cpp7413 Register Reg0 = HasDef ? MI.getOperand(0).getReg() : Register(); foldMemoryOperandImpl() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonPeephole.cpp233 Register Reg0 = Op0.getReg(); in runOnMachineFunction() local
H A DHexagonBitTracker.cpp314 unsigned Reg0 = Reg[0].Reg; in evaluate() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp2167 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); SelectVLD() local
2302 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); SelectVST() local
2474 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); SelectVLDSTLane() local
3012 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); SelectVLDDup() local
3366 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); tryV6T2BitfieldExtractOp() local
3414 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); tryV6T2BitfieldExtractOp() local
3436 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); tryV6T2BitfieldExtractOp() local
3457 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); tryV6T2BitfieldExtractOp() local
3807 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); Select() local
3826 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); Select() local
5191 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); Select() local
5202 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); Select() local
5781 Register Reg0 = cast<RegisterSDNode>(V0)->getReg(); tryInlineAsm() local
[all...]
H A DThumb2SizeReduction.cpp754 Register Reg0 = MI->getOperand(0).getReg(); in ReduceTo2Addr() local
H A DARMAsmPrinter.cpp336 Register Reg0 = TRI->getSubReg(RegBegin, ARM::gsub_0); in PrintAsmOperand() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVLegalizerInfo.cpp302 Register Reg0 = Op0.getReg(); legalizeCustom() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp228 Register Reg0 = cast<RegisterSDNode>(V0)->getReg(); tryInlineAsm() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEFrameLowering.cpp462 unsigned Reg0 = emitPrologue() local
480 unsigned Reg0 = MRI->getDwarfRegNum(Reg, true); emitPrologue() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp193 unsigned Reg0 = cast<RegisterSDNode>(V0)->getReg(); selectInlineAsm() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.cpp1190 unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg()); InsertSEH() local
1203 Register Reg0 = MBBI->getOperand(1).getReg(); InsertSEH() local
1241 unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(0).getReg()); InsertSEH() local
1252 Register Reg0 = MBBI->getOperand(0).getReg(); InsertSEH() local
1286 unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(0).getReg()); InsertSEH() local
1299 unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg()); InsertSEH() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp1462 unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0); printVectorListTwo() local
1475 unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0); printVectorListTwoSpaced() local
1530 unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0); printVectorListTwoAllLanes() local
1577 unsigned Reg0 = MRI.getSubReg(Reg, ARM::dsub_0); printVectorListTwoSpacedAllLanes() local
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineInstr.cpp2446 Register Reg0 = getOperand(0).getReg(); getFirst2RegLLTs() local
2454 Register Reg0 = getOperand(0).getReg(); getFirst3RegLLTs() local
2464 Register Reg0 = getOperand(0).getReg(); getFirst4RegLLTs() local
2476 Register Reg0 = getOperand(0).getReg(); getFirst5RegLLTs() local
[all...]
H A DRegAllocFast.cpp1303 Register Reg0 = MO0.getReg(); findAndSortDefOperandIndexes() local
H A DTargetInstrInfo.cpp185 Register Reg0 = HasDef ? MI.getOperand(0).getReg() : Register(); in commuteInstructionImpl() local
H A DRegisterCoalescer.cpp2719 Register Reg0; in valuesIdentical() local
/freebsd-src/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCRegisterInfo.h704 uint16_t Reg0 = 0; global() variable
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFoldOperands.cpp968 Register Reg0 = UseMI->getOperand(0).getReg(); foldOperand() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.cpp1981 Register Reg0 = MRI.createVirtualRegister(&SystemZ::GR64BitRegClass); loadImmediate() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp1143 Register Reg0 = MI.getOperand(0).getReg(); commuteInstructionImpl() local
1173 Register Reg0 = ChangeReg0 ? Reg2 : MI.getOperand(0).getReg(); commuteInstructionImpl() local