Lines Matching defs:Reg0
175 void MipsTargetStreamer::emitR(unsigned Opcode, unsigned Reg0, SMLoc IDLoc,
179 TmpInst.addOperand(MCOperand::createReg(Reg0));
184 void MipsTargetStreamer::emitRX(unsigned Opcode, unsigned Reg0, MCOperand Op1,
188 TmpInst.addOperand(MCOperand::createReg(Reg0));
194 void MipsTargetStreamer::emitRI(unsigned Opcode, unsigned Reg0, int32_t Imm,
196 emitRX(Opcode, Reg0, MCOperand::createImm(Imm), IDLoc, STI);
199 void MipsTargetStreamer::emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1,
201 emitRX(Opcode, Reg0, MCOperand::createReg(Reg1), IDLoc, STI);
214 void MipsTargetStreamer::emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1,
219 TmpInst.addOperand(MCOperand::createReg(Reg0));
226 void MipsTargetStreamer::emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1,
229 emitRRX(Opcode, Reg0, Reg1, MCOperand::createReg(Reg2), IDLoc, STI);
232 void MipsTargetStreamer::emitRRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1,
237 TmpInst.addOperand(MCOperand::createReg(Reg0));
245 void MipsTargetStreamer::emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1,
248 emitRRX(Opcode, Reg0, Reg1, MCOperand::createImm(Imm), IDLoc, STI);
251 void MipsTargetStreamer::emitRRIII(unsigned Opcode, unsigned Reg0,
257 TmpInst.addOperand(MCOperand::createReg(Reg0));