/llvm-project/clang/lib/Rewrite/ |
H A D | HTMLRewrite.cpp | 60 HighlightRange(RewriteBuffer & RB,unsigned B,unsigned E,const char * BufferStart,const char * StartTag,const char * EndTag) HighlightRange() argument 144 RewriteBuffer &RB = R.getEditBuffer(FID); EscapeText() local 237 AddLineNumber(RewriteBuffer & RB,unsigned LineNo,unsigned B,unsigned E) AddLineNumber() argument 261 RewriteBuffer &RB = R.getEditBuffer(FID); AddLineNumbers() local 479 RewriteBuffer &RB = R.getEditBuffer(FID); SyntaxHighlightImpl() local 565 RewriteBuffer &RB = R.getEditBuffer(FID); SyntaxHighlight() local 584 __anon8bec2a350102(RewriteBuffer &RB, unsigned B, unsigned E, const char *BufferStart, const char *StartTag, const char *EndTag) SyntaxHighlight() argument [all...] |
H A D | Rewriter.cpp | 158 const RewriteBuffer &RB = I->second; getRangeSize() local 209 const RewriteBuffer &RB = I->second; getRewrittenText() local 395 RewriteBuffer &RB = getEditBuffer(FID); IncreaseIndentation() local
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/llvm-project/compiler-rt/lib/scudo/standalone/ |
H A D | combined.h | 849 AllocationRingBuffer *RB = getRingBuffer(); in getStackDepotSize() local 188 AllocationRingBuffer *RB = getRingBuffer(); enableRingBuffer() local 196 AllocationRingBuffer *RB = getRingBuffer(); disableRingBuffer() local 843 AllocationRingBuffer *RB = getRingBuffer(); getStackDepotAddress() local 868 AllocationRingBuffer *RB = getRingBuffer(); getRingBufferSize() local 1391 AllocationRingBuffer *RB = getRingBuffer(); storePrimaryAllocationStackMaybe() local 1399 storeRingBufferEntry(AllocationRingBuffer * RB,void * Ptr,u32 AllocationTrace,u32 AllocationTid,uptr AllocationSize,u32 DeallocationTrace,u32 DeallocationTid) storeRingBufferEntry() argument 1428 AllocationRingBuffer *RB = getRingBuffer(); storeSecondaryAllocationStackMaybe() local 1445 AllocationRingBuffer *RB = getRingBuffer(); storeDeallocationStackMaybe() local 1632 getRingBufferEntry(AllocationRingBuffer * RB,uptr N) getRingBufferEntry() argument 1639 getRingBufferEntry(const AllocationRingBuffer * RB,uptr N) getRingBufferEntry() argument 1692 auto *RB = reinterpret_cast<AllocationRingBuffer *>(MemMap.getBase()); initRingBufferMaybe() local 1704 AllocationRingBuffer *RB = getRingBuffer(); unmapRingBuffer() local [all...] |
/llvm-project/clang/unittests/Interpreter/ |
H A D | IncrementalCompilerBuilderTest.cpp | 24 for (const auto &RB : CI.getPreprocessorOpts().RemappedFileBuffers) { in cleanupRemappedFileBuffers() local
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/llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
H A D | MacOSXAPIChecker.cpp | 79 const MemRegion *RB = R->getBaseRegion(); in CheckDispatchOnce() local
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/llvm-project/clang/lib/Frontend/Rewrite/ |
H A D | RewriteMacros.cpp | 94 RewriteBuffer &RB = Rewrite.getEditBuffer(SM.getMainFileID()); RewriteMacrosInInput() local
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/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCExpandAtomicPseudoInsts.cpp | 156 Register RB = MI.getOperand(3).getReg(); expandAtomicRMW128() local 232 Register RB = MI.getOperand(3).getReg(); expandAtomicCmpSwap128() local
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/llvm-project/compiler-rt/lib/sanitizer_common/tests/ |
H A D | sanitizer_ring_buffer_test.cpp | 36 RingBuffer<T> *RB; in TestRB() local
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/llvm-project/compiler-rt/lib/sanitizer_common/ |
H A D | sanitizer_ring_buffer.h | 27 RingBuffer *RB = reinterpret_cast<RingBuffer*>(Ptr); in New() local
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/llvm-project/clang/test/Layout/ |
H A D | ms-x86-alias-avoidance-padding.cpp | 254 struct RB { char c; }; struct
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/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
H A D | PPCRegisterBankInfo.cpp | 273 auto *RB = getRegBank(MI.getOperand(0).getReg(), MRI, TRI); hasFPConstraints() local
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H A D | PPCInstructionSelector.cpp | 103 static const TargetRegisterClass *getRegClass(LLT Ty, const RegisterBank *RB) { in getRegClass()
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/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64RegisterBankInfo.cpp | 105 CHECK_PARTIALMAP(Idx,ValStartIdx,ValLength,RB) AArch64RegisterBankInfo() argument 558 auto *RB = getRegBank(MI.getOperand(0).getReg(), MRI, TRI); hasFPConstraints() local
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H A D | AArch64InstructionSelector.cpp | 566 getRegClassForTypeOnBank(LLT Ty,const RegisterBank & RB,bool GetAllRegSet=false) getRegClassForTypeOnBank() argument 602 getMinClassForRegBank(const RegisterBank & RB,TypeSize SizeInBits,bool GetAllRegSet=false) getMinClassForRegBank() argument 672 getMinSizeForRegBank(const RegisterBank & RB) getMinSizeForRegBank() argument 987 const RegisterBank &RB = *RegClassOrBank.get<const RegisterBank *>(); selectDebugInstr() local 2472 const RegisterBank &RB = *RegClassOrBank.get<const RegisterBank *>(); select() local 2595 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); select() local 2920 const RegisterBank &RB = *RBI.getRegBank(ValReg, MRI, TRI); select() local 3084 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); select() local 3728 const RegisterBank &RB = *RBI.getRegBank(I.getOperand(1).getReg(), MRI, TRI); selectMergeValues() local 4149 getInsertVecEltOpInfo(const RegisterBank & RB,unsigned EltSize) getInsertVecEltOpInfo() argument 5081 emitLaneInsert(std::optional<Register> DstReg,Register SrcReg,Register EltReg,unsigned LaneIdx,const RegisterBank & RB,MachineIRBuilder & MIRBuilder) const emitLaneInsert() argument 5709 const RegisterBank &RB = *RBI.getRegBank(I.getOperand(1).getReg(), MRI, TRI); selectBuildVector() local 7713 const RegisterBank *RB = MRI.getRegBankOrNull(OpReg); fixupPHIOpBanks() local 7775 const RegisterBank *RB = MRI.getRegBankOrNull(MO.getReg()); processPHIs() local [all...] |
/llvm-project/llvm/lib/CodeGen/ |
H A D | RegisterBankInfo.cpp | 94 if (auto *RB = dyn_cast_if_present<const RegisterBank *>(RegClassOrBank)) in getRegBank() local 142 if (RB && !RB->covers(RC)) in constrainGenericRegister() local
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/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | RegisterBankInfo.h | 606 virtual bool isDivergentRegBank(const RegisterBank *RB) const { in isDivergentRegBank()
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/llvm-project/llvm/lib/Target/X86/GISel/ |
H A D | X86InstructionSelector.cpp | 253 const RegisterBank &RB = *cast<const RegisterBank *>(RegClassOrBank); selectDebugInstr() local 441 getLoadStoreOp(const LLT & Ty,const RegisterBank & RB,unsigned Opc,Align Alignment) const getLoadStoreOp() argument 555 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); selectLoadStoreOp() local [all...] |
H A D | X86RegisterBankInfo.cpp | 114 auto *RB = getRegBank(MI.getOperand(0).getReg(), MRI, TRI); hasFPConstraints() local
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/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CSEInfo.cpp | 397 if (const auto *RB = dyn_cast_if_present<const RegisterBank *>(RCOrRB)) addNodeIDReg() local
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H A D | RegBankSelect.cpp | 644 const RegisterBank *RB = in assignInstr() local
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/llvm-project/clang/lib/Frontend/ |
H A D | ASTUnit.cpp | 189 for (const auto &RB : PreprocessorOpts.RemappedFileBuffers) { in getBufferForFileHandlingRemapping() local 264 for (const auto &RB : PPOpts.RemappedFileBuffers) in ~ASTUnit() local 1882 for (const auto &RB : PPOpts.RemappedFileBuffers) Reparse() local
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H A D | PrecompiledPreamble.cpp | 650 for (const auto &RB : PreprocessorOpts.RemappedFileBuffers) { in CanReuse() local
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/llvm-project/llvm/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 724 const CodeGenRegBank &RB = CGP.getTargetInfo().getRegBank(); EmitResultLeafAsOperand() local
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/llvm-project/clang/lib/AST/ |
H A D | Stmt.cpp | 367 CompoundStmt(ArrayRef<Stmt * > Stmts,FPOptionsOverride FPFeatures,SourceLocation LB,SourceLocation RB) CompoundStmt() argument 385 Create(const ASTContext & C,ArrayRef<Stmt * > Stmts,FPOptionsOverride FPFeatures,SourceLocation LB,SourceLocation RB) Create() argument
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/llvm-project/clang/include/clang/AST/ |
H A D | ExprObjC.h | 863 ObjCSubscriptRefExpr(Expr * base,Expr * key,QualType T,ExprValueKind VK,ExprObjectKind OK,ObjCMethodDecl * getMethod,ObjCMethodDecl * setMethod,SourceLocation RB) ObjCSubscriptRefExpr() argument 875 setRBracket(SourceLocation RB) setRBracket() argument
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