| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 412 bool isSALU(uint16_t Opcode) const { in isSALU() argument
420 bool isVALU(uint16_t Opcode) const { in isVALU() argument
428 isImage(uint16_t Opcode) isImage() argument
436 isVMEM(uint16_t Opcode) isVMEM() argument
444 isSOP1(uint16_t Opcode) isSOP1() argument
452 isSOP2(uint16_t Opcode) isSOP2() argument
460 isSOPC(uint16_t Opcode) isSOPC() argument
468 isSOPK(uint16_t Opcode) isSOPK() argument
476 isSOPP(uint16_t Opcode) isSOPP() argument
484 isPacked(uint16_t Opcode) isPacked() argument
492 isVOP1(uint16_t Opcode) isVOP1() argument
500 isVOP2(uint16_t Opcode) isVOP2() argument
508 isVOP3(uint16_t Opcode) isVOP3() argument
516 isSDWA(uint16_t Opcode) isSDWA() argument
524 isVOPC(uint16_t Opcode) isVOPC() argument
532 isMUBUF(uint16_t Opcode) isMUBUF() argument
540 isMTBUF(uint16_t Opcode) isMTBUF() argument
548 isSMRD(uint16_t Opcode) isSMRD() argument
558 isDS(uint16_t Opcode) isDS() argument
566 isLDSDMA(uint16_t Opcode) isLDSDMA() argument
574 isGWS(uint16_t Opcode) isGWS() argument
584 isMIMG(uint16_t Opcode) isMIMG() argument
592 isVIMAGE(uint16_t Opcode) isVIMAGE() argument
600 isVSAMPLE(uint16_t Opcode) isVSAMPLE() argument
608 isGather4(uint16_t Opcode) isGather4() argument
623 isSegmentSpecificFLAT(uint16_t Opcode) isSegmentSpecificFLAT() argument
632 isFLATGlobal(uint16_t Opcode) isFLATGlobal() argument
640 isFLATScratch(uint16_t Opcode) isFLATScratch() argument
645 isFLAT(uint16_t Opcode) isFLAT() argument
661 isEXP(uint16_t Opcode) isEXP() argument
669 isAtomicNoRet(uint16_t Opcode) isAtomicNoRet() argument
677 isAtomicRet(uint16_t Opcode) isAtomicRet() argument
686 isAtomic(uint16_t Opcode) isAtomic() argument
699 isWQM(uint16_t Opcode) isWQM() argument
707 isDisableWQM(uint16_t Opcode) isDisableWQM() argument
715 isVGPRSpill(uint16_t Opcode) isVGPRSpill() argument
723 isSGPRSpill(uint16_t Opcode) isSGPRSpill() argument
727 isSpillOpcode(uint16_t Opcode) isSpillOpcode() argument
732 isWWMRegSpillOpcode(uint16_t Opcode) isWWMRegSpillOpcode() argument
739 isChainCallOpcode(uint64_t Opcode) isChainCallOpcode() argument
748 isDPP(uint16_t Opcode) isDPP() argument
756 isTRANS(uint16_t Opcode) isTRANS() argument
764 isVOP3P(uint16_t Opcode) isVOP3P() argument
772 isVINTRP(uint16_t Opcode) isVINTRP() argument
780 isMAI(uint16_t Opcode) isMAI() argument
797 isWMMA(uint16_t Opcode) isWMMA() argument
809 isSWMMAC(uint16_t Opcode) isSWMMAC() argument
813 isDOT(uint16_t Opcode) isDOT() argument
821 isLDSDIR(uint16_t Opcode) isLDSDIR() argument
829 isVINTERP(uint16_t Opcode) isVINTERP() argument
849 sopkIsZext(uint16_t Opcode) sopkIsZext() argument
859 isScalarStore(uint16_t Opcode) isScalarStore() argument
867 isFixedSize(uint16_t Opcode) isFixedSize() argument
875 hasFPClamp(uint16_t Opcode) hasFPClamp() argument
895 usesFPDPRounding(uint16_t Opcode) usesFPDPRounding() argument
903 isFPAtomic(uint16_t Opcode) isFPAtomic() argument
914 isBarrierStart(unsigned Opcode) isBarrierStart() argument
926 doesNotReadTiedSource(uint16_t Opcode) doesNotReadTiedSource() argument
930 getNonSoftWaitcntOpcode(unsigned Opcode) getNonSoftWaitcntOpcode() argument
1088 getOpSize(uint16_t Opcode,unsigned OpNo) getOpSize() argument
1220 getMCOpcodeFromPseudo(unsigned Opcode) getMCOpcodeFromPseudo() argument
[all...] |
| /freebsd-src/contrib/llvm-project/lldb/source/Plugins/Instruction/PPC64/ |
| H A D | EmulateInstructionPPC64.h | 71 struct Opcode { struct
80 Opcode *GetOpcodeForInstruction(uint32_t opcode); argument
|
| /freebsd-src/contrib/llvm-project/lldb/source/Plugins/Instruction/LoongArch/ |
| H A D | EmulateInstructionLoongArch.h | 66 struct Opcode { struct
74 Opcode *GetOpcodeForInstruction(uint32_t inst); argument
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 96 isST(unsigned Opcode) isST() argument
101 isSTX32(unsigned Opcode) isSTX32() argument
105 isSTX64(unsigned Opcode) isSTX64() argument
110 isLDX32(unsigned Opcode) isLDX32() argument
114 isLDX64(unsigned Opcode) isLDX64() argument
119 isLDSX(unsigned Opcode) isLDSX() argument
123 isLoadInst(unsigned Opcode) isLoadInst() argument
143 unsigned Opcode = DefInst->getOpcode(); checkADDrr() local
177 checkShift(MachineRegisterInfo * MRI,MachineBasicBlock & MBB,MachineOperand * RelocOp,const GlobalValue * GVal,unsigned Opcode) checkShift() argument
207 unsigned Opcode = I->getParent()->getOpcode(); processCandidate() local
287 unsigned Opcode = Inst->getOpcode(); processInst() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVMakeCompressible.cpp | 98 static unsigned log2LdstWidth(unsigned Opcode) { in log2LdstWidth() argument
123 static unsigned offsetMask(unsigned Opcode) { in compressibleSPOffset() argument
117 compressedLDSTOffsetMask(unsigned Opcode) compressedLDSTOffsetMask() argument
131 getBaseAdjustForCompression(int64_t Offset,unsigned Opcode) getBaseAdjustForCompression() argument
146 const unsigned Opcode = MI.getOpcode(); isCompressibleLoad() local
155 const unsigned Opcode = MI.getOpcode(); isCompressibleStore() local
174 const unsigned Opcode = MI.getOpcode(); getRegImmPairPreventingCompression() local
281 unsigned Opcode = MI.getOpcode(); updateOperands() local
360 unsigned Opcode = RISCV::FPR32RegClass.contains(RegImm.Reg) runOnMachineFunction() local
[all...] |
| H A D | RISCVTargetTransformInfo.cpp | 142 getIntImmCostInst(unsigned Opcode,unsigned Idx,const APInt & Imm,Type * Ty,TTI::TargetCostKind CostKind,Instruction * Inst) getIntImmCostInst() argument
545 getMaskedMemoryOpCost(unsigned Opcode,Type * Src,Align Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind) getMaskedMemoryOpCost() argument
557 getInterleavedMemoryOpCost(unsigned Opcode,Type * VecTy,unsigned Factor,ArrayRef<unsigned> Indices,Align Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,bool UseMaskForCond,bool UseMaskForGaps) getInterleavedMemoryOpCost() argument
636 getGatherScatterOpCost(unsigned Opcode,Type * DataTy,const Value * Ptr,bool VariableMask,Align Alignment,TTI::TargetCostKind CostKind,const Instruction * I) getGatherScatterOpCost() argument
839 getCastInstrCost(unsigned Opcode,Type * Dst,Type * Src,TTI::CastContextHint CCH,TTI::TargetCostKind CostKind,const Instruction * I) getCastInstrCost() argument
954 getArithmeticReductionCost(unsigned Opcode,VectorType * Ty,std::optional<FastMathFlags> FMF,TTI::TargetCostKind CostKind) getArithmeticReductionCost() argument
989 getExtendedReductionCost(unsigned Opcode,bool IsUnsigned,Type * ResTy,VectorType * ValTy,FastMathFlags FMF,TTI::TargetCostKind CostKind) getExtendedReductionCost() argument
1034 getMemoryOpCost(unsigned Opcode,Type * Src,MaybeAlign Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,TTI::OperandValueInfo OpInfo,const Instruction * I) getMemoryOpCost() argument
1062 getCmpSelInstrCost(unsigned Opcode,Type * ValTy,Type * CondTy,CmpInst::Predicate VecPred,TTI::TargetCostKind CostKind,const Instruction * I) getCmpSelInstrCost() argument
1145 getCFInstrCost(unsigned Opcode,TTI::TargetCostKind CostKind,const Instruction * I) getCFInstrCost() argument
1154 getVectorInstrCost(unsigned Opcode,Type * Val,TTI::TargetCostKind CostKind,unsigned Index,Value * Op0,Value * Op1) getVectorInstrCost() argument
1269 getArithmeticInstrCost(unsigned Opcode,Type * Ty,TTI::TargetCostKind CostKind,TTI::OperandValueInfo Op1Info,TTI::OperandValueInfo Op2Info,ArrayRef<const Value * > Args,const Instruction * CxtI) getArithmeticInstrCost() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 146 static inline bool isSPLSOpcode(unsigned Opcode) { in isSPLSOpcode() argument
160 static inline bool isRMOpcode(unsigned Opcode) { in isRMOpcode() argument
170 static inline bool isRRMOpcode(unsigned Opcode) { in isRRMOpcode() argument
|
| H A D | LanaiRegisterInfo.cpp | 69 static bool isALUArithLoOpcode(unsigned Opcode) { in isALUArithLoOpcode()
85 static unsigned getOppositeALULoOpcode(unsigned Opcode) { in getOppositeALULoOpcode()
108 static unsigned getRRMOpcodeVariant(unsigned Opcode) { in getRRMOpcodeVariant()
|
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetOpcodes.h | 30 inline bool isPreISelGenericOpcode(unsigned Opcode) { in isPreISelGenericOpcode()
36 inline bool isTargetSpecificOpcode(unsigned Opcode) { in isTargetSpecificOpcode()
42 inline bool isPreISelGenericOptimizationHint(unsigned Opcode) { in isPreISelGenericOptimizationHint()
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZShortenInst.cpp | 110 bool SystemZShortenInst::shortenOn0(MachineInstr &MI, unsigned Opcode) { in shortenOn0() argument
120 shortenOn01(MachineInstr & MI,unsigned Opcode) shortenOn01() argument
132 shortenOn001(MachineInstr & MI,unsigned Opcode) shortenOn001() argument
145 shortenOn001AddCC(MachineInstr & MI,unsigned Opcode) shortenOn001AddCC() argument
158 shortenFPConv(MachineInstr & MI,unsigned Opcode) shortenFPConv() argument
180 shortenFusedFPOp(MachineInstr & MI,unsigned Opcode) shortenFusedFPOp() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMUnwindOpAsm.h | 72 void EmitInt8(unsigned Opcode) { in EmitInt8()
77 void EmitInt16(unsigned Opcode) { in EmitInt16()
83 void emitBytes(const uint8_t *Opcode, size_t Size) { in emitBytes()
|
| /freebsd-src/contrib/llvm-project/llvm/tools/llvm-readobj/ |
| H A D | ARMEHABIPrinter.h | 99 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_00xxxxxx() local
105 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_01xxxxxx() local
124 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011101() local
129 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011111() local
134 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_1001nnnn() local
139 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10100nnn() local
146 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10101nnn() local
153 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10110000() local
169 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10110010_uleb128() local
196 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_101101nn() local
[all …]
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCPredicates.cpp | 17 PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) { in InvertPredicate()
51 PPC::Predicate PPC::getSwappedPredicate(PPC::Predicate Opcode) { in getSwappedPredicate()
|
| /freebsd-src/contrib/llvm-project/lldb/include/lldb/Core/ |
| H A D | Opcode.h | 43 Opcode(uint8_t inst, lldb::ByteOrder order) in Opcode() function
48 Opcode(uint16_t inst, lldb::ByteOrder order) in Opcode() function
53 Opcode(uint32_t inst, lldb::ByteOrder order) in Opcode() function
58 Opcode(uint64_t inst, lldb::ByteOrder order) in Opcode() function
63 Opcode(uint8_t *bytes, size_t length) in Opcode() function
|
| /freebsd-src/sys/contrib/dev/acpica/components/executer/ |
| H A D | exmisc.c | 277 UINT16 Opcode, in AcpiExDoMathOp() argument
372 UINT16 Opcode, in AcpiExDoLogicalNumericOp() argument
445 UINT16 Opcode, in AcpiExDoLogicalOp() argument
[all...] |
| /freebsd-src/sys/contrib/dev/acpica/components/parser/ |
| H A D | psopinfo.c | 181 UINT16 Opcode) in AcpiPsGetOpcodeInfo() argument
278 AcpiPsGetOpcodeName(UINT16 Opcode) AcpiPsGetOpcodeName() argument
[all...] |
| H A D | psutils.c | 208 UINT16 Opcode) in AcpiPsInitOp() argument
239 UINT16 Opcode, in AcpiPsAllocOp() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegacyLegalizerInfo.h | 85 unsigned Opcode; member
180 setLegalizeScalarToDifferentSizeStrategy(const unsigned Opcode,const unsigned TypeIdx,SizeChangeStrategy S) setLegalizeScalarToDifferentSizeStrategy() argument
191 setLegalizeVectorElementToDifferentSizeStrategy(const unsigned Opcode,const unsigned TypeIdx,SizeChangeStrategy S) setLegalizeVectorElementToDifferentSizeStrategy() argument
311 setScalarAction(const unsigned Opcode,const unsigned TypeIndex,const SizeAndActionsVec & SizeAndActions) setScalarAction() argument
317 setPointerAction(const unsigned Opcode,const unsigned TypeIndex,const unsigned AddressSpace,const SizeAndActionsVec & SizeAndActions) setPointerAction() argument
334 setScalarInVectorAction(const unsigned Opcode,const unsigned TypeIndex,const SizeAndActionsVec & SizeAndActions) setScalarInVectorAction() argument
345 setVectorNumElementAction(const unsigned Opcode,const unsigned TypeIndex,const unsigned ElementSize,const SizeAndActionsVec & SizeAndActions) setVectorNumElementAction() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | LeonPasses.cpp | 51 unsigned Opcode = MI.getOpcode(); in runOnMachineFunction() local
86 unsigned Opcode = MI.getOpcode(); in runOnMachineFunction() local
140 unsigned Opcode = MI.getOpcode(); in runOnMachineFunction() local
|
| /freebsd-src/contrib/bearssl/T0/ |
| H A D | Opcode.cs | 28 abstract class Opcode { class
30 internal Opcode() in Opcode() method in Opcode
|
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrInfo.h | 63 const MCInstrDesc &get(unsigned Opcode) const { in get()
70 StringRef getName(unsigned Opcode) const { in getName()
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonTargetTransformInfo.cpp | 178 getMemoryOpCost(unsigned Opcode,Type * Src,MaybeAlign Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,TTI::OperandValueInfo OpInfo,const Instruction * I) getMemoryOpCost() argument
236 getMaskedMemoryOpCost(unsigned Opcode,Type * Src,Align Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind) getMaskedMemoryOpCost() argument
252 getGatherScatterOpCost(unsigned Opcode,Type * DataTy,const Value * Ptr,bool VariableMask,Align Alignment,TTI::TargetCostKind CostKind,const Instruction * I) getGatherScatterOpCost() argument
259 getInterleavedMemoryOpCost(unsigned Opcode,Type * VecTy,unsigned Factor,ArrayRef<unsigned> Indices,Align Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,bool UseMaskForCond,bool UseMaskForGaps) getInterleavedMemoryOpCost() argument
271 getCmpSelInstrCost(unsigned Opcode,Type * ValTy,Type * CondTy,CmpInst::Predicate VecPred,TTI::TargetCostKind CostKind,const Instruction * I) getCmpSelInstrCost() argument
287 getArithmeticInstrCost(unsigned Opcode,Type * Ty,TTI::TargetCostKind CostKind,TTI::OperandValueInfo Op1Info,TTI::OperandValueInfo Op2Info,ArrayRef<const Value * > Args,const Instruction * CxtI) getArithmeticInstrCost() argument
307 getCastInstrCost(unsigned Opcode,Type * DstTy,Type * SrcTy,TTI::CastContextHint CCH,TTI::TargetCostKind CostKind,const Instruction * I) getCastInstrCost() argument
334 getVectorInstrCost(unsigned Opcode,Type * Val,TTI::TargetCostKind CostKind,unsigned Index,Value * Op0,Value * Op1) getVectorInstrCost() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetTransformInfo.cpp | 230 InstructionCost PPCTTIImpl::getIntImmCostInst(unsigned Opcode, unsigned Idx, in getIntImmCostInst() argument
553 InstructionCost PPCTTIImpl::vectorCostAdjustmentFactor(unsigned Opcode, in vectorCostAdjustmentFactor() argument
585 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, in getArithmeticInstrCost() argument
628 getCFInstrCost(unsigned Opcode,TTI::TargetCostKind CostKind,const Instruction * I) getCFInstrCost() argument
637 getCastInstrCost(unsigned Opcode,Type * Dst,Type * Src,TTI::CastContextHint CCH,TTI::TargetCostKind CostKind,const Instruction * I) getCastInstrCost() argument
657 getCmpSelInstrCost(unsigned Opcode,Type * ValTy,Type * CondTy,CmpInst::Predicate VecPred,TTI::TargetCostKind CostKind,const Instruction * I) getCmpSelInstrCost() argument
675 getVectorInstrCost(unsigned Opcode,Type * Val,TTI::TargetCostKind CostKind,unsigned Index,Value * Op0,Value * Op1) getVectorInstrCost() argument
755 getMemoryOpCost(unsigned Opcode,Type * Src,MaybeAlign Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,TTI::OperandValueInfo OpInfo,const Instruction * I) getMemoryOpCost() argument
845 getInterleavedMemoryOpCost(unsigned Opcode,Type * VecTy,unsigned Factor,ArrayRef<unsigned> Indices,Align Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,bool UseMaskForCond,bool UseMaskForGaps) getInterleavedMemoryOpCost() argument
1004 hasActiveVectorLength(unsigned Opcode,Type * DataType,Align Alignment) const hasActiveVectorLength() argument
1032 getVPMemoryOpCost(unsigned Opcode,Type * Src,Align Alignment,unsigned AddressSpace,TTI::TargetCostKind CostKind,const Instruction * I) getVPMemoryOpCost() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 502 isFpMLxInstruction(unsigned Opcode) isFpMLxInstruction() argument
516 canCauseFpMLxStall(unsigned Opcode) canCauseFpMLxStall() argument
589 VCMPOpcodeToVPT(unsigned Opcode) VCMPOpcodeToVPT() argument
898 isLegalAddressImm(unsigned Opcode,int Imm,const TargetInstrInfo * TII) isLegalAddressImm() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreFrameLowering.cpp | 106 int Opcode = isImmU6(OpImm) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; in IfNeededExtSP() local
128 int Opcode = isImmU6(OpImm) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6; in IfNeededLDAWSP() local
201 int Opcode = isImmU6(Offset) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6; in RestoreSpillList() local
262 int Opcode = isImmU6(Adjusted) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6; emitPrologue() local
287 int Opcode = isImmU6(Offset) ? XCore::STWSP_ru6 : XCore::STWSP_lru6; emitPrologue() local
400 int Opcode = isImmU6(RemainingAdj) ? XCore::RETSP_u6 : XCore::RETSP_lu6; emitEpilogue() local
407 int Opcode = isImmU6(RemainingAdj) ? XCore::LDAWSP_ru6 : emitEpilogue() local
512 int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; eliminateCallFramePseudoInstr() local
516 int Opcode = isU6 ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6; eliminateCallFramePseudoInstr() local
[all...] |