| /llvm-project/clang/test/Analysis/ |
| H A D | NewDelete-path-notes.cpp | 23 struct Odd { struct
29 void test(Odd *odd) { in test() argument
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| /llvm-project/lldb/include/lldb/Host/ |
| H A D | Terminal.h | 24 Odd, enumerator
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.h | 383 uint64_t Odd = Mask & 0x5555555555555555ULL; getNumCoveredRegs() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 327 getPairedGPR(MCPhysReg Reg,bool Odd,const MCRegisterInfo * RI) getPairedGPR() argument
343 unsigned Odd; getRegAllocationHints() local
[all...] |
| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64A57FPLoadBalancing.cpp | 101 enum class Color { Even, Odd }; enumerator
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| H A D | AArch64ISelLowering.cpp | 13875 bool Odd = false; LowerBUILD_VECTOR() local
27731 SDValue Odd = DAG.getNode(AArch64ISD::UZP2, DL, OpVT, Op.getOperand(0), LowerVECTOR_DEINTERLEAVE() local
[all...] |
| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitTracker.cpp | 295 __anon356067470702(const BT::RegisterCell &Rs, const BT::RegisterCell &Rt, uint16_t BW, bool Odd) evaluate() argument
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| H A D | HexagonISelDAGToDAGHVX.cpp | 859 Vd[i * Size + b] = Vv[(2 * i + Odd) * Size + b]; in vpack() local
874 Vd[(2 * i + 1) * Size + b] = Vu[(2 * i + Odd) * Size + b]; in vshuff() local
[all...] |
| /llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 1617 unsigned Odd = MRI.getSubReg(Reg, Subo); printGPRSeqPairsClassOperand() local
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| /llvm-project/llvm/lib/IR/ |
| H A D | AutoUpgrade.cpp | 3757 Value *Odd = Builder.CreateCall(FMA, Ops); upgradeX86IntrinsicCall() local
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 10466 SDValue Odd = DAG.getNode(ISD::CONCAT_VECTORS, DL, VecVT, ResLo.getValue(1), lowerVECTOR_DEINTERLEAVE() local
10487 SDValue Odd = lowerVECTOR_DEINTERLEAVE() local
10510 SDValue Odd = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VecVT, OddWide, lowerVECTOR_DEINTERLEAVE() local
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| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 3183 lowerGR128Binary(SelectionDAG & DAG,const SDLoc & DL,EVT VT,unsigned Opcode,SDValue Op0,SDValue Op1,SDValue & Even,SDValue & Odd) lowerGR128Binary() argument
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| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 12391 SDValue Odd = DAG.getVectorShuffle(OutVT, DL, Lo, Hi, visitVectorDeinterleave() local
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| /llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 9254 VectorUnzip(CGBuilderTy & Builder,llvm::Value * V,bool Odd) VectorUnzip() argument
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