/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFISelLowering.h | 137 shouldReduceLoadWidth(SDNode * Load,ISD::LoadExtType ExtTy,EVT NewVT) shouldReduceLoadWidth() argument
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/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeTypesGeneric.cpp | 218 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); in ExpandRes_EXTRACT_VECTOR_ELT() local 373 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); in ExpandOp_BUILD_VECTOR() local
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H A D | LegalizeVectorTypes.cpp | 384 EVT NewVT = N->getValueType(0).getVectorElementType(); ScalarizeVecRes_BITCAST() local 2590 EVT NewVT = Inputs[0].getValueType(); SplitVecRes_VECTOR_SHUFFLE() local 6642 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts); WidenVecOp_BITCAST() local 6661 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NewNumElts); WidenVecOp_BITCAST() local 7350 std::optional<EVT> NewVT = FirstVT; GenWidenVectorLoads() local 7573 std::optional<EVT> NewVT = GenWidenVectorStores() local 7587 EVT NewVT = Pair.first; GenWidenVectorStores() local [all...] |
H A D | DAGCombiner.cpp | 5115 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), SimpleSize*2); visitMULHS() local 5185 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), SimpleSize*2); visitMULHU() local 5395 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), SimpleSize*2); visitSMUL_LOHI() local 5448 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), SimpleSize*2); visitUMUL_LOHI() local 5640 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), BW); PerformMinMaxFpToSatCombine() local 5675 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), BW); PerformUMinFpToSatCombine() local 19900 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), NewBW); ReduceLoadOpStoreWidth() local 23708 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), visitBUILD_VECTOR() local 26544 EVT NewVT; visitINSERT_SUBVECTOR() local 27918 __anon791abb437402(EVT NewVT, SDValue ToCast) takeInexpensiveLog2() argument [all...] |
H A D | LegalizeDAG.cpp | 3493 EVT NewVT = ExpandNode() local
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H A D | LegalizeIntegerTypes.cpp | 775 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); PromoteIntRes_VP_CttzElements() local
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H A D | TargetLowering.cpp | 237 EVT NewVT = VT; findOptimalMemOpLowering() local [all...] |
H A D | SelectionDAGBuilder.cpp | 8042 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), NewEltTy, visitIntrinsicCall() local
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/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 1287 MVT NewVT = MVT::getVectorVT(EltTy, EC); getVectorTypeBreakdownMVT() local 1775 EVT NewVT = EVT::getVectorVT(Context, EltTy, EltCnt); getVectorTypeBreakdown() local [all...] |
/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64CallLowering.cpp | 400 MVT NewVT = TLI.getRegisterTypeForCallingConv(Ctx, CC, SplitEVTs[i]); lowerReturn() local
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/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 1535 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32, LowerCONCAT_VECTORS() local 1563 EVT NewVT = NumElt == 2 LowerEXTRACT_SUBVECTOR() local 3843 EVT NewVT = getEquivalentMemType(*DAG.getContext(), VT); performLoadCombine() local 3894 EVT NewVT = getEquivalentMemType(*DAG.getContext(), VT); performStoreCombine() local [all...] |
H A D | R600ISelLowering.cpp | 1696 EVT NewVT = MVT::v4i32; constBufferLoad() local
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H A D | AMDGPUISelDAGToDAG.cpp | 678 MVT NewVT = Opc == AMDGPUISD::CVT_PKRTZ_F16_F32 ? MVT::v2f16 : MVT::v2i16; Select() local
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H A D | SIISelLowering.cpp | 6418 EVT NewVT = getEquivalentMemType(*DAG.getContext(), VT); ReplaceNodeResults() local 8153 EVT NewVT = NumVDataDwords > 1 ? lowerImage() local 13454 EVT NewVT = getEquivalentMemType(*DAG.getContext(), VecVT); performExtractVectorEltCombine() local [all...] |
/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CallLowering.cpp | 676 MVT NewVT = TLI->getRegisterTypeForCallingConv(Ctx, CallConv, CurVT); determineAssignments() local
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/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 4358 MVT NewVT = MVT::getVectorVT(MVT::f32, NumElts); LowerVectorFP_TO_INT() local 4945 EVT NewVT = getExtensionTo64Bits(OrigTy); addRequiredExtensionForVectorMULL() local 6040 EVT NewVT = getTypeToTransformTo(*DAG.getContext(), VT); LowerINTRINSIC_WO_CHAIN() local 12855 MVT NewVT = MVT::getVectorVT(NewEltVT, VT.getVectorNumElements() / 2); tryWidenMaskForShuffle() local 19478 MVT NewVT = MVT::getVectorVT(ElementTy, NumElems * 2); tryExtendDUPToExtractHigh() local 22455 MVT NewVT = performLOADCombine() local 26161 EVT NewVT = getTypeToTransformTo(*DAG.getContext(), VT); ReplaceNodeResults() local 28011 EVT NewVT = LowerFixedLengthVECTOR_SHUFFLEToSVE() local 28033 EVT NewVT = getPackedSVEVectorVT(EVT::getIntegerVT(*DAG.getContext(), 64)); LowerFixedLengthVECTOR_SHUFFLEToSVE() local 28456 EVT NewVT = EVT::getVectorVT(Context, EltTy, ElementCount::getFixed(1)); getVectorTypeBreakdownForCallingConv() local [all...] |
/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCalls.cpp | 2771 VectorType *NewVT = cast<VectorType>(II->getType()); visitCallInst() local
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/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 5569 MVT NewVT = expandUnalignedRVVLoad() local 5600 MVT NewVT = expandUnalignedRVVStore() local 14128 EVT NewVT = SrcVT.changeVectorElementType(NewEltVT); narrowIndex() local 17301 MVT NewVT = MVT::getIntegerVT(MemVT.getSizeInBits()); PerformDAGCombine() local 17323 MVT NewVT = MVT::getIntegerVT(MemVT.getSizeInBits()); PerformDAGCombine() local [all...] |
/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 5982 EVT NewVT = MVT::v4i32; PerformLOADCombine() local
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/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 7907 MVT NewVT = V0_LO.getSimpleValueType(); ExpandHorizontalBinOp() local 12205 MVT NewVT = V.getSimpleValueType(); getScalarValueForVectorElement() local 17717 MVT NewVT = MVT::getVectorVT(NewEltVT, NewNumElts); lowerVECTOR_SHUFFLE() local 27960 MVT NewVT = MVT::getVectorVT(MVT::i32, NumElems); LowerVectorCTLZ_AVX512CDI() local 31196 MVT NewVT = MVT::getVectorVT(SrcVT.getVectorElementType(), LowerBITCAST() local 31347 MVT NewVT = MVT::getVectorVT(MVT::i32, NumElems); LowerVectorCTPOP() local 33317 EVT NewVT = VT.getVectorElementType() == MVT::f16 ? MVT::v8f16 : MVT::v4f32; ReplaceNodeResults() local 40736 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), BCVT.getScalarType(), combineTargetShuffle() local 40750 MVT NewVT = combineTargetShuffle() local 42936 MVT NewVT = MVT::getVectorVT(NewSrcVT, VT.getVectorNumElements() * 2); SimplifyDemandedBitsForTargetNode() local 51477 EVT NewVT = EVT::getIntegerVT(*DAG.getContext(), VT.getVectorNumElements()); combineStore() local 54552 EVT NewVT = Index.getValueType().changeVectorElementType(MVT::i32); combineGatherScatter() local 54566 EVT NewVT = Index.getValueType().changeVectorElementType(MVT::i32); combineGatherScatter() local [all...] |
/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 8618 EVT NewVT = getVectorTyFromPredicateVector(VT); PromoteMVEPredVector() local 8668 EVT NewVT = PredAsVector1.getValueType(); LowerVECTOR_SHUFFLE_i1() local 9201 EVT NewVT = NewV.getValueType(); LowerCONCAT_VECTORS_i1() local 9535 EVT NewVT = getExtensionTo64Bits(OrigTy); AddRequiredExtensionForVMULL() local [all...] |
/llvm-project/clang/lib/AST/ |
H A D | Decl.cpp | 2723 auto *NewVT = VarTemplate->getInstantiatedFromMemberTemplate(); getTemplateInstantiationPattern() local
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/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 1798 shouldReduceLoadWidth(SDNode * Load,ISD::LoadExtType ExtTy,EVT NewVT) shouldReduceLoadWidth() argument
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/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 14746 EVT NewVT = TargetVT == MVT::v2i64 ? MVT::v2f64 : MVT::v4f32; combineElementTruncationToVectorTruncation() local
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