/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMLoadStoreOptimizer.cpp | 1005 FormCandidates(const MemOpQueue & MemOps) FormCandidates() argument 1879 MemOpQueue MemOps; LoadStoreMultipleOpti() local 2221 IsSafeAndProfitableToMove(bool isLd,unsigned Base,MachineBasicBlock::iterator I,MachineBasicBlock::iterator E,SmallPtrSetImpl<MachineInstr * > & MemOps,SmallSet<unsigned,4> & MemRegs,const TargetRegisterInfo * TRI,AliasAnalysis * AA) IsSafeAndProfitableToMove() argument 2389 SmallPtrSet<MachineInstr*, 4> MemOps; RescheduleOps() local [all...] |
H A D | ARMTargetTransformInfo.cpp | 1195 std::vector<EVT> MemOps; getNumMemOps() local
|
H A D | ARMISelLowering.cpp | 4437 SmallVector<SDValue, 4> MemOps; StoreByValRegs() local
|
/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCISelLowering.cpp | 514 SmallVector<SDValue, 4> MemOps; in LowerCallArguments() local
|
/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1199 SmallVector<SDValue, 4> MemOps; LowerCCCArguments() local
|
/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 8465 findGISelOptimalMemOpLowering(std::vector<LLT> & MemOps,unsigned Limit,const MemOp & Op,unsigned DstAS,unsigned SrcAS,const AttributeList & FuncAttributes,const TargetLowering & TLI) findGISelOptimalMemOpLowering() argument 8583 std::vector<LLT> MemOps; lowerMemset() local 8739 std::vector<LLT> MemOps; lowerMemcpy() local 8844 std::vector<LLT> MemOps; lowerMemmove() local [all...] |
/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLoweringCall.cpp | 1572 SmallVector<SDValue, 8> MemOps; createVarArgAreaAndStoreRegisters() local
|
H A D | X86ISelDAGToDAG.cpp | 3761 MachineMemOperand *MemOps[] = {StoreNode->getMemOperand(), foldLoadStoreIntoMemOperand() local
|
H A D | X86ISelLowering.cpp | 25066 SmallVector<SDValue, 8> MemOps; LowerVASTART() local [all...] |
/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 1114 findOptimalMemOpLowering(std::vector<EVT> & MemOps,unsigned Limit,const MemOp & Op,unsigned DstAS,unsigned SrcAS,const AttributeList & FuncAttributes) const findOptimalMemOpLowering() argument 1755 SDValue MemOps[SystemZ::ELFNumArgFPRs]; LowerFormalArguments() local 3932 SDValue MemOps[NumFields]; lowerVASTART_ELF() local
|
/llvm-project/llvm/lib/CodeGen/ |
H A D | MachineScheduler.cpp | 1970 groupMemOps(ArrayRef<MemOpInfo> MemOps,ScheduleDAGInstrs * DAG,DenseMap<unsigned,SmallVector<MemOpInfo,32>> & Groups) groupMemOps() argument
|
/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 978 SmallVector<SDValue, 8> MemOps; LowerVASTART() local
|
/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 4407 SmallVector<SDValue, 8> MemOps; LowerFormalArguments_32SVR4() local 4564 SmallVector<SDValue, 8> MemOps; LowerFormalArguments_64SVR4() local 7229 SmallVector<SDValue, 8> MemOps; LowerFormalArguments_AIX() local [all...] |
/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAG.cpp | 7787 std::vector<EVT> MemOps; getMemcpyLoadsAndStores() local 7988 std::vector<EVT> MemOps; getMemmoveLoadsAndStores() local 8109 std::vector<EVT> MemOps; getMemsetStores() local [all...] |
H A D | TargetLowering.cpp | 200 findOptimalMemOpLowering(std::vector<EVT> & MemOps,unsigned Limit,const MemOp & Op,unsigned DstAS,unsigned SrcAS,const AttributeList & FuncAttributes) const findOptimalMemOpLowering() argument
|
/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 7622 SmallVector<SDValue, 8> MemOps; saveVarArgRegisters() local 10777 SmallVector<SDValue, 4> MemOps; LowerAAPCS_VASTART() local [all...] |