Searched defs:LoHalf (Results 1 – 6 of 6) sorted by relevance
| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.h | 455 SDValue LoHalf(SDValue V, SelectionDAG &DAG) const { in LoHalf() function
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| H A D | HexagonISelDAGToDAGHVX.cpp | 652 LoHalf = 0x20000000, global() enumerator
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 7797 MachineInstr &LoHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub0).add(SrcReg0Sub0); splitScalar64BitUnaryOp() local
7900 MachineInstr *LoHalf = splitScalarSMulU64() local
7979 MachineInstr *LoHalf = splitScalarSMulPseudo() local
8043 MachineInstr &LoHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub0) splitScalar64BitBinaryOp() local
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| H A D | SILoadStoreOptimizer.cpp | 1929 MachineInstr *LoHalf = computeBase() local
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| H A D | SIISelLowering.cpp | 5082 MachineInstr *LoHalf = BuildMI(*BB, MI, DL, TII->get(LoOpc), DestSub0) EmitInstrWithCustomInserter() local
7214 SDValue LoHalf = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BCVec, lowerINSERT_VECTOR_ELT() local
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| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 4883 Register LoHalf = MRI.createVirtualRegister(&Mips::GPR32RegClass); emitLDR_D() local
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