| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 754 getMemOperandWithOffsetWidth(const MachineInstr & LdSt,const MachineOperand * & BaseOp,int64_t & Offset,unsigned & Width,const TargetRegisterInfo *) const getMemOperandWithOffsetWidth() argument
795 getMemOperandsWithOffsetWidth(const MachineInstr & LdSt,SmallVectorImpl<const MachineOperand * > & BaseOps,int64_t & Offset,bool & OffsetIsScalable,unsigned & Width,const TargetRegisterInfo * TRI) const getMemOperandsWithOffsetWidth() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 730 GLoadStore &LdSt = cast<GLoadStore>(I); in select() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 2204 getMemOperandsWithOffsetWidth(const MachineInstr & LdSt,SmallVectorImpl<const MachineOperand * > & BaseOps,int64_t & Offset,bool & OffsetIsScalable,unsigned & Width,const TargetRegisterInfo * TRI) const getMemOperandsWithOffsetWidth() argument
2309 getMemOperandWithOffsetWidth(const MachineInstr & LdSt,const MachineOperand * & BaseReg,int64_t & Offset,unsigned & Width,const TargetRegisterInfo * TRI) const getMemOperandWithOffsetWidth() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2822 getMemOperandsWithOffsetWidth(const MachineInstr & LdSt,SmallVectorImpl<const MachineOperand * > & BaseOps,int64_t & Offset,bool & OffsetIsScalable,unsigned & Width,const TargetRegisterInfo * TRI) const getMemOperandsWithOffsetWidth() argument
2833 isLdStSafeToCluster(const MachineInstr & LdSt,const TargetRegisterInfo * TRI) isLdStSafeToCluster() argument
5464 getMemOperandWithOffsetWidth(const MachineInstr & LdSt,const MachineOperand * & BaseReg,int64_t & Offset,unsigned & Width,const TargetRegisterInfo * TRI) const getMemOperandWithOffsetWidth() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 1016 findPostIndexCandidate(GLoadStore & LdSt,Register & Addr,Register & Base,Register & Offset,bool & RematOffset) findPostIndexCandidate() argument
1112 findPreIndexCandidate(GLoadStore & LdSt,Register & Addr,Register & Base,Register & Offset) findPreIndexCandidate() argument
1264 auto &LdSt = cast<GLoadStore>(MI); matchCombineIndexedLoadStore() local
1580 if (auto *LdSt = dyn_cast<GLoadStore>(&UseMI)) { matchPtrAddImmedChain() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 2675 getMemOperandsWithOffsetWidth(const MachineInstr & LdSt,SmallVectorImpl<const MachineOperand * > & BaseOps,int64_t & Offset,bool & OffsetIsScalable,unsigned & Width,const TargetRegisterInfo * TRI) const getMemOperandsWithOffsetWidth() argument
3469 getMemOperandWithOffsetWidth(const MachineInstr & LdSt,const MachineOperand * & BaseOp,int64_t & Offset,bool & OffsetIsScalable,TypeSize & Width,const TargetRegisterInfo * TRI) const getMemOperandWithOffsetWidth() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 3044 getMemOperandsWithOffsetWidth(const MachineInstr & LdSt,SmallVectorImpl<const MachineOperand * > & BaseOps,int64_t & Offset,bool & OffsetIsScalable,unsigned & Width,const TargetRegisterInfo * TRI) const getMemOperandsWithOffsetWidth() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 1087 LSBaseSDNode *LdSt = cast<LSBaseSDNode>(Op); SelectAddrMode6Offset() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2874 GLoadStore &LdSt = cast<GLoadStore>(I); in select() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 362 getMemOperandsWithOffsetWidth(const MachineInstr & LdSt,SmallVectorImpl<const MachineOperand * > & BaseOps,int64_t & Offset,bool & OffsetIsScalable,unsigned & Width,const TargetRegisterInfo * TRI) const getMemOperandsWithOffsetWidth() argument
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